drv_uart.c

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/******************************************************************************
  Copyright (C), 2007-2008, wanyi Tech. Co., Ltd.
  FileName		:drv_uart.c
  Author		:kevin 
  modify		:       
  Version 		:1.0          
  Date			:2007-6-28
  Description	:auto design for driver eeprom function       
  Function List	:void init_uart(void)
******************************************************************************/
#include "\inc\system.h"





/******************************************************************************
  Function:       // void init_uart(void)
  Description:    // for com init for load pc
  Calls:          // none
  Called By:      // init ()
  Table Accessed: // none
  Table Updated:  // none
  Input:          // void
  Output:         // none
  Return:         // void
  Others:         // none
******************************************************************************/
void init_uart(void)
{
	TRISCbits.TRISC7    =1;		 // RC7(RX1) config is input
    TRISCbits.TRISC6    =0;		 // RC6(TX1)config is output

    TXSTA1bits.CSRC     =1;
    TXSTA1bits.TX9      =0;
    TXSTA1bits.TXEN     =1;		 // enable Transmit 
    TXSTA1bits.SYNC     =0;
    TXSTA1bits.SENDB    =1;
    TXSTA1bits.BRGH     =1;      //Asynchronous mode Low speed
  

    RCSTA1bits.SPEN     =1;      //Serial port enabled
    RCSTA1bits.RX9      =0;	
    RCSTA1bits.CREN     =1;		 // enable Serial Receive 
    RCSTA1bits.ADDEN    =0;	

    BAUDCON1bits.BRG16  =1;      //8 bit Baud Rate Generator
    BAUDCON1bits.WUE    =1;

    SPBRG1              =68;	 // 115200bit/s as 8.000MHz crystal

    PIR1bits.TX1IF      =0;		 //read only
    PIR1bits.RC1IF      =0;      //  read only
   
    PIE1bits.TX1IE      =0;      //disable sci1 Transmit interrupt 
    PIE1bits.RC1IE      =1;		 // enable sci1 Receive interrupt

    IPR1bits.RC1IP      =0;	     // sci1 Receive interrupt is Low priority
    IPR1bits.TX1IP       =0;		 // Transmit interrupt is Low priority
   
    RCONbits.IPEN       =1;		 // enable interrupt Priority	 
}
//=============================================================================

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