cpu_type.ash

CPU特性检测程序源代码 1.17。VB编写的对于系统编程感兴趣的朋友

	cmp	bl,cpu286	; IIT x87's cannot work with CPUs prior to 286
	jb	@@L35		; so we disable the test on them too.
@@checkIIT:
	fld	ds:[denormal]
	fadd	st(0),st	; IIT will produce zero result while all others
	fnstsw	ax		; won't
	test	al,02h
	jnz	@@L35		; not an IIT chip
	cmp	dl,0Ch		; tested as 80387?
	jz	@@300
	mov	dl,22		; this is IIT 2C87
	jmp	@@L161
@@300:
	cmp	bl,0Ah		; it's a 486?
	jb	@@301
	mov	dl,22h		; assume IIT 4C87
	jmp	@@L161
@@301:
	mov	dl,24		; this is IIT 3C87
	jmp	@@L161
@@L35:
	fninit
	fldpi
	f2xm1
	fstp	fpubuf_d
	wait
	cmp	word ptr [fpubuf_d+2],3FC9h
	jne	@@L15
	or	dl,2		; this is Cyrix ?C87
@@L15:
; testing for ULSI FPUs
	fninit
	fldcw	_53bit_prec
	fld	tbyte ptr op1
	fld1
	faddp	st(1),st
	fstp	tera
	fnstsw	ax
	wait
	test	al,20h
	jnz	@@L16
	cmp	byte ptr [tera],0F8h
	jnz	@@L16
	cmp	byte ptr [tera+9],40h
	jnz	@@L16
	mov	dl,1Ah
	jmp	@@L161
@@L16:
; testing for Cyrix EMC87
	fnstcw	fpubuf_w
	wait
	or	byte ptr fpubuf_w[1],80h
	fldcw	fpubuf_w
	fstcw	fpubuf_w
	wait
	test	byte ptr fpubuf_w[1],80h
	jz	@@L162
	mov	dl,1Ch
	jmp	@@L161
@@L162:
	cmp	bl,cpu386
	jb	@@L161
	fninit
	fldpi
	f2xm1
	fld1
	fchs
	fldpi
	fscale
	fstp	st(1)
	fcompp
	fstsw	ax
	wait
	sahf
	jnz	@@L161
	mov	dl,1Eh
@@L161:
	cmp	bl,cpu486dx	; 486dx?
	jne	@@nobuilt
	mov	fpubuf_w,0
	fninit			; test if this is actually an i486sx
	fstcw	fpubuf_w
	cmp	fpubuf_w,37Fh
	jz	@@builtin
	dec	bl		; this is 486sx - some tricky sx'es pass thru
				; sx-specific test
	jmp	@@31
@@builtin:
	and	dl,1
	or	dl,10h		; built-in coprocessor
	jmp	@@nobuilt
@@nobuilt:
	cmp	bl,cpu286	; 286...?
	jnz	@@30
	cmp	dl,0Ch		; ...and FPU tested as 387...?
	jz	@@21
	cmp	dl,0Dh
	jnz	@@30
@@21:
	add	dl,8		; then assume 80287XL - tricky
@@30:
	cmp	bl,cpu486sx	; i486sx ?
	jnz	@@31
	cmp	dl,0Ch		; 387?
	jz	@@487sx
	cmp	dl,0Dh
	jnz	@@31
@@487sx:
	inc	bl		; assume 486DX or 487SX
	mov	dl,10h		; assume internal FPU
@@31:
	cmp	bl,cpuNx586	; Nx586?
	jnz	@@32
	cmp	dl,0Ch		; there's an 386-compatible FPU?
	jz	@@nx587
	cmp	dl,0Dh
	jnz	@@32
@@nx587:
	and	dl,1		; assume Nx587
	add	dl,20h
@@32:
	cmp	dl,4		; any 87 present?
	jb	@@L18
	fldenv	fpuenv	; yes - restore 87 environment
@@L18:
	ret
	endp
fpubuf_w	dw	?
fpubuf_d	dd	?
fpuenv		db	14 dup(?)
tera		dt	?
_53bit_prec	dw	02F7h
denormal	dt	1
op1		db	0F0h,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,03Fh


ifdef	__PRINT_CPU__

Lstring stepIs,<  Cyrix CPU Step: >
Lstring revIs,<, Revision: >

CPUs	dw	offset I88
	dw	offset I86
	dw	offset V20
	dw	offset V30
	dw	offset I188
	dw	offset I186
	dw	offset I286
	dw	offset I386SX
	dw	offset I386DX
	dw	offset I386SL
	dw	offset I486SX
	dw	offset I486DX
	dw	offset Cyr486
	dw	offset Cyr486
	dw	offset I586
	dw	offset CxM1
	dw	offset P24T
	dw	offset ibm386slc
	dw	offset ibm486slc
	dw	offset ibm486slc2
	dw	offset U5S
	dw	offset U5D
	dw	offset am386sx
	dw	offset am386dx
	dw	offset Nx586
	dw	offset ibm486bl3
	dw	offset am486dx
	dw	offset p54
	dw	offset P6

Lstring	I88,<Intel 8088>
Lstring	I86,<Intel 8086>
Lstring	V20,<NEC V20>
Lstring	V30,<NEC V30>
Lstring	I188,<Intel 80188>
Lstring	I186,<Intel 80186>
Lstring I286,<Intel 80286>
Lstring I386SX,<Intel 80386SX>
Lstring I386DX,<Intel 80386DX>
Lstring I386SL,<IBM 386SL>
Lstring I486SX,<Intel i486SX>
Lstring I486DX,<Intel i486DX or i487SX>
Lstring Cyr486,<Cyrix Cx486>
Lstring I586,<Intel Pentium>
Lstring CxM1,<Cyrix M1 (586)>
Lstring i486,<Intel i486>
Lstring P24T,<Intel iP24T (Pentium OverDrive)>
Lstring am386sx,<AMD Am386SX>
Lstring am386dx,<AMD Am386DX>
Lstring ibm386slc,<IBM 386SLC>
Lstring ibm486slc,<IBM 486SLC>
Lstring ibm486slc2,<IBM 486SLC2>
Lstring U5S,<UMC U5-S>
Lstring U5D,<UMC U5-D>
Lstring Nx586,<NexGen Nx586>
Lstring ibm486bl3,<IBM 486BL3 (Blue Lightning)>
Lstring p54,<Intel iP54>
Lstring am486dx,<AMD Am486DX>
Lstring Ti486SXL,<Texas Instruments Ti486SXL>
Lstring P6,<Intel P6>

ModelTable	label	word
	dw	offset strDX
	dw	offset strDX
	dw	offset strSX
	dw	offset strDX2
	dw	offset strSL
	dw	offset strSX2
	dw	offset strBlank
	dw	offset strDX2WB
	dw	offset strDX4
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
AmModels	label	word
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset str2
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset str2Plus
	dw	offset str4
	dw	offset str4Plus
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank
	dw	offset strBlank

CxModels	label	byte
	db	0
	dw	offset Cx0
	db	1
	dw	offset Cx1
	db	2
	dw	offset Cx2
	db	3
	dw	offset Cx3
	db	4
	dw	offset Cx4
	db	5
	dw	offset Cx5
	db	6
	dw	offset Cx5
	db	7
	dw	offset Cx7
	db	10h
	dw	offset Cx10
	db	11h
	dw	offset Cx11
	db	12h
	dw	offset Cx12
	db	13h
	dw	offset Cx13
	db	1Ah
	dw	offset strDX
	db	1Bh
	dw	offset Cx1B
	db	0FFh

Lstring	Cx0,<SLC>
Lstring Cx1,<DLC>
Lstring Cx2,<SL2>
Lstring Cx3,<DL2>
Lstring Cx4,<SR>
Lstring Cx5,<DR>
Lstring Cx6,<SR2>
Lstring Cx7,<DR2>
Lstring Cx10,<S>
Lstring Cx11,<S2>
Lstring Cx12,<SE>
Lstring Cx13,<S2E>
Lstring Cx1B,<DX2>

Lstring strDX,<DX>
Lstring strSX,<SX>
Lstring strDX2,<DX2/OverDrive>
Lstring strSL,<SL>
Lstring strSX2,<SX2>
Lstring strDX4,<DX4>
Lstring strDX2WB,<DX2WB (P24D)>
Lstring strBlank,<>
Lstring str2,<2>
Lstring str2Plus,<2+>
Lstring str4,<4>
Lstring str4Plus,<4+>

FPUType	dw	?

ifdef	__PRINT_SPEED__
Lstring MHz,<MHz>
Lstring Comma,<, >
endif

IFDEF	__PRINT_STEP__
checkWindoze	proc
	push	ax dx
	mov	ax,1600h
	int	2Fh
	is0	al,@@nowin
	cmp	al,80h
	jz	@@nowin
	stc
	jmp	@@Qw
@@nowin:
	clc
@@Qw:
	pop	dx ax
	ret
	endp
ENDIF

ifdef	__PRINT_SPEED__

	.8086
WriteInt	proc		; it's quite unoptimal, but it works...
ARG	anInt	: Byte
LOCAL	aStr	: BYTE : 5
	lea	di,aStr
	push	ss
	pop	es
	inc	di
	clr	cl
	mov	al,anInt
	clr	ah
	mov	bl,100
	cmp	al,bl
	jb	@@1
	div	bl
	add	al,30h
	stosb
	inc	cl
@@1:
	mov	al,anInt
	clr	ah
	mov	bl,10
	cmp	al,bl
	jb	@@2
	div	bl
	cmp	al,10
	jb	@@10
	sub	al,al
@@10:
	add	al,30h
	stosb
	inc	cl
@@2:
	mov	al,anInt
	clr	ah
	mov	bl,10
	div	bl
	xchg	ah,al
	add	al,30h
	stosb
	inc	cl
	lea	di,aStr
	mov	al,cl
	stosb
	push	ds
	push	ss
	pop	ds
	lea	dx,aStr
	call	WriteStr
	pop	ds
	ret
	endp

endif	; __PRINT_SPEED__

	.8086	
print_CPU	proc
LOCAL	cpuSpeed : BYTE, Step : BYTE, Rev : BYTE, isCx : Byte
	mov	isCx,0
	call	CPU_Type	; get CPU and FPU codes
	clr	dh
	mov	FPUType,dx	; save FPU code in variable
	push	ax
	call	intCPUSpeed	; get processor clock speed in MHz
	mov	cpuSpeed,al
	pop	ax
	cmp	al,cpuCx486
	jb	__1
	cmp	al,cpu486dlc
	ja	__1
	push	ax
	call	getCyrixModel	; determine Cyrix 486 model
	mov	Step,ah
	and	ah,0Fh
	add	ah,30h
	mov	Rev,ah
	shr	Step,4
	add	Step,30h
	mov	isCx,1
	lsi	CxModels
__2:
	cmp	al,byte ptr [si]
	jz	__3
	cmp	byte ptr [si],0FFh
	jz	@@new486
	add	si,3
	jmp	__2
__3:
	cmp	al,1Ah
	jb	@@121
	cmp	al,1Bh
	ja	@@121
	and	FPUType,1
	add	FPUType,10h
@@121:
	cmp	al,0FEh
	jz	@@ti
	mov	dx,word ptr [si+1]
	push	dx
	ldx	Cyr486
	call	WriteStr
	pop	dx
	jmp	@@new486
@@ti:
	ldx	Ti486SXL
	jmp	@@new486
__1:
	push	ax
	cmp	al,cpuAm486	; Am486 detected?
	jnz	@@intel
	and	ah,0F0h
	mov	cl,4
	shr	ah,cl
	mov	bl,ah
	clr	bh
	shl	bx,1
	mov	dx,AmModels[bx]
	push	dx
	ldx	am486dx
	call	WriteStr
	pop	dx
	jmp	@@new486
@@intel:
	cmp	al,cpu486sx	; 486 detected?
	jnz	@@older
	and	ah,0F0h		; and it supports CPUID?
	jz	@@older
	mov	cl,4		; determine CPU model
	shr	ah,cl
	mov	bl,ah
	clr	bh
	shl	bx,1
	mov	dx,ModelTable[bx]
	push	dx
	ldx	i486
	call	WriteStr
	pop	dx
	jmp	@@new486
@@amsx:
	cmp	cpuSpeed,35	; freq. > 33 means AMD 386SX
	jb	@@printIt
	mov	bl,cpuam386sx
	jmp	@@printIt
@@amdx:
	cmp	cpuSpeed,35	; freq. > 33 means AMD 386DX
	jb	@@printIt
	mov	bl,cpuam386dx
	jmp	@@printIt
@@older:
	mov	bl,al
	cmp	bl,cpu386sx
	je	@@amsx
	cmp	bl,cpu386dx
	je	@@amdx
@@printIt:
	clr	bh
	shl	bx,1		; now get string offset from table
	mov	dx,CPUs[bx]
@@new486:
	call	WriteStr
	pop	ax

ifdef	__PRINT_SPEED__
	push	ax
	ldx	Comma
	call	WriteStr
	mov	al,cpuSpeed
	push	ax
	call	WriteInt
	ldx	MHz
	call	WriteStr
	pop	ax
endif

ifdef	__PRINT_STEP__
	call	checkWindoze
	jc	@@Exit
	cmp	al,cpu386dx	; 386dx ?
	jnz	@@Exit
	call	print_Step
else
	cmp	al,cpu386
	jb	@@noSMM
	cmp	al,0Eh		; P5 ?
	jb	@@checkSMM
	cmp	al,10h
	jbe	@@noSMM		; P5, M1 and P24T don't need SMM detection
	cmp	al,1Bh
	jae	@@noSMM		; so does P54, P6, etc.
@@checkSMM:
	call	isSMMable	; this routine can crash DOS session under
				; Windows 95 if SMM is not supported by CPU
	test	ax,ax
	jz	@@noSMM
	ldx	SLEnhanced
	call	WriteStr
@@noSMM:
endif	; __PRINT_STEP__
@@Exit:
	ldx	EndLine
	call	WriteStr
	cmp	isCx,1
	jnz	@@noCyrix
	ldx	stepIs
	call	WriteStr
	mov	dl,Step
	mov	ah,2
	int	21h
	ldx	revIs
	call	WriteStr
	mov	dl,Rev
	mov	ah,2
	int	21h
	ldx	EndLine
	call	WriteStr
@@noCyrix:
ifdef	__PRINT_FPU__
	call	print_FPU
	ldx	EndLine
	call	WriteStr
endif
	ret
	endp

endif	; __PRINT_CPU__

ifdef	__PRINT_STEP__
__386STEP__	EQU	1
endif