📄 w99av2.bak.c
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// set luminance W99AV_WriteRegW(LAR, W99AV_LAR_VALUE); // DVD_101-2TCH, must use 0x82 // TCC045, set bright level according to setup switch (__SetupInfo.bBrightness) { case SETUP_SCREEN_BRIGHTNESS_NORMAL: HAL_AdjustBrightView(HAL_BRIGHTVIEW_NORMAL); break; case SETUP_SCREEN_BRIGHTNESS_BRIGHT: HAL_AdjustBrightView(HAL_BRIGHTVIEW_BRIGHT); break; case SETUP_SCREEN_BRIGHTNESS_SOFT: HAL_AdjustBrightView(HAL_BRIGHTVIEW_SOFT); break; default: break; } // TCC045, set contrast level according to setup switch (__SetupInfo.bContrast) { case SETUP_SCREEN_CONTRAST_MINUS4: HAL_AdjustContrast(HAL_CONTRAST_LEVEL0); break; case SETUP_SCREEN_CONTRAST_MINUS3: HAL_AdjustContrast(HAL_CONTRAST_LEVEL1); break; case SETUP_SCREEN_CONTRAST_MINUS2: HAL_AdjustContrast(HAL_CONTRAST_LEVEL2); break; case SETUP_SCREEN_CONTRAST_MINUS1: HAL_AdjustContrast(HAL_CONTRAST_LEVEL3); break; case SETUP_SCREEN_CONTRAST_0: HAL_AdjustContrast(HAL_CONTRAST_LEVEL4); break; case SETUP_SCREEN_CONTRAST_PLUS1: HAL_AdjustContrast(HAL_CONTRAST_LEVEL5); break; case SETUP_SCREEN_CONTRAST_PLUS2: HAL_AdjustContrast(HAL_CONTRAST_LEVEL6); break; case SETUP_SCREEN_CONTRAST_PLUS3: HAL_AdjustContrast(HAL_CONTRAST_LEVEL7); break; case SETUP_SCREEN_CONTRAST_PLUS4: HAL_AdjustContrast(HAL_CONTRAST_LEVEL8); break; default: break; } W99AV_WriteRegW(DVDCTLR, 0x0); // enable CD interface and let data in // LLY.276p-4, remove set audio buffer threshold action into HAL_SetBuffer() // Step 4: Set A/V buffer size and audio buffer start and length // LLY.276p-4, remove HAL_BUFFERMODE_DEFAULT case, // and let it refer "__bAVBufferMode" directly __bAVBufferMode |= 0x80; // enable bit[7] to always set A/V buffer HAL_SetBuffer(HAL_SETBUFFER_AV, __bAVBufferMode); __wW99AVPCRLow |= 0x0020 ; W99AV_WriteRegDW (PCR, __wW99AVPCRLow, __wW99AVPCRHigh) ; /* __dwW99AVCmdArg [0] = 2 ; __dwW99AVCmdArg [1] = CMDARG_SAVCR ; // DVD017, TCC // Micky2.80q, default let audio mute __dwW99AVCmdArg [2] = 0x0 ; W99AV_CommandN (COMMAND_SAVCR) ; */ //Kevin1.10, write PCMSCALE register instead of macro command (RISC IRAM code jumper table is contaminated by somebody unknown) W99AV_WriteRegDW (PCMSCALER, 0, 0); __dwW99AVCmdArg [0] = 4 ; __dwW99AVCmdArg [1] = CMDARG_SACR ; __dwW99AVCmdArg [2] = _dwACR1; //0x4e ;#ifdef USE_INITIAL_FILE if ( __bW99AVAudioType==2 ) // wyc.274j-2-Dolby, use the variable to store the setting of argument2. // __dwW99AVCmdArg [3] = 0x230 ; // AC3, 0x9a __dwW99AVCmdArg [3] = _dwACR2 ; // AC3, 0x9a // LLY.023 for CDDA setting else if(__bW99AVAudioType==0x3 || __bW99AVAudioType==0x4) // CDDA, 0x9a __dwW99AVCmdArg[3] = 0x4a30; // Chuan2.80p, Always enable SPDIF else if (__bW99AVAudioType == 0x5) // DTS __dwW99AVCmdArg[3] = 0x6e30; // Chuan2.80p, Always enable SPDIF else __dwW99AVCmdArg[3] = 0x2630; // Chuan2.80p, Always enable SPDIF#else // DVD017, set default to ac3 __dwW99AVCmdArg [3] = _dwACR2; //0x230 ; // AC3, 0x9a#endif //#ifdef USE_INITIAL_FILE __dwW99AVCmdArg [4] = _dwACR3; //0x1840000 ; W99AV_CommandN (COMMAND_SACR) ; __wW99AVPCRLow &= 0xFFDF ; W99AV_WriteRegDW (PCR, __wW99AVPCRLow, __wW99AVPCRHigh) ; // Notice: remove this code while DSP don't refer it !! W99AV_WriteDM(W99AV_DM_SVCD_DOWN_SAMPLE, 0); // don't do down sample W99AV_WriteDM (W99AV_DM_ERROR_CONCEALMENT, VALUE_DM7F2 ) ; // SKIPMASK, mute if bitstream error //TCC025, rewrite PARSER FIFO Control Register after reset W99AV_WriteRegDW (PARFIFOCTLR, __wW99AVPARFIFOCTLRLow, __wW99AVPARFIFOCTLRHigh) ; // wyc1.24, default make RISC skip slice when meet error data, that can make system play more pictures but will see more mosaics. // 0x17d <> 0: Skip slice, more motion and more video mosaic. 0x17d == 0: Skip picture, less motion and system will pause more. W99AV_WriteDRAMData(0x17d, 0x10000); }// ***********************************************************************// Function : W99AV_InitialAudio// Description : Do some initial operations for DM to initial audio// Arguments : bAll:TRUE or FALSE// Return : none// Side Effect :// ***********************************************************************#pragma DISABLEvoid W99AV_InitialAudio(BYTE bAll){ extern void CHIPS_MICEnable(BYTE bEnable);#ifdef USE_INITIAL_FILE // LLY.023 for CDDA setting if ( __bW99AVAudioType == 0x3) // SYNen, CDDA W99AV_WriteDM(W99AV_DM_CRC_ENABLE, 0x0); else if ( __bW99AVAudioType==0x2 || __bW99AVAudioType==0x1 ) W99AV_WriteDM (W99AV_DM_CRC_ENABLE, 0x2) ; // SYNen, AC3 with CRC, MP3 else W99AV_WriteDM (W99AV_DM_CRC_ENABLE, 0x0) ; // SYNen, AC3 without CRC, MPG LI/II#else W99AV_WriteDM (W99AV_DM_CRC_ENABLE, 0x2) ; // SYNen, AC3 with CRC, MP3#endif W99AV_WriteDM (W99AV_DM_ERROR_CONCEALMENT, VALUE_DM7F2) ; // SKIPMASK, mute if bitstream error // LLY.170-3, abstract DM[0x7f3 ~ 0x7f6] setting procedure into W99AV_SetACLKFreq() W99AV_SetACLKFreq(); W99AV_WriteDM (W99AV_DM_QPARA0, 0x33300) ; // Qpara0#ifdef USE_INITIAL_FILE if(__bW99AVAudioType==0x3) W99AV_WriteDM (W99AV_DM_QPARA1, 0x07451) ; // Qpara1, only for CDDA else W99AV_WriteDM (W99AV_DM_QPARA1, 0x07450) ; // Qpara1#else // #ifdef DOS_VER W99AV_WriteDM (W99AV_DM_QPARA1, 0x07450) ; // Qpara1#endif // #ifdef DOS_VER W99AV_WriteDM (W99AV_DM_PACKET_WPTR, 0x0780) ; // audio buffer pointer W99AV_WriteDM (W99AV_DM_PACKET_RPTR, 0x0780) ; // audio buffer pointer // Notice: remove this setting while DSP don't refer it W99AV_WriteDM (W99AV_DM_SVCD_DOWN_SAMPLE, 0) ; // Disable Down Sample // LLY.105, initialize A/V sync control for DSP // otherwise, it maybe let video master and A/V hang --> go while 1st poweron W99AV_WriteDM(W99AV_DM_AVSYNCEN, 0x0);//Kevin1.00, add#ifdef SUPPORT_6CH_OUTPUT_FOR_NONDVD W99AV_WriteDM(W99AV_DM_CONTROL_6CH,1);#else W99AV_WriteDM(W99AV_DM_CONTROL_6CH,0); #endif #ifdef SUPPORT_MPEG_AUDIO_UP_SAMPLE W99AV_WriteDM(W99AV_DM_UPSAMPLE_CONTROL,1);#else W99AV_WriteDM(W99AV_DM_UPSAMPLE_CONTROL,0); #endif//Kevin1.05, MIC/Echo //Kevin2.80, let CHIPS_Echo() handle W99AV_DM_ECHO_CR0 CHIPS_Echo(CHIPS_NORMAL); //Kevin1.23, 2 to 1 sampling as MIC sampling default W99AV_WriteDM(W99AV_DM_ECHO_CR1, 0x2f000); // 2 to 1 sampling, right-aligned //W99AV_WriteDM(W99AV_DM_ECHO_CR1, 0x27000); // 2 to 1 sampling, left-aligned //W99AV_WriteDM(W99AV_DM_ECHO_CR1, 0x27800); // 2 to 1 sampling, I2S-aligned W99AV_WriteDM(W99AV_DM_MIC_CLAMPING_FACTOR, 0x7FFFF); //gain 1 //W99AV_WriteDM(W99AV_DM_MIC_CLAMPING_FACTOR, 0x3FFFFf); //gain ~0.5 // Brian.173, enable the MIC input CHIPS_MICEnable(TRUE); //Kevin1.10, set default MIC volume CHIPS_MICVolControl(CHIPS_NORMAL); // reset DSP after init DM variables __wW99AVPCRLow |= 0x0020 ; W99AV_WriteRegDW (PCR, __wW99AVPCRLow, __wW99AVPCRHigh) ; __wW99AVPCRLow &= 0xFFDF ; W99AV_WriteRegDW (PCR, __wW99AVPCRLow, __wW99AVPCRHigh) ; //Kevin1.25, set default downmix mode // Source 1KHz -20dB 5.1CH // CT908/MTK L R // LT/RT 0.57V 5.95V // L0/RO 4.66V 4.66V// CHIPS_DownMixMode(AC3_DOWNMIX_LORO); CHIPS_DownMixMode(AC3_DOWNMIX_LTRT); // jyliu 20041110, YHI down-mix surround no output issue. }// ***********************************************************************// Function : W99AV_SetACLKFreq// Description : Set Audio system clock (ACLK) frequency// Argument : None// Return : None// Side Effect :// ***********************************************************************// LLY2.78b, add different ACLK FREQ mode settingvoid W99AV_SetACLKFreq(void){ //Kevin2.37, move ahead to be called once at H/W power on to fix AC3 NEXT pop noise //Kevin1.24, fix 1 bit shift between MICWS & PCMWS by reseting CLK circuit //W99AV_WriteDM(W99AV_DM_DIV_CLK_REG, 0); // Notice: Default case is 384 mode#ifdef USING_256_MODE_ACLK_FREQ //Kevin1.05, add MIC related CLK settings //W99AV_WriteDM (W99AV_DM_DIV_CLK, 0x3) ; // /(n+1) //PCMCLK=ACLK/DIVCLK , PCMWS=PCMCLK/64=ACLK/256(or 384) //MIC_PCMCLK(ADCCLK)=ACLK/MIC_DIVCLK , MIC_PCMWS=PCMWS/MIC_WS_DIV W99AV_WriteDM (W99AV_DM_DIV_CLK, 0x0303) ; // MIC_DIVCLK[15:8] DIVCLK[7:0] W99AV_WriteDM (W99AV_DM_MIC_WS_DIV, 0x1) ; // /n W99AV_WriteDM (W99AV_DM_FS32, 127) ; // FS32..127 W99AV_WriteDM (W99AV_DM_FS44, 127) ; // FS44..127 W99AV_WriteDM (W99AV_DM_FS48, 127) ; // FS48..127#else // default case for 384 mode //Kevin1.05, add MIC related CLK settings //W99AV_WriteDM (W99AV_DM_DIV_CLK, 0x5) ; // /(n+1) //PCMCLK=ACLK/DIVCLK , PCMWS=PCMCLK/64=ACLK/256(or 384) //MIC_PCMCLK(ADCCLK)=ACLK/MIC_DIVCLK , MIC_PCMWS=PCMWS/MIC_WS_DIV W99AV_WriteDM (W99AV_DM_DIV_CLK, 0x0505) ; W99AV_WriteDM (W99AV_DM_MIC_WS_DIV, 0x1) ; // /n W99AV_WriteDM (W99AV_DM_FS32, 191) ; // FS32 W99AV_WriteDM (W99AV_DM_FS44, 191) ; // FS44 W99AV_WriteDM (W99AV_DM_FS48, 191) ; // FS48#endif // #if ACLK_FREQ_MODE == 256_MODE}// ***********************************************************************// Function : W99AV_Reset// Description : Reset method for W9926QF// Arguments : bType:the type of reset// Return : none// Side Effect :// ***********************************************************************void W99AV_Reset(BYTE bType){#ifdef SUPPORT_PRINTF printf("\nRST Type:%hx", bType); // Chuan1.05, Show reset ID.#endif switch(bType) { case W99AV_RESET_IBF : // reset Input-Bitstream FIFO __wW99AVPCRLow=__wW99AVPCRLow | 0x0004; // set bit(2)--IBF_RST to 1 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); __wW99AVPCRLow=__wW99AVPCRLow & 0xFFFB; // set bit(2)--IBF_RST to 0 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); break; case W99AV_RESET_AUDIO : // a reset sequence to audio decoder __wW99AVPCRLow=__wW99AVPCRLow | 0x0020; // set bit(5)--ARST to 1 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); __wW99AVPCRLow=__wW99AVPCRLow & 0xFFDF; // set bit(5)--ARST to 0 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); W99AV_WriteDM (W99AV_DM_ERROR_CONCEALMENT, VALUE_DM7F2) ; // SKIPMASK, mute if bitstream error // wyc1.21, 0 indicate DSP code using 16 bit format and 1 indicate using 14 bit mode. Because only DTS will use 14 bit mode and it will judge // by itsele. So SHH suggest F/W to initial it when reset DSP to avoid DTS code using wrong format to run. W99AV_WriteDM(0xFFC6, 0x0); break; case W99AV_RESET_HBI : // reset Host Bus Interface __wW99AVPCRLow=__wW99AVPCRLow | 0x0080; // set bit(7)--HBI_RST to 1 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); __wW99AVPCRLow=__wW99AVPCRLow & 0xFF7F; // set bit(7)--HBI_RST to 0 W99AV_WriteRegDW(PCR,__wW99AVPCRLow,__wW99AVPCRHigh); break; case W99AV_RESET_TOTAL : // total reset { // LLY.047, restore OSD_TOP/BOTTOM_ADDR & OSD_TOP/BOTTOM_SIZE // by global variables extern DWORD _dwTopAddr; extern DWORD _dwBottomAddr; extern DWORD _dwTopSize; extern DWORD _dwBottomSize; // temporally disable OSD display __wW99AVVCRLow &= ~0x00000040; // disable OSD_EN in VCR // LLY.050, issue SVC2 command instead of "write REG command" // because some info. must tell RISC by "SVC2" command //W99AV_WriteRegDW(VCR, __wW99AVVCRLow, __wW99AVVCRHigh); __dwW99AVCmdArg [0] = 2 ; __dwW99AVCmdArg [1] = CMDARG_SVC2 ; __dwW99AVCmdArg [2] = MAKELONG (__wW99AVVCRLow, __wW99AVVCRHigh) ; W99AV_CommandN (COMMAND_SVC2) ; W99AV_WriteDRAMData( W99AV_DRAM_OSDT_ADR, 0); W99AV_WriteDRAMData( W99AV_DRAM_OSDB_ADR, 0); // do video reset in the period of VSYNC W99AV_ClearInterrupt(INT_VSYNC); wCnt=0; while ( (W99AV_GetPSR() & INT_VSYNC) == 0 ) { wCnt++; if(wCnt>VSYNCLOOP) {#ifdef SUPPORT_PRINTF printf("\nWait no VSYNC !!");#endif break; } } // DVD016, fixed total reset bug W99AV_WriteRegDW(DSPCTLR,0x55,0); // dsp_ctl W99AV_WriteRegDW(DSPCTLR,0x0,0); // dsp_ctl // Chuan0.87b, Reset SP R/W point & Disable SP decoding & Disable SP irq in order to avoid unknow sp irq. W99AV_Command1(COMMAND_SNVADR, CMDARG_SNVADR); W99AV_WriteRegDW(PCR,(WORD)(__wW99AVPCRLow|0x1070), __wW99AVPCRHigh); W99AV_WriteRegDW(PCR,(WORD)(__wW99AVPCRLow|0x20), __wW99AVPCRHigh); // normal state //DVD016-1 W99AV_Command1(COMMAND_PLAY, 0xFFFF); W99AV_WriteRegDW(PCR,__wW99AVPCRLow, __wW99AVPCRHigh); // normal state // TCC046#ifdef INPUT_PATH_HOSTIF
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