📄 amp.c
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// ********************************************************************************
// AMP.C : AMP module is used to program all kinds of digital and analog amplifier
// -----------------------------------------------------------------------------
// Copyright (c) 2003, Cheertek Corp. All rights reserved.
// ********************************************************************************
#include "winav.h"
#include "hal.h"
#include "chips.h"
#include "cc.h"
#include "Avsys.h"
#include "initial.h"
#include "amp.h"
#ifdef SUPPORT_AV_SYSTEM
// Follow are the begining of variables declare
BYTE bChannelCount, bEQCount;
BYTE bDDXI2CBitCount, bDDXI2CByteCount;
BYTE _bAMPTemp, _bAMPTemp1;
// Follow are the extern variables from othe modules
extern BYTE _bSampleFreq ; // LLY.160a
extern WORD _wSampleRate; // keep sample rate for specify Audio DAC
extern WORD _wBitResolution;
extern BYTE __bACHN;
extern BYTE _REG[26];
#if AMP_VOLUME_SOURCE == ANALOG_WM8746
BYTE code aVolumeMap[15]={0x0, 160, 200, 206, 209, 212, 215, 218, 221, 224, 227, 229, 231, 233, 235};
// wyc.278, mapping table for DDX8000.
#elif AMP_VOLUME_SOURCE == DIGITAL_DDX8000 //
// wyc.278-3, apogee related define.
/*****************************************************************************/
/********************** For Apogge AMP Driver DDX8000 ********************/
/*****************************************************************************/
// Apogee Related Define
#define BINARY_OUTPUT_MODE /* 120W uses this flag, 325W does not use this flag */
//#define INITIAL_VOLUME_REGITER_FISRT
#define DVD_I2S_FORMAT SAI_RIGHT24_ADJ // the WORD length for Apogee.
#define ADC_I2S_FORMAT SAI_RIGHT24_ADJ
#define SPDIF_IN_I2S_FORMAT SAI_RIGHT24_ADJ
/******************************************************************
Various Defines.
*******************************************************************/
#define DDX8000_ADDR 0x30 // Apogee slave mdoe: 0x30, Apogee master mode: 0x32.
#define DDX_CONFA_REG 0x00
#define DDX_CONFB_REG 0x01
#define DDX_CONFC_REG 0x02
#define DDX_CONFD_REG 0x03
#define DDX_CONFE_REG 0x04
#define DDX_CONFF_REG 0x05
#define DDX_MMUTE_REG 0x06
#define DDX_MVOL_REG 0x07
#define DDX_CMUTE_REG 0x08
#define DDX_C1VOL_REG 0x09
#define DDX_C2VOL_REG 0x0A
#define DDX_C3VOL_REG 0x0B
#define DDX_C4VOL_REG 0x0C
#define DDX_C5VOL_REG 0x0D
#define DDX_C6VOL_REG 0x0E
#define DDX_C7VOL_REG 0x0F
#define DDX_C8VOL_REG 0x10
#define DDX_C12IM_REG 0x11
#define DDX_C34IM_REG 0x12
#define DDX_C56IM_REG 0x13
#define DDX_C78IM_REG 0x14
#define DDX_C1234LS_REG 0x15
#define DDX_C5678LS_REG 0x16
#define DDX_L1AR_REG 0x17
#define DDX_L1ART_REG 0x18
#define DDX_L2AR_REG 0x19
#define DDX_L2ART_REG 0x1A
#define DDX_TONE_REG 0x1B
#define DDX_CFADDR_REG 0x1C
#define DDX_B2CF1_REG 0x1D
#define DDX_B2CF2_REG 0x1E
#define DDX_B2CF3_REG 0x1F
#define DDX_B0CF1_REG 0x20
#define DDX_B0CF2_REG 0x21
#define DDX_B0CF3_REG 0x22
#define DDX_A2CF1_REG 0x23
#define DDX_A2CF2_REG 0x24
#define DDX_A2CF3_REG 0x25
#define DDX_A1CF1_REG 0x26
#define DDX_A1CF2_REG 0x27
#define DDX_A1CF3_REG 0x28
#define DDX_B1CF1_REG 0x29
#define DDX_B1CF2_REG 0x2A
#define DDX_B1CF3_REG 0x2B
#define DDX_CFUD_REG 0x2C
#define DDX_RES1_REG 0x2D
#define DDX_RES2_REG 0x2E
#define DDX_RES3_REG 0x2F
#define DDX_RES4_REG 0x30
/* Channel 1,2,3,4,5,6,7,8 mapping */
#ifdef BINARY_OUTPUT_MODE
#ifdef DDX8228_BOARD_V10
#define DDX_LEFT_VOLUME_REG DDX_C3VOL_REG // DDX_C7VOL_REG/* Samantha */
#define DDX_RIGHT_VOLUME_REG DDX_C5VOL_REG
#define DDX_SUR_LEFT_VOLUME_REG DDX_C4VOL_REG
#define DDX_SUR_RIGHT_VOLUME_REG DDX_C2VOL_REG
#define DDX_CENTER_VOLUME_REG DDX_C1VOL_REG
#define DDX_SUBWOOFER_VOLUME_REG DDX_C6VOL_REG
#define DDX_HEADPHONE_LEFT_VOLUME_REG DDX_LEFT_VOLUME_REG
#define DDX_HEADPHONE_RIGHT_VOLUME_REG DDX_RIGHT_VOLUME_REG
#else /* for x2 version of DDX-8228 Board */
#define DDX_LEFT_VOLUME_REG DDX_C1VOL_REG
#define DDX_RIGHT_VOLUME_REG DDX_C3VOL_REG
#define DDX_SUR_LEFT_VOLUME_REG DDX_C4VOL_REG
#define DDX_SUR_RIGHT_VOLUME_REG DDX_C2VOL_REG
#define DDX_CENTER_VOLUME_REG DDX_C5VOL_REG
#define DDX_SUBWOOFER_VOLUME_REG DDX_C6VOL_REG
#define DDX_HEADPHONE_LEFT_VOLUME_REG DDX_LEFT_VOLUME_REG
#define DDX_HEADPHONE_RIGHT_VOLUME_REG DDX_RIGHT_VOLUME_REG
#endif
#else
#define DDX_LEFT_VOLUME_REG DDX_C1VOL_REG
#define DDX_RIGHT_VOLUME_REG DDX_C2VOL_REG
#define DDX_SUR_LEFT_VOLUME_REG DDX_C3VOL_REG
#define DDX_SUR_RIGHT_VOLUME_REG DDX_C4VOL_REG
#define DDX_CENTER_VOLUME_REG DDX_C5VOL_REG
#define DDX_SUBWOOFER_VOLUME_REG DDX_C6VOL_REG
#define DDX_HEADPHONE_LEFT_VOLUME_REG DDX_LEFT_VOLUME_REG
#define DDX_HEADPHONE_RIGHT_VOLUME_REG DDX_RIGHT_VOLUME_REG
#endif
/* Bit of register definition */
/* Configuration register A */
#define FS_128 0x04
#define FS_192 0x0a
#define FS_256 0x03
#define FS_384 0x02
#define FS_512 0x01
#define FS_768 0x00
#define IR_32K_44K1_48K (0x00 << 3)
#define IR_88K2_96K (0x01 << 3)
#define IR_176K4_192K (0x02 << 3)
#define BME 0x20
#define HPE 0x40
#define MPC 0x80
/* Configuration register B */
#define DSPB 0x01 /* DSP bypass */
#define ZDE 0x02 /* Zero detect mute enable */
#define SAI_I2S (0 << 2)
#define SAI_LEFT_ADJ (1 << 2)
#define SAI_RIGHT16_ADJ (2 << 2)
#define SAI_RIGHT18_ADJ (3 << 2)
#define SAI_RIGHT20_ADJ (4 << 2)
#define SAI_RIGHT24_ADJ (5 << 2)
#define SAI_RES1 (6 << 2)
#define SAI_RES2 (7 << 2)
#define SAIFB_LSB 0x20
#define SAIFB_MSB 0x00
#define ZCE 0x40
#define DRC 0x80 /* DRC Enable */
/* Configuration register C */
#define HPB 0x80 /* Bypass internal AC coupling digital high-pass filter */
/* Configuration register D */
#define C12BO 0x01 /* Channel 1,2 binary output mode */
#define C34BO 0x02 /* Channel 3,4 binary output mode */
#define C56BO 0x04 /* Channel 5,6 binary output mode */
#define C78BO 0x08 /* Channel 7,8 binary output mode */
#define CLKO_903168_441KHZ 0x00
#define CLKO_98304_48KHZ 0x00
#define PSL 0x40
#define BQL 0x80
/* Configuration register E */
#define MIXE 0x01 /* Adjacent channel mixing is disabled */
#define VOLEN 0x02 /* Volume and dynamics control is enabled */
#define DEMP 0x04 /* De-emphassis is enable */
#define SAO_I2S (0 << 3)
#define SAO_LEFT_ADJ (1 << 3)
#define SAO_RIGHT16_ADJ (2 << 3)
#define SAO_RIGHT18_ADJ (3 << 3)
#define SAO_RIGHT20_ADJ (4 << 3)
#define SAO_RIGHT24_ADJ (5 << 3)
#define SAO_RES1 (6 << 3)
#define SAO_RES2 (7 << 3)
#define SAOFB_LSB 0x40 /* LSB first */
#define SAOFB_MSB 0x00 /* MSB first */
/* Configuration register F */
#define PWMD 0x01 /* No PWM output */
#define SID 0x02 /* No I2S output - serial interface */
#define COD 0x04 /* No clock output */
#define AME 0x08 /* AM reduction mode DDX operation */
#define EAPD 0x80 /* Normal Operation */
/* Master Mute */
#define MMUTE 0x01 /* Soft mute of all channel */
/* Channel 1,2,3,4,5,6,7,8 mute */
#define C1M 0x01 /* Channel 1 mute */
#define C2M 0x02 /* Channel 2 mute */
#define C3M 0x04 /* Channel 3 mute */
#define C4M 0x08 /* Channel 4 mute */
#define C5M 0x10 /* Channel 5 mute */
#define C6M 0x20 /* Channel 6 mute */
#define C7M 0x40 /* Channel 7 mute */
#define C8M 0x80 /* Channel 8 mute */
#define MAPPING_LEFT_IN 0x00
#define MAPPING_RIGHT_IN 0x01
#define MAPPING_SURROUND_LEFT_IN 0x02
#define MAPPING_SURROUND_RIGHT_IN 0x03
#define MAPPING_CENTER_IN 0x04
#define MAPPING_SUBWOOFER_IN 0x05
#define MAPPING_HEADPHONE_LEFT_IN 0x00
#define MAPPING_HEADPHONE_RIGHT_IN 0x01
/*******************************************************************/
#define MASTER_VOLUME_STEP 1
#define MASTER_VOLUME_MUTE 0
// wyc.278-3
//#define MAX_VOLUME (MAX_ALL_CHANNEL_VOLUME & 0xff)
//#define MIN_VOLUME (MIN_ALL_CHANNEL_VOLUME & 0xff)
#define VOLUME_STEP (MASTER_VOLUME_STEP & 0xff)
#define VOLUME_MUTE (MASTER_VOLUME_MUTE & 0xff)
//#define NOT_INITIALIZED -1
//#define INIT_BASS_GAIN 0x07
//#define INIT_TREBLE_GAIN 0x07
#define POWERDOWN 1
#define NORMAL_POWER 0
#define POWERDOWN_DDX 0xb00e
#define NO_POWERDOWN_DDX 0x000e
#define VRA_DATA 0x01c0
#define SUCCESS 0
#define FAILURE -1
BYTE code aVolumeMap[] = { // KCHong, redefine volume table, 278b-Mustek
// 0 to -Infinity (Mute) in 32 steps
#ifdef BINARY_OUTPUT_MODE
0xff, 0x78, 0x70, 0x68, 0x60, 0x58, 0x50, 0x48, 0x40, 0x3c, 0x38, // MU, -60, -56, -52, -48, -44, -40, -36, -32, -30, -28
0x34, 0x30, 0x2c, 0x28, 0x24, 0x20, 0x1e, 0x1c, 0x1a, 0x18, 0x16, // -26, -24, -22, -20, -18, -16, -15, -14, -13, -12, -11
0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x00 // -10, -9, -8, -7, -6, -5, -4, -3, -2, -1, 0
#else
0xff, 0x80, 0x6a, 0x64, 0x5e, 0x58, 0x52, 0x4c, 0x46, 0x40, 0x3e,
0x3a, 0x36, 0x32, 0x2c, 0x28, 0x24, 0x20, 0x1e, 0x1c, 0x1a, 0x18,
0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x00
#endif
};
BYTE code aPerVolume[] = {
0x24, 0x22, 0x20, 0x1e, 0x1c, 0x1a, 0x18, 0x16, 0x14, 0x12, 0x10, 0x0e, 0x0c // 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18
};
BYTE code aLFEVolume[]={
0x18, 0x16, 0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x00 // 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24
};
BYTE code aDDXPreScaleMap[][3]={
{0x80, 0x00, 0x00}, // STANDARD
{0xaf, 0x3c, 0xcb}, // CLASSICAL
{0xaf, 0x3c, 0xcb}, // ROCK
{0xaf, 0x3c, 0xcb}, // JAZZ
{0xaf, 0x3c, 0xcb}, // ACOUSTIC
{0xaf, 0x3c, 0xcb}, // POP
{0xaf, 0x3c, 0xcb}}; // USER DEFINED
BYTE code aDDXBiquadMap[][60]={
{0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // STANDARD, Biquad 1
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // STANDARD, Biquad 2
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // STANDARD, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // STANDARD, Biquad 4
{0x7f, 0x5f, 0x72, 0x40, 0x04, 0x9d, 0x80, 0x97, 0x53, 0x7f, 0xb3, 0xa3, 0x80, 0x4c, 0x5d, // CLASSICAL, Biquad 1
0x7a, 0x53, 0xbd, 0x41, 0x59, 0xcb, 0x82, 0xf8, 0xab, 0x7e, 0x71, 0xcd, 0x81, 0x8e, 0x33, // CLASSICAL, Biquad 2
0x54, 0x8f, 0x22, 0x42, 0x7d, 0x5a, 0xa6, 0x76, 0x28, 0x5e, 0x32, 0x69, 0xa1, 0xcd, 0x97, // CLASSICAL, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // CLASSICAL, Biquad 4
{0x7f, 0xd3, 0xc6, 0x40, 0x06, 0x31, 0x80, 0x1f, 0xd6, 0x7f, 0xf0, 0x0d, 0x80, 0x0f, 0xf3, // ROCK, Biquad 1
0x7f, 0xe1, 0x6b, 0x40, 0x04, 0x48, 0x80, 0x16, 0x04, 0x7f, 0xf4, 0xea, 0x80, 0x0b, 0x16, // ROCK, Biquad 2
0x7e, 0x93, 0xdf, 0x3f, 0xc3, 0x81, 0x81, 0xe5, 0x1f, 0x7f, 0x0b, 0x9f, 0x80, 0xf4, 0x61, // ROCK, Biquad 3
0x36, 0x10, 0x2a, 0x58, 0xab, 0x81, 0x98, 0x98, 0xd2, 0x6e, 0x59, 0xad, 0x91, 0xa6, 0x53}, // ROCK, Biquad 4
{0x7d, 0x94, 0x2b, 0x40, 0x85, 0x6b, 0x81, 0x60, 0xfe, 0x7f, 0x4b, 0xae, 0x80, 0xb4, 0x52, // JAZZ, Biquad 1
0x78, 0x7d, 0x3b, 0x41, 0x9d, 0xe1, 0x84, 0x47, 0x02, 0x7d, 0xb7, 0x46, 0x82, 0x48, 0xba, // JAZZ, Biquad 2
0x6a, 0x12, 0x90, 0x3d, 0x84, 0xe9, 0x9a, 0xe3, 0x9c, 0x70, 0x03, 0xef, 0x8f, 0xfc, 0x11, // JAZZ, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // JAZZ, Biquad 4
{0x7f, 0xb8, 0xfe, 0x3f, 0xfb, 0xee, 0x80, 0x4f, 0x26, 0x7f, 0xd8, 0x4e, 0x80, 0x27, 0xb2, // ACOUSTIC, Biquad 1
0x78, 0x47, 0xaa, 0x3d, 0x8d, 0x58, 0x8c, 0x9d, 0xa5, 0x79, 0xa0, 0x66, 0x86, 0x5f, 0x9a, // ACOUSTIC, Biquad 2
0x52, 0xb8, 0x27, 0x3c, 0x20, 0xe9, 0xb5, 0x06, 0x06, 0x56, 0x80, 0x6f, 0xa9, 0x7f, 0x91, // ACOUSTIC, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // ACOUSTIC, Biquad 4
{0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // POP, Biquad 1
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // POP, Biquad 2
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // POP, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // POP, Biquad 4
{0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // USER DEFINED, Biquad 1
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // USER DEFINED, Biquad 2
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // USER DEFINED, Biquad 3
0x00, 0x00, 0x00, 0x3f, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}};// USER DEFINED, Biquad 4
BYTE code aDDXBiquad5Map[][15]={
{0x7f, 0x8e, 0x71, 0x3f, 0xc7, 0x38, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x80, 0x71, 0x8f}, // Channel 1 - Biquad 5
{0x7f, 0x8e, 0x71, 0x3f, 0xc7, 0x38, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x80, 0x71, 0x8f}, // Channel 2 - Biquad 5
{0x7f, 0x8e, 0x71, 0x3f, 0xc7, 0x38, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x80, 0x71, 0x8f}, // Channel 3 - Biquad 5
{0x7f, 0x8e, 0x71, 0x3f, 0xc7, 0x38, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x80, 0x71, 0x8f}, // Channel 4 - Biquad 5
{0x7f, 0x8e, 0x71, 0x3f, 0xc7, 0x38, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x80, 0x71, 0x8f}, // Channel 5 - Biquad 5
{0x00, 0x00, 0x32, 0x00, 0x00, 0x19, 0x80, 0xe2, 0xb9, 0x7f, 0x8e, 0x3e, 0x00, 0x00, 0x32}};// Channel 6 - Biquad 5
#else
BYTE code aVolumeMap[1]={0x0};
#endif // AMP_VOLUME_SOURCE
// KCHong
BYTE code aVolumeMapDAC[]= {
0x00, 0x07, 0x10, 0x17, 0x20, 0x27, 0x30, 0x37, 0x40, 0x47, 0x50,
0x57, 0x60, 0x67, 0x70, 0x77, 0x80, 0x87, 0x90, 0x97, 0xa0, 0xa7,
0xb0, 0xb7, 0xc0, 0xc7, 0xd0, 0xd7, 0xe0, 0xe7, 0xf0, 0xf7, 0xff
};
BYTE _AMP_GetVolumeDegree(BYTE bVolume);
BYTE _AMP_CombineMainPerVol(BYTE bAudioChannel);
void _AMP_WriteReg(void);
void _AMP_ReadReg(void);
// wyc2.80, because AMP module will reference these function code, so we need to put it in header file for other module to reference.
void PCM1723_Write(WORD wReg);
void _GetSampleFreq(BYTE bDACType, BYTE bSampleFreq);
// wyc2.80, add define to protect comipler error when DAC not use WM8746
#if AUDIO_DAC == DAC_WM8746 //hwtan 5.9
void WM8746_Write(void);
#endif //
#endif // #ifdef SUPPORT_AV_SYSTEM
#ifdef SUPPORT_AV_SYSTEM
// wyc.278a, integrated into one function to support format converting.
void AMP_SetDataFormat(BYTE bFormat)
{
#if AMP_VOLUME_SOURCE == ANALOG_WM8746
if (bFormat == FORMAT_RIGHT24BIT)
{
_wBitResolution = 0x0620 ; //0000011
WM8746_Write();
}
else if (bFormat == FORMAT_I2S)
{
_wBitResolution = 0x0601 ; //0000011
WM8746_Write();
}
#elif AMP_VOLUME_SOURCE == DIGITAL_DDX8000
if (bFormat == FORMAT_RIGHT24BIT)
{
// wyc.278a-1, need to program ACLK for different audio format by titles.
_GetSampleFreq(HAL_DAC_PCM1723, _bSampleFreq);
PCM1723_Write(_wSampleRate);
_REG[0]=3;
_REG[1]=DDX8000_ADDR; // Modified by KCHong, 20021206
_REG[2]=DDX_CONFB_REG;
_REG[3]=ZCE + SAIFB_MSB + DVD_I2S_FORMAT + ZDE;
_AMP_WriteReg();
}
else if (bFormat == FORMAT_I2S)
{
// wyc.278a-1, need to program ACLK to 16.9344M for different audio format.
_wSampleRate = 0x0600 ; // bit[7:4]=0000;
_wSampleRate |= 0x1;
PCM1723_Write(_wSampleRate);
_REG[0]=3;
_REG[1]=DDX8000_ADDR; // Modified by KCHong, 20021206
_REG[2]=DDX_CONFB_REG;
_REG[3]=ZCE + SAIFB_MSB + ZDE;
_AMP_WriteReg();
}
#endif // AMP_VOLUME_SOURCE
}
BYTE AMP_PowerControl(BYTE baram)
{
return FALSE;
}
void AMP_Initial(void) // Updated initial function, 278b-Mustek
{
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