📄 hal1.c
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#if CPU_SPEED == CPU_49M
c = 7; // T~=10uS for 49.5MHZ CPU
#endif
#if CPU_SPEED == CPU_48M
c = 7; // T~=10uS for 48MHZ CPU
#endif
#if CPU_SPEED == CPU_34M
c = 5; // T~=10uS for 33.8638MHZ CPU
#endif
#if CPU_SPEED == CPU_33M
c = 5; // T~=10uS for 33MHZ CPU
#endif
#if CPU_SPEED == CPU_40M
c = 6; // T~=10uS for 40.5MHZ CPU
#endif
#if CPU_SPEED == CPU_27M
c = 4; // T~=10uS for 40.5MHZ CPU
#endif
#if CPU_SPEED == CPU_24M // Added by KCHung 890906
c = 4; // T~=10uS for 24MHZ CPU
#endif
#if CPU_SPEED == CPU_12M
c = 2; // T~=10uS for 40.5MHZ CPU
#endif
while (c-- != 0);
}
//Kevin0.83, add
#if AUDIO_DAC == DAC_PCM1723_WM8746
void _ProgramAudioDAC(BYTE bSampleFreq)
{
#define PIN_CS8746 0x04 //P5^2
#define PIN_CS1723 0x08 //P5^3
#define PIN_SCK 0x10 //P5^4
#define PIN_SDA 0x20 //P5^5
// Chuan0.83b-2, Programming PCM1723_WM8746 under IO_PCI case
#if IO == IO_PCI
//// PCM1723 /////
// Step 1: get sample rate & bit resolution
_GetSampleFreq(HAL_DAC_PCM1723, bSampleFreq);
// Step 2: Set ACLK for audio DAC to match specify sample rate -- LLY.160a
_ProgramDACACLKInput();
// Step 3: set sample rate & bit resolution for specify Audio DAC
// Init Audio Dac1
//__dwHAL1Temp = (PIN_CS1723|PIN_SCK|PIN_SDA); //PH cs/clk/data
__dwHAL1P5 |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //PH cs/clk/data
__dwHAL1P5CON |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //output mode
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
W99AV_OutIndex(0x700000AF); //SFR P5CON
//Kevin0.87, Slove the bo-noise when KEY_PREV/KEY_NEXT
//always set output mode & PH 1723/8746 CS;
//otherwise, the other CS may be unknown in input mode (circuit not pull high)
//W99AV_OutData(PIN_CS1723|PIN_SCK|PIN_SDA); //output mode
W99AV_OutData(__dwHAL1P5CON);
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
// write Reg2
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wSampleRate >> (15 - __bHAL1Tmp1)) & 0x01)
{
__dwHAL1P5 |= PIN_SDA; //PH data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
else
{
__dwHAL1P5 &= ~PIN_SDA; //PL data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
// Activate 1723
__dwHAL1P5 &= ~PIN_CS1723; //PL cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_CS1723; //PH cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
// write Reg3
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wBitResolution >> (15 - __bHAL1Tmp1)) & 0x01)
{
__dwHAL1P5 |= PIN_SDA; //PH data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
else
{
__dwHAL1P5 &= ~PIN_SDA; //PL data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
// Activate 1723
__dwHAL1P5 &= ~PIN_CS1723; //PL cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_CS1723; //PH cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
///// WM8746 /////
// Step 1: get sample rate
_GetSampleFreq(HAL_DAC_WM8746, bSampleFreq);
// Step 2: set sample rate
// Init Audio Dac2
//__dwHAL1Temp = (PIN_CS8746|PIN_SCK|PIN_SDA); //PH cs/clk/data
__dwHAL1P5 |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //PH cs/clk/data
__dwHAL1P5CON |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //output mode
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
W99AV_OutIndex(0x700000AF); //SFR P5CON
//Kevin0.87, Slove the bo-noise when KEY_PREV/KEY_NEXT
//always set output mode & PH 1723/8746 CS;
//otherwise, the other CS may be unknown in input mode (circuit not pull high)
//W99AV_OutData(PIN_CS8746|PIN_SCK|PIN_SDA); //output mode
W99AV_OutData(__dwHAL1P5CON);
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
// write Reg0000011
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wBitResolution >> (15 - __bHAL1Tmp1)) & 0x01)
{
__dwHAL1P5 |= PIN_SDA; //PH data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
else
{
__dwHAL1P5 &= ~PIN_SDA; //PL data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
// Activate 8746
__dwHAL1P5 &= ~PIN_CS8746; //PL cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_CS8746; //PH cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
#ifdef SUPPORT_AUDIO_DEEMPHASYS
if (__bHAL1_Deemphasis)
{
_wBitResolution = 0x0522; //use _wBitResolution as reg value to be written
}
else
#endif
_wBitResolution = 0x0520;
// write Reg0000010
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wBitResolution >> (15 - __bHAL1Tmp1)) & 0x01)
{
__dwHAL1P5 |= PIN_SDA; //PH data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
else
{
__dwHAL1P5 &= ~PIN_SDA; //PL data
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
__dwHAL1P5 &= ~PIN_SCK; //PL clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_SCK; //PH clock
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
}
// Activate 8746
__dwHAL1P5 &= ~PIN_CS8746; //PL cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
__dwHAL1P5 |= PIN_CS8746; //PH cs
W99AV_OutIndex(0x700000A7); //SFR P5
W99AV_OutData(__dwHAL1P5);
#else //#if IO == IO_PCI
// Chuan0.83b-2, Programming PCM1723_WM8746 under IO_8051 case
//// PCM1723 /////
// Step 1: get sample rate & bit resolution
_GetSampleFreq(HAL_DAC_PCM1723, bSampleFreq);
// Step 2: Set ACLK for audio DAC to match specify sample rate -- LLY.160a
_ProgramDACACLKInput();
// Step 3: set sample rate & bit resolution for specify Audio DAC
//Kevin0.87, Slove the bo-noise when KEY_PREV/KEY_NEXT
//always set output mode & PH 1723/8746 CS;
//otherwise, the other CS may be unknown in input mode (circuit not pull high)
//P5CON |= (PIN_CS1723|PIN_SCK|PIN_SDA); //output mode
P5 |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //PH cs/clk/data
P5CON |= (PIN_CS1723|PIN_CS8746|PIN_SCK|PIN_SDA); //output mode
P5 &= ~PIN_SCK; //PL clock
P5 |= PIN_SCK; //PH clock
// write Reg2
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wSampleRate >> (15 - __bHAL1Tmp1)) & 0x01)
{
P5 |= PIN_SDA; //PH data
}
else
{
P5 &= ~PIN_SDA; //PL data
}
P5 &= ~PIN_SCK; //PL clock
P5 |= PIN_SCK; //PH clock
}
// Activate 1723
P5 &= ~PIN_CS1723; //PL cs
P5 |= PIN_CS1723; //PH cs
// write Reg3
for (__bHAL1Tmp1=0; __bHAL1Tmp1<16; __bHAL1Tmp1++)
{
if ((_wBitResolution >> (15 - __bHAL1Tmp1)) & 0x01)
{
P5 |= PIN_SDA; //PH data
}
else
{
P5 &= ~PIN_SDA; //PL data
}
P5 &= ~PIN_SCK; //PL clock
P5 |= PIN_SCK; //PH clock
}
// Activate 1723
P5 &= ~PIN_CS1723; //PL cs
P5 |= PIN_CS1723; //PH cs
///// WM8746 /////
// Step 1: get sample rate
_GetSampleFreq(HAL_DAC_WM8746, bSampleFreq);
// Step 2: set sample rate
// Init Audio Dac2
//Kevin0.87, Slove the bo-noise when KEY_PREV/KEY_NEXT
//always set output mode & PH 1723/8746 CS;
//otherwise, the other CS may be unknown in input mode (circuit not pull high)
//P5CON |= (PIN_CS8746|PIN_SCK|PIN_SDA); //output mode
//P5 |= (PIN_CS8746|PIN_SCK|PIN_SDA);
P5 |= (PIN_CS1723
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