📄 w99av.h
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#define W99AV_RESET_ALL 2
#define W99AV_RESET_CDIF 3
#define W99AV_RESET_PARSER 4
#define W99AV_RESET_KC 5
#define W99AV_RESET_IBF 6
// LLY.160a, remove this case because IC don't support it
//#define W99AV_RESET_IAF 7
#define W99AV_RESET_VD W99AV_RESET_VIDEO
#define W99AV_RESET_VO 9
#define W99AV_RESET_HBI 10
#define W99AV_RESET_TOTALRST 11 // Chuan0.91, PCR[8]
#define W99AV_RESET_TOTAL 12
#define W99AV_RESET_GENERAL W99AV_RESET_TOTAL
#define W99AV_RESET_ATAPI 13
//*****************************************************
//*****************************************************
// define for interrupt
#define INT_FERR 0x000001
#define INT_BERR 0x000002
#define INT_IFD 0x000004
#define INT_IFSC 0x000008
#define INT_VERR 0x000010
#define INT_CACK 0x000020
#define INT_VSYNC 0x000040
#define INT_VO 0x000080
#define INT_VU 0x000100
#define INT_AO 0x000200
#define INT_AU 0x000400
#define INT_BSFREQ 0x000800
#define INT_ETE 0x001000
#define INT_CDF 0x002000
#define INT_ERRS 0x004000
#define INT_RISC_RD_RDY 0x008000
#define INT_RISC_WR_OK 0x010000
#define INT_CMD_DONE 0x020000
#define INT_DMA_DONE 0x040000
#define INT_DMA_COUNT_DONE 0x800000
#define INT_NEW_NV 0x080000
#define INT_HLI 0x100000
#define INT_AINT 0x200000
#define INT_PIO_COUNT_DONE 0x400000
// Added by MICKY
#define INT_ECC 0x002000 // same as CDF, CD finished
#define INT_ERR 0x004000
//*****************************************************
//*****************************************************
// define the index of macro command
#define COMMAND_NOCMD 0x00 // Invalid Command
#define COMMAND_PLAY 0x01 // Normal Play Forward
#define COMMAND_STEP 0x02 // rename to COMMAND_SFF in W9926QF
#define COMMAND_FAST 0x03 // Fast Motion Forward
#define COMMAND_SLOW 0x04 // Slow Motion Forward
#define COMMAND_SCAN 0x05
#define COMMAND_DIGEST COMMAND_SCAN
//#define COMMAND_PAUSE COMMAND_STEP // implemented by Command Step
#define COMMAND_PAUSE 0x06
#define COMMAND_STOP COMMAND_STEP // implemented by Command Step
#define COMMAND_WDRAM 0x08 // Write DRAM
//#define COMMAND_RCDH 0x08 // Chuan.908, MicroCode only return
//#define COMMAND_SCDRD 0x08 // Chuan.908, MicroCode only return
#define COMMAND_SACR 0x08 // Set Audio Configuration Register
#define COMMAND_SAVCR 0x08 // Set Audio Volume Configuration Register
//#define COMMAND_SDVDR 0x08 // Chuan.908, MicroCode only return
//#define COMMAND_RCISNR 0x08 // Chuan.908, MicroCode only return
#define COMMAND_RDRAM 0x08 // Read DRAM
#define COMMAND_ACCREG 0x08 // Access Register
#define COMMAND_URAMRST 0x08 // Clear the Content of URAM to all Zeros
#define COMMAND_SCDIF 0x08 // Set CDIF Control Registers
//#define COMMAND_WRQ 0x0A // Chuan.908, MicroCode only return
//#define COMMAND_WCP 0x0B // Chuan.908, MicroCode only return
//#define COMMAND_RRQ 0x0C // Chuan.908, MicroCode only return
// Micky0.82, as PSFB command fail, set as 0xFF
// Micky0.86, support PSFB from 6/17 risc code
#define COMMAND_PSFB 0x0D // PreSet Frame Buffer
#define COMMAND_CLB COMMAND_PSFB // same as COMMAND_PSFB
#define COMMAND_SVC1 0x0E // Set Video Display Parameters Command
#define COMMAND_SVC2 0x0E // Set Video Configuration Command
#define COMMAND_SBTCR 0x0E // Set Button Color Register of VCD 3.0
#define COMMAND_SFADR 0x0E // Set Fading Control Register
#define COMMAND_SLUMCR 0x0E // Set Luminance Control Register
#define COMMAND_SPARCR 0x0E // Set Parser Control Register
#define COMMAND_SCONADJR 0x0E // Set Contrast Adjustment
#define COMMAND_DSP_INIT 0x0E // DSP Initialization
#define COMMAND_SBTAR 0x0E // Set Button Area of VCD 3.0
#define COMMAND_RMBCNT 0x0E // Read MacroBlock Count
//#define COMMAND_RHEADER 0x0E // Chuan.908, MicroCode only return
#define COMMAND_SSPRL0 0x0E // Set RL0 for Sub-picture decode
#define COMMAND_SSPRL1 0x0E // Set RL1 for Sub-picture decode
#define COMMAND_RDEBUGINFO 0x0E // Read Debugging Information
#define COMMAND_RDM 0x0E // Read DSP DMRAM data, ref. technote #5
#define COMMAND_WDM 0x0E // Write DSP DMRAM data
#define COMMAND_DEC_KEY 0x0E // Decryped Keys
#define COMMAND_CHAL_RES_KEY 0x0E // Chanllenge & Respond Keys
#define COMMAND_BUS_AUTH 0x0E // Bus Authentication
#define COMMAND_SNVADR 0x0E // Set NV/RTI/SP Buffer Addresses Command
#define COMMAND_FVBIDISP 0x0E // Force VBI to Start Frame Buffer Display
//LJY1.11, for CDDA anti-shock
#define COMMAND_CDDA_ANTISHOCK 0x0E // Enlarge CDDA buffer
// Brian1.21, for set frame buffer address
#define COMMAND_SET_FRAME_BUF 0x0E
//LJY1.26, for CDDAT supporting
#define COMMAND_RESET_NV_WRITE_PTR 0x0E
#define COMMAND_JPEG 0x1D
//LJY1.10, for CDG
#define COMMAND_CDG COMMAND_JPEG
// wyc1.07, add a new command ID to soft reset RISC.
#define COMMAND_SOFT_RESET_RISC 0x0E
#define COMMAND_CLIP 0x0F // rename COMMAND_PCP by W9926QF
#define COMMAND_PCP COMMAND_CLIP // Picture Clipping Command
#define COMMAND_SAVBS 0x10 // Set A/V Buffer Size Command
#define COMMAND_RAVBR 0x11 // Set A/V Buffer Remainder Command
#define COMMAND_WPXL 0x13
#define COMMAND_FFIFO 0x14 // Push Data to Parser AC/VC/SP/NV FIFO
#define COMMAND_SABS 0x16 // Set Audio Bitstream Buffer Command
#define COMMAND_NEWSTC 0x18 // Inform RISC Micro-Code to Update STC
#define COMMAND_HLI 0x1A // High Light Command
#define COMMAND_DRAMCOPY 0x1C // DRAM Copy Command
#define COMMAND_CHECKSUM 0x1C // Chuan1.11, CHECKSUM Command
//*****************************************************
//*****************************************************
// define the argument of marco command
//#define CMDARG_RCDH 0x0100 // Chuan.908, MicroCode only return
//#define CMDARG_SCDRD 0x0200 // Chuan.908, MicroCode only return
#define CMDARG_SACR 0x0300
#define CMDARG_SAVCR 0x0400
//#define CMDARG_SDVDR 0x0500 // Chuan.908, MicroCode only return
//#define CMDARG_RCISNR 0x0600 // Chuan.908, MicroCode only return
#define CMDARG_RDRAM 0x0700
#define CMDARG_ACCREG 0x0800
#define CMDARG_URAMRST 0x0900
#define CMDARG_SCDIF 0x0B00
//#define CMDARG_RRQ 0x0000 // Chuan.908, MicroCode only return
#define CMDARG_PSFB 0x0000
#define CMDARG_CLB COMARG_PSFB
#define CMDARG_SVC1 0x0000
#define CMDARG_AUDIO 0x0001
#define CMDARG_SVC2 0x0002
#define CMDARG_SBTCR 0x0003
#define CMDARG_SFADR 0x0004
#define CMDARG_SLUMCR 0x0005
#define CMDARG_SPARCR 0x0006
#define CMDARG_SCONADJR 0x0007
#define CMDARG_DSP_INIT 0x0008
#define CMDARG_SBTAR 0x0009
#define CMDARG_RMBCNT 0x000A
//LJY1.26, for CDDAT supporting
#define CMDARG_RESET_NV_WRITE_PTR 0x0B
//#define CMDARG_RHEADER 0x000E
#define CMDARG_SSPRL0 0x0010
#define CMDARG_SSPRL1 0x0011
#define CMDARG_RDEBUGINFO 0x0012
#define CMDARG_RDM 0x0013
#define CMDARG_WDM 0x0014
#define CMDARG_DEC_KEY 0x0015 // Decryped Keys
#define CMDARG_CHAL_RES_KEY 0x0016 // Chanllenge & Respond Keys
#define CMDARG_BUS_AUTH 0x0017 // Bus Authentication
#define CMDARG_SNVADR 0x0018
#define CMDARG_FVBIDISP 0x001A
//LJY1.11, for CDDA anti-shock
#define CMDARG_CDDA_ANTISHOCK 0x001C
// Brian1.21, for set frame buffer address
#define CMDARG_SET_FRAME_BUF 0x001D
#define CMDARG_DRAMCOPY 0x0000
#define CMDARG_FILLRECT 0x0000
#define CMDARG_BITMAPCOPY 0x0000
#define CMDARG_TEXTOUT 0x0000
//CoCo2.80a, for CT908 JPEG
#define CMDARG_JPEG_STOP_DECODE 0x0000
#define CMDARG_JPEG_PARSE_HEADER 0x0001
#define CMDARG_JPEG_DECODE 0x0002
#define CMDARG_JPEG_DISPLAY 0x0004
//LJY1.10, for CDG
#define CMDARG_CDG_DISPLAY CMDARG_JPEG_DISPLAY
#define CMDARG_CDG_RESET 0x0005
#define CMDARG_CHECKSUM 0x0005 // Chuan1.11, CHECKSUM arg
//*****************************************************
// Chuan1.10, Move out all DRAM/DM definition and include the header file at here.
#include "RAMDef.h"
// write the highlight group start address
#define W99AV_UPDATE_SEQUENCE_COUNT 0x80000
#define W99AV_UPDATE_SEQUENCE_LIMIT 0x50000
//*****************************************************
#ifdef SUPPORT_AUTO_UPGRADE
// Chuan0.86, [0x5000]: FLASH.BIN, [0xB0000]: CT908.BIN
#define W99AV_FLASH_DRAMADDR 0x5000L // Chuan 172r 2002/03/18: Fill auto-upgrade procedure into the DRAM address.
#define W99AV_FLASH_DRAMADDR_SERIALONLY 0x5000L
#if (SDRAM_CONFIGURATION == SDRAM_64M)
#define W99AV_UPGRADE_DRAMADDR 0xB6800L // alex2.27,Bank 0, 1 ,2 , 3 ok
#elif (SDRAM_CONFIGURATION == SDRAM_32M)
#define W99AV_UPGRADE_DRAMADDR 0x130000L // alex2.27,Bank 0 , Bank 2 ok
#elif (SDRAM_CONFIGURATION == SDRAM_32M_D)
#define W99AV_UPGRADE_DRAMADDR 0xB6800L // alex2.27,Bank 0 , Bank 1 ok
#elif (SDRAM_CONFIGURATION == SDRAM_16M)
//alex2.32 Fix Upgrade UI Error ,Change Upgrade Address
#define W99AV_UPGRADE_DRAMADDR 0x1A600L // alex2.30,fix the upgrade address for 16M dram
#endif
#define FLASH_TYPE_4M 0
#define FLASH_TYPE_8M 1
#endif
//*****************************************************
//*******************************************************
// define DSP Format
#if DSP_FORMAT == DSP_I2S
#define CICR_VALUE 0x101
// LLY.023 for CDDA setting
#define CICR_CDDA 0x91
#else // DSP_SONY
#define CICR_VALUE 0x102
// LLY.023 for CDDA setting
#define CICR_CDDA 0x92
#endif
//*******************************************************
//*****************************************************
// define FIFO size (in BYTE unit)
#define W99AV_FIFO_SIZE 64
#define W99AV_AFIFO_SIZE 32
//*****************************************************
//***************************************************************
// define audio/video buffer overflow/underflow threshold type
#define W99AV_VOVERFLOW 0
#define W99AV_VUNDERFLOW 1
#define W99AV_AOVERFLOW 2
#define W99AV_AUNDERFLOW 3
//***************************************************************
//****************************************************************
// define information type
#define W99AV_INFO_FRAME_ID 0
#define W99AV_INFO_DRAM_SHSIZE 1
#define ⌨️ 快捷键说明
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