📄 winav.h
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/**************************************************************************
(C)Copyright Cheertek Inc. 2002-2003,
D300, all right reserved
Product : Cheertek W99AV series Firmware
Chip : CT908
Date : 2001.02.26.
Author : Cheertek (D300 Micky)
Purpose : types, macro and definitions
Version 2.00
Sources : winav.h
****************************************************************************/
//////////////////////////////////////////////////////////////
// ***** Big Modification History Area *****
// Micky1.00
// - Remove W9928AF VERSION_xxx
// - Remove W9928AF related system define DVD28A_xxx/ DVD_28C_xxx.
// - Remove the CHIP_9928 related codes
#ifndef __WINAV_H__
#define __WINAV_H__
#include "platform.h"
// Micky2.36, add internal.h for cross reference between MPEG & SERVO
// must put after type define.
#include "internal.h"
////////////////////////////////////////////////
// ****** Programmer/Developer's Zone ******
////////////////////////////////////////////////
// Flash code version
//alex1.21,Support 4M W29C040
// F/W write the version to DRAM, Flash tool will check the version from DRAM.
// if flash version < F/W version, don't do the auto upgrade.
// Micky2.32a, must use flash 0.22
#define FLASH_SW_VERSION 22L // // Alex2.30, Dvd2.30, only use flash 016.bin
// Micky2.36, move to internal.h
/*
#define VERSION_AC 0x10
#define VERSION_BE 0x11
#define VERSION_AD 0x12
#define VERSION_CA 0x13 //Kevin2.26, 908S
*/
// Micky1.22, modify CHIPS_VERSION_A as CT908_A/D/MZ
//Kevin1.05-3, 908 chips version ID based on supported features
#define CT908_S 0x1
#define CT908_A 0x2 //AC3 + Antishock
#define CT908_B CT908_A
#define CT908_D 0x3 //DTS
#define CT908_M 0x4 //WMA+HDCD
#define CT908_Z 0x5 //DVD-Audio
// Micky2.36, move to internal.h
/*
// Micky1.10-2, add define for select MCCRBASE
#define PLL_360MHZ 1 // PLL run 360 MHz
#define PLL_399MHZ 2 // PLL run 399 MMz
#define PLL_436MHZ 3 // PLL run 436 MMz
// only CT908S can enable the define
#define OVER_CLOCKING // Brian2.32, define this will use 146MHz instead 133MHz
#ifdef OVER_CLOCKING // ** TCH2.33;
#define MPEG_PLL PLL_436MHZ
#else
#define MPEG_PLL PLL_399MHZ
///#define MPEG_PLL PLL_360MHZ
#endif
*/
//////////////////////////////////////
// Can define it for release
// define it, the following definitions will be Enable
// [ENABLE_PANEL_KEYSCAN];
// define it, F/W will suppport panel volume adjustment button
// [ENABLE_PANEL_VOLUME_ADJUSTMENT_BUTTON];
// define it, the following definitions will be Disable
// [_DEBUG_INFO];
//#define RELEASE_SETTING
////////////////////////////////////////////////
// ****** System Configuration Zone ******
////////////////////////////////////////////////
// Must select only one interface and others should be disable
// define it, the stream input path is from HOST_IF
//#define INPUT_PATH_HOSTIF
// define it, the stream input path is from ATAPI-IF
#define INPUT_PATH_ATAPIIF
#define BITSTREAM_ATAPIIF 1
#define BITSTREAM_DVDIF 2
#define BITSTREAM_CDIF 3
#define BITSTREAM_HOSTIF 4
//////////////////
// The main purpose is to set different peripherial
// [DECODER_SYSTEM]
#define DVD908_PCI 70
#define DVD908_EPP 71 //EPP emulator system
#define DVD908_EVAL_P2 74
#define DVD908_EVAL_P5 75
#define DVD908_P5_RF3750 76 //LJY2.37
// must choose one for the DVD system
#if IO == IO_PCI // for testing module only
// LLY2.80, add for CT908 emulator board
#ifdef IO_EPP
#define DECODER_SYSTEM DVD908_EPP
#else
#define DECODER_SYSTEM DVD908_PCI
#endif
#endif // IO_PCI
// define the sell destination for OSD language selection
// [SELL_DESTINATION]
#define CHINA 1
#define TAIWAN 2
#define HONGKONG 3
#define FRANCE 4
#define GERMANY 5
#define ITALY 6
#define SPAIN 7
#define PORTUGAL 8
#define AMERICA 9
#define BRITISH 10
#define JAPAN 11 // LLY.276-5
#define KOREA 12 // Brian1.07, Jeff 20030917 Add for Korean OSD
// set the sell region.
///#define SELL_DESTINATION CHINA
// add chip version number protect
// define the chip version number that F/W can support
// for BAE, the value should be VERSION_BAE
///#define SUPPORT_CHIP_VERSION VERSION_BBA
//////////////////////////////////////////////////////////////////////////
// LLY.171-1, define all the power on mode
// bit[0]: 1, pseudo power down; 2, total shutdown;
// It will be refered by HAL_PowerDown() & INITIAL_System()
// [IR_POWERDOWN_MODE]
// Total shutdown for MPEG chip/ PANEL/ TV Encoder/ Audio DAC
// and reserve uP and SRAM active
#define TOTAL_SHUTDOWN 0x02
// Pseudo power down mode: only turn-off some MPEG chip block, and only reserve
// three block -- VBI VCLK/ DBI SDCLK/ RISC/DBI MCLK-- PWRCR[3, 5, 12]
#define PSEUDO_SHUTDOWN 0x01 // pseudo power down mode
// The combination of hareware shutdown case : all peripheral all enter power down
// it's only for F/W reference
#define HARDWARE_SHUTDOWN 0x04 // hardware power on | total shutdown
// bit[7]: 1, enter power down mode; 0, wake-up from power down mode
#define ENTER_POWERDOWN 0x20 // enter power down mode
#define INITIAL_SYSTEM 0x10 // leave power down mode
////////////////////////////////////////
// Please define the U-P working Speed
#define CPU_40M 40500 // 40 MHz
#define CPU_12M 12000 // 12 MHz
#define CPU_16M 16625 // 16.625MHz, LJY0.83
#define CPU_24M 24000 // 24 MHz Line Insert... Added by KCHung 890825
#define CPU_27M 27000 // 27 MHz
#define CPU_48M 48000 // 48 MHz KCHung 891227
// DVD_161Micky, add two speed define
#define CPU_49M 49500 // 49.5 MHz
// LJY0.85, CT908 33M value is 33250.
// ** TCH2.33; #ifdef OVER_CLOCKING // Brian2.32
// ** TCH2.33; #define CPU_33M 36575 //36500 // 33 MHz
// ** TCH2.33; #else
#define CPU_33M 33250 //33000 // 33 MHz
// ** TCH2.33; #endif
#define CPU_34M 33863 // 33.8638MHz
#define CPU_30M 30000 // 30MHz // ** TCH2.33;
#define CPU_36M 36500 // 36.5MHz // ** TCH2.33;
// LJY0.85, add CPU_39
#define CPU_39M 39900
// Micky2.36
#if (MPEG_PLL == PLL_436MHZ)
#define DEFAULT_CPU_SPEED CPU_36M
#elif (MPEG_PLL == PLL_399MHZ)
#define DEFAULT_CPU_SPEED CPU_33M
#else
#define DEFAULT_CPU_SPEED CPU_30M
#endif
// DVD_100Micky, put customer setting into customer.h
#include "customer.h"
#ifndef CPU_SPEED
// Micky0.85, if CPU_SPPED is not defined
// default use 33M for CT908
// (equal to 49.5 on general 8051)
#if DECODER_SYSTEM >= DVD908_PCI
// for 908, default us 33M.
#define CPU_SPEED CPU_33M
#else
// for 28AF, default is 49.5M
#define CPU_SPEED CPU_49M
#endif
#endif // #ifndef CPU_SPEED
////////////////////////////////////////
// Please choose one IC.
// Must Assign the ID(TV_ENCODER_ID) as I2C ID if the IC use I2C to control.
#define TV_GENERAL 0x00 // no-need for control
#define TV_W9954 0x01
#define TV_SAA7120 0x03 //
#define TV_ADV7170 0x04 // TV encoder with YUV
#define TV_CS4954 0x05 // ** 0.40;
#define TV_AV3168 0x06 // ** 0.45;
#define I2C_ID_EEPROM 0xA0
// Please choose one kind of audio configuration
#define DAC_GENERAL 0x00
#define DAC_PCM1723_ONLY 0x01
#define DAC_PCM1723_W6630 0x02
#define DAC_W6630_ONLY 0x03 // LLY.049
#define DAC_AV2188_ONLY 0x04 // LLY.050a
#define DAC_PCM1602_ONLY 0x05 // TCC099
#define DAC_WM8746 0x06 //hwtan273
#define DAC_PCM1742 0x07 //hwtan273
#define DAC_PCM1716_ONLY 0x08 // HCC 2.73a for Mustek
#define DAC_PCM1606 0x09 //hwtan275
#define DAC_PCM1723_WM8746 0x0a //Kevin0.83
#define DAC_CS4338_ONLY 0x0b //Kevin0.90
//Kevin1.07-3, for AUDIO_ALIGN_FORMAT
#define RIGHT_ALIGN 0
#define I2S_ALIGN 1
#define LEFT_ALIGN 2
// Chuan2.80, Please choose one kind of multiples of sample rate
#define ACLK_384FS 0
#define ACLK_256FS 1
#define ACLK_192FS 2
#define ACLK_128FS 3
// LLY.160a, define the source for ACLK
// Please choose one kind of them to set ACLK source
#define MPEGCHIP 0x1
#define AUDIODAC 0x2
#define TVENCODER 0x3
// wyc.278-3
#define SERVO_ACLK_PLL 0x4 // Add by HCC for external PLL(28C-MSAV) 2002/09/09
// wyc.277a-3, define the audio volume adjustment source in AV system.
#define ANALOG_WM8746 0x1
#define DIGITAL_DDX8000 0x2
// ******************************
// SUPPORT zone for the explanation of supporting variety
// ******************************
// DVD_161Micky, support Loading-> Setup-> Exit, will continue loading action
/// #define SUPPORT_LOADING_SETUP
// DVD_104Micky, add a define for mic. control
//define it, means system support mic. on/off control pin.
/// #define SUPPORT_MIC_CONTROL
/// #define SUPPORT_MIC_CONTROL_INV // inverse control
// ** TCH1.54; Support __sbMicDetect Pin for Mic I/P.
/// #define SUPPORT_MIC_DETECT // Active= LOW. Mic has I/P
/// #define SUPPORT_MIC_DETECT_INV // Active= HIGH. Mic has I/P.
// define it, means System support Scart_IF only.
// Depends on Board Configuration.
// SUPPORT_SCART_IF_GPIO is controlled by GPIO,
// SUPPORT_SCART_IF is controlled by CPU_IO.
//#define SUPPORT_SCART_IF
//#define SUPPORT_SCART_IF_GPIO // ** TCH1.00a;
// define it, means System support max. PCM_LENGTH.
// Depends on AudioDAC Configuration.
//#define SUPPORT_PCM_WORD_LENGTH xx (xx mean "16", "18", "20", 24")
// Micky0.87, add audio DAC reset.
// define it, means System support __sbAudioDACReset Pin.
// Depends on Board Configuration.
//#define SUPPORT_AUDIODAC_RESET
// define it, means System support TV_Encoder Reset Pin. Active is LOW, means reset state.
// Depends on Board Configuration.
//#define SUPPORT_TVENCODER_RESET
// define it, means System support TV_Encoder Reset Pin. Active is HIGH, means reset state.
// Depends on Board Configuration.
//#define SUPPORT_TVENCODER_RESET_INV
// define it, means System support Audio DAC Reset Pin. Active is LOW, means reset state.
// Depends on Board Configuration.
//#define SUPPORT_AUDIODAC_RESET
// define it, means System support Power-Down Pin. Active is HIGH, means PowerDown Mode
// Depends on Board Configuration.
//#define SUPPORT_POWERDOWN_CONTROL // ** TCH1.00-2;
// define it, means System support AutoUpgrade Pin. Active is HIGH, means SRAM enable.
// Depends on Board Configuration.
//#define SUPPORT_AUTOUPGRADE_CONTROL // ** TCH1.00-2;
// define it, means support servo reset by I/O control
// Depend on Board Configuration
// #define SUPPORT_SERVO_RESET
// ** TCH1.00a; end...
// Micky1.00, adding default configuration for CT908 system
// must put at system configuration section
// as later will reference these define.
#ifdef INPUT_PATH_ATAPIIF
#define ONE_CPU
#define SUPPORT_DVDIF
#define SUPPORT_CDIF
#endif
#if (DECODER_SYSTEM == DVD908_EVAL_P2)
#define TV_ENCODER_INTERNAL // use CT908 internal TV encoder
#define TV_ENCODER TV_W9954
#define SUPPORT_PCM_WORD_LENGTH 24
#define AUDIO_DAC DAC_PCM1723_WM8746
//#define AUDIO_ALIGN_FORMAT RIGHT_ALIGN //Kevin1.07-3, must check which format (RIGHT_ALIGN/I2S_ALIGN/LEFT_ALIGN) the ADAC supports
#define AUDIO_ALIGN_FORMAT I2S_ALIGN //Kevin1.07-3, must check which format (RIGHT_ALIGN/I2S_ALIGN/LEFT_ALIGN) the ADAC supports
#define ACLK_SOURCE MPEGCHIP
//#define ACLK_SOURCE AUDIODAC
//#define CPU_I2C
//Kevin0.91, I2C R/W EEPROM via P3 or P4
#define I2C_USING_P4 //otherwise P3
#endif // DVD908_EVAL_P2
#if (DECODER_SYSTEM == DVD908_EVAL_P5)
#define TV_ENCODER_INTERNAL // use CT908 internal TV encoder
#define TV_ENCODER TV_W9954
#define SUPPORT_PCM_WORD_LENGTH 16
#define AUDIO_DAC DAC_CS4338_ONLY //CS4338 supports up to 16 bits only
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