📄 displa.lst
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04C8 8380 STD Z+0,R24
(0368) if(reset_m==1) {p[0]=49;}
04C9 2D8E MOV R24,R14
04CA 3081 CPI R24,1
04CB F419 BNE 0x04CF
04CC E381 LDI R24,0x31
04CD D894 RCALL 0x0D62
04CE 8380 STD Z+0,R24
(0369) if(reset_m>=2) {p[0]=15;}
04CF 2D8E MOV R24,R14
04D0 3082 CPI R24,2
04D1 F018 BCS 0x04D5
04D2 E08F LDI R24,0xF
04D3 D88E RCALL 0x0D62
04D4 8380 STD Z+0,R24
(0370) key=display_flash(fbit,0,2);
04D5 D9AC RCALL 0x0E82
04D6 D2F7 RCALL _display_flash
04D7 93000199 STS key,R16
(0371) comtep[0]=10;
04D9 E08A LDI R24,0xA
04DA 93800186 STS comtep,R24
(0372) cbit=5;
04DC E085 LDI R24,5
04DD 8B88 STD Y+16,R24
(0373) switch (key)
04DE 2E20 MOV R2,R16
04DF 2433 CLR R3
04E0 863C STD Y+12,R3
04E1 862B STD Y+11,R2
04E2 01C1 MOVW R24,R2
04E3 3183 CPI R24,0x13
04E4 E0E0 LDI R30,0
04E5 079E CPC R25,R30
04E6 F409 BNE 0x04E8
04E7 C1E4 RJMP 0x06CC
04E8 E183 LDI R24,0x13
04E9 1582 CP R24,R2
04EA 0593 CPC R25,R3
04EB F0B4 BLT 0x0502
04EC 858B LDD R24,Y+11
04ED 859C LDD R25,Y+12
04EE 3087 CPI R24,7
04EF E0E0 LDI R30,0
04F0 079E CPC R25,R30
04F1 F0C1 BEQ 0x050A
04F2 308B CPI R24,0xB
04F3 E0E0 LDI R30,0
04F4 079E CPC R25,R30
04F5 F409 BNE 0x04F7
04F6 C0B9 RJMP 0x05B0
04F7 308D CPI R24,0xD
04F8 E0E0 LDI R30,0
04F9 079E CPC R25,R30
04FA F409 BNE 0x04FC
04FB C0AA RJMP 0x05A6
04FC 308E CPI R24,0xE
04FD E0E0 LDI R30,0
04FE 079E CPC R25,R30
04FF F409 BNE 0x0501
0500 C0A5 RJMP 0x05A6
0501 C0B0 RJMP 0x05B2
0502 858B LDD R24,Y+11
0503 859C LDD R25,Y+12
0504 3187 CPI R24,0x17
0505 E0E0 LDI R30,0
0506 079E CPC R25,R30
0507 F409 BNE 0x0509
0508 C279 RJMP 0x0782
0509 C0A8 RJMP 0x05B2
(0374) {
(0375) case set:
(0376) if(fbit==2)
050A 858F LDD R24,Y+15
050B 3082 CPI R24,2
050C F009 BEQ 0x050E
050D C096 RJMP 0x05A4
(0377) {
(0378) resettemp=reset_m;
050E 92E001DA STS resettemp,R14
(0379) EEPROMwrite(0x11,resettemp);
0510 2D2E MOV R18,R14
0511 E101 LDI R16,0x11
0512 E010 LDI R17,0
0513 D7E4 RCALL _EEPROMwrite_extIO
(0380) fbit=0;
0514 2400 CLR R0
0515 860F STD Y+15,R0
(0381) }
0516 C09B RJMP 0x05B2
(0382) else
(0383)
(0384) while(1)
(0385) {
(0386) ccc=0;
0517 24CC CLR R12
(0387) if(fbit!=2) process (ccc,p,0);
0518 858F LDD R24,Y+15
0519 3082 CPI R24,2
051A F041 BEQ 0x0523
051B 2422 CLR R2
051C 822A STD Y+2,R2
051D D834 RCALL 0x0D52
051E 8239 STD Y+1,R3
051F 8228 STD Y+0,R2
0520 2C2C MOV R2,R12
0521 D9AF RCALL 0x0ED1
0522 D487 RCALL _process
(0388) for(ccc=0;ccc<6;ccc++)
0523 24CC CLR R12
0524 C00C RJMP 0x0531
(0389) {if(p[ccc]==10) p[ccc]=0;}
0525 D82C RCALL 0x0D52
0526 2DEC MOV R30,R12
0527 D884 RCALL 0x0DAC
0528 308A CPI R24,0xA
0529 F431 BNE 0x0530
052A 2DEC MOV R30,R12
052B 27FF CLR R31
052C 0DE2 ADD R30,R2
052D 1DF3 ADC R31,R3
052E 2422 CLR R2
052F 8220 STD Z+0,R2
0530 94C3 INC R12
0531 2D8C MOV R24,R12
0532 3086 CPI R24,6
0533 F388 BCS 0x0525
(0390) o=lock;
0534 E386 LDI R24,0x36
0535 D88F RCALL 0x0DC5
0536 D8BD RCALL 0x0DF4
(0391) key=display_flash(fbit,cbit,2);
0537 D296 RCALL _display_flash
0538 D8D6 RCALL 0x0E0F
(0392) switch (key)
0539 863E STD Y+14,R3
053A 862D STD Y+13,R2
053B 01C1 MOVW R24,R2
053C 3183 CPI R24,0x13
053D E0E0 LDI R30,0
053E 079E CPC R25,R30
053F F409 BNE 0x0541
0540 C18B RJMP 0x06CC
0541 E183 LDI R24,0x13
0542 1582 CP R24,R2
0543 0593 CPC R25,R3
0544 F0AC BLT 0x055A
0545 858D LDD R24,Y+13
0546 859E LDD R25,Y+14
0547 3087 CPI R24,7
0548 E0E0 LDI R30,0
0549 079E CPC R25,R30
054A F0B9 BEQ 0x0562
054B 308B CPI R24,0xB
054C E0E0 LDI R30,0
054D 079E CPC R25,R30
054E F409 BNE 0x0550
054F C042 RJMP 0x0592
0550 308D CPI R24,0xD
0551 E0E0 LDI R30,0
0552 079E CPC R25,R30
0553 F409 BNE 0x0555
0554 C02A RJMP 0x057F
0555 308E CPI R24,0xE
0556 E0E0 LDI R30,0
0557 079E CPC R25,R30
0558 F0A9 BEQ 0x056E
0559 C04A RJMP 0x05A4
055A 858D LDD R24,Y+13
055B 859E LDD R25,Y+14
055C 3187 CPI R24,0x17
055D E0E0 LDI R30,0
055E 079E CPC R25,R30
055F F409 BNE 0x0561
0560 C221 RJMP 0x0782
0561 C042 RJMP 0x05A4
(0393) {
(0394) case set:
(0395) if(fbit==2)
0562 858F LDD R24,Y+15
0563 3082 CPI R24,2
0564 F009 BEQ 0x0566
0565 CDED RJMP 0x0353
(0396) { fbit=0;
0566 2400 CLR R0
0567 860F STD Y+15,R0
(0397) lockda=process_add();
0568 D4F5 RCALL _process_add
0569 931001DE STS lockda+1,R17
056B 930001DD STS lockda,R16
(0398) }
(0399) else
(0400) goto menu2;
(0401) break;
056D C036 RJMP 0x05A4
(0402) case up:
(0403) if(fbit==2)
056E 858F LDD R24,Y+15
056F 3082 CPI R24,2
0570 F009 BEQ 0x0572
0571 C032 RJMP 0x05A4
(0404) { if(p[cbit]<9) p[cbit]++;
0572 D7D6 RCALL <created procedures>
0573 8180 LDD R24,Z+0
0574 3089 CPI R24,0x9
0575 F428 BCC 0x057B
0576 8848 LDD R4,Y+16
0577 D7E4 RCALL 0x0D5C
0578 5F8F SUBI R24,0xFF
0579 8380 STD Z+0,R24
057A C029 RJMP 0x05A4
(0405) else p[cbit]=0;}
057B D7CD RCALL <created procedures>
057C 2422 CLR R2
057D 8220 STD Z+0,R2
(0406) break;
057E C025 RJMP 0x05A4
(0407) case down:
(0408) if(fbit==2)
057F 858F LDD R24,Y+15
0580 3082 CPI R24,2
0581 F009 BEQ 0x0583
0582 C021 RJMP 0x05A4
(0409) { if(p[cbit]>0) p[cbit]--;
0583 D7C5 RCALL <created procedures>
0584 8020 LDD R2,Z+0
0585 2433 CLR R3
0586 1432 CP R3,R2
0587 F430 BCC 0x058E
0588 D7C9 RCALL 0x0D52
0589 8848 LDD R4,Y+16
058A D7D1 RCALL 0x0D5C
058B 5081 SUBI R24,1
058C 8380 STD Z+0,R24
058D C016 RJMP 0x05A4
(0410) else p[cbit]=9;}
058E D7BA RCALL <created procedures>
058F E089 LDI R24,0x9
0590 8380 STD Z+0,R24
(0411) break;
0591 C012 RJMP 0x05A4
(0412) case left:
(0413) fbit=2;
0592 E082 LDI R24,2
0593 878F STD Y+15,R24
(0414) if(cbit<5) cbit++;
0594 8988 LDD R24,Y+16
0595 3085 CPI R24,5
0596 F420 BCC 0x059B
0597 2E08 MOV R0,R24
0598 9403 INC R0
0599 8A08 STD Y+16,R0
059A C002 RJMP 0x059D
(0415) else cbit=0;
059B 2400 CLR R0
059C 8A08 STD Y+16,R0
(0416) if(p[cbit]==10) p[cbit]=0;
059D D7AB RCALL <created procedures>
059E 8180 LDD R24,Z+0
059F 308A CPI R24,0xA
05A0 F419 BNE 0x05A4
05A1 D7B5 RCALL 0x0D57
05A2 2422 CLR R2
05A3 8220 STD Z+0,R2
05A4 CF72 RJMP 0x0517
(0417) break;
(0418) case set3s:
(0419) return;
(0420) case set_left3s:
(0421) goto menu3;
(0422) }
(0423) }
(0424) break;
05A5 C00C RJMP 0x05B2
(0425) rst_mcall: case up:
(0426) if(fbit==2)
05A6 858F LDD R24,Y+15
05A7 3082 CPI R24,2
05A8 F449 BNE 0x05B2
(0427) {
(0428) if(reset_m<2) reset_m++;
05A9 2D8E MOV R24,R14
05AA 3082 CPI R24,2
05AB F410 BCC 0x05AE
05AC 94E3 INC R14
05AD C004 RJMP 0x05B2
(0429) else reset_m=0;
05AE 24EE CLR R14
(0430) }
(0431) break;
05AF C002 RJMP 0x05B2
(0432) case down:
(0433) goto rst_mcall;
(0434) case left:
(0435) fbit=2;
05B0 E082 LDI R24,2
05B1 878F STD Y+15,R24
05B2 CF0C RJMP 0x04BF
(0436) break;
(0437) case set3s:
(0438) return ;
(0439) case set_left3s:
(0440) goto menu3;
(0441) }
(0442) }
(0443) break;
05B3 C00B RJMP 0x05BF
(0444) case up:
(0445) in_mcall: if(fbit==2)
05B4 858F LDD R24,Y+15
05B5 3082 CPI R24,2
05B6 F441 BNE 0x05BF
(0446) {
(0447) if(intm_m==0) intm_m++;
05B7 20AA TST R10
05B8 F411 BNE 0x05BB
05B9 94A3 INC R10
05BA C004 RJMP 0x05BF
(0448) else intm_m=0;
05BB 24AA CLR R10
(0449) }
(0450) break;
05BC C002 RJMP 0x05BF
(0451) case down:
(0452) goto in_mcall;
(0453) case left:
(0454) fbit=2;
05BD E082 LDI R24,2
05BE 878F STD Y+15,R24
05BF CEB8 RJMP 0x0478
(0455) break;
(0456) case set3s:
(0457) return ;
(0458) case set_left3s:
(0459) goto menu3;
(0460) }
(0461) }
(0462) }
(0463) }
(0464) break;
05C0 C059 RJMP 0x061A
(0465) case up:
(0466) if(fbit==2)
05C1 858F LDD R24,Y+15
05C2 3082 CPI R24,2
05C3 F009 BEQ 0x05C5
05C4 C055 RJMP 0x061A
(0467) { if(cbit!=3) { if(p[cbit]<9) p[cbit]++;
05C5 8988 LDD R24,Y+16
05C6 3083 CPI R24,3
05C7 F071 BEQ 0x05D6
05C8 D789 RCALL 0x0D52
05C9 2FE8 MOV R30,R24
05CA D7E1 RCALL 0x0DAC
05CB 3089 CPI R24,0x9
05CC F428 BCC 0x05D2
05CD 8848 LDD R4,Y+16
05CE D78D RCALL 0x0D5C
05CF 5F8F SUBI R24,0xFF
05D0 8380 STD Z+0,R24
05D1 C048 RJMP 0x061A
(0468) else ⌨️ 快捷键说明
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