📄 bulkloop.lst
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C51 COMPILER V6.14 BULKLOOP 05/18/2006 20:44:04 PAGE 1
C51 COMPILER V6.14, COMPILATION OF MODULE BULKLOOP
OBJECT MODULE PLACED IN .\bulkloop.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE .\bulkloop.c DEBUG OBJECTEXTEND
stmt level source
1 #pragma NOIV // Do not generate interrupt vectors
2 //-----------------------------------------------------------------------------
3 // File: bulkloop.c
4 // Contents: Hooks required to implement USB peripheral function.
5 //
6 // Copyright (c) 2000 Cypress Semiconductor All rights reserved
7 //-----------------------------------------------------------------------------
8 #include "fx2.h"
9 #include "fx2regs.h"
10 #include "fx2sdly.h" // SYNCDELAY macro
11
12 extern BOOL GotSUD; // Received setup data flag
13 extern BOOL Sleep;
14 extern BOOL Rwuen;
15 extern BOOL Selfpwr;
16
17 BYTE Configuration; // Current configuration
18 BYTE AlternateSetting; // Alternate settings
19
20 #define VR_NAKALL_ON 0xD0
21 #define VR_NAKALL_OFF 0xD1
22
23 //-----------------------------------------------------------------------------
24 // Task Dispatcher hooks
25 // The following hooks are called by the task dispatcher.
26 //-----------------------------------------------------------------------------
27
28 void TD_Init(void) // Called once at startup
29 {
30 1 // set the CPU clock to 48MHz
31 1 CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
32 1
33 1 // set the slave FIFO interface to 48MHz
34 1 IFCONFIG |= 0x40;
35 1
36 1 // Registers which require a synchronization delay, see section 15.14
37 1 // FIFORESET FIFOPINPOLAR
38 1 // INPKTEND OUTPKTEND
39 1 // EPxBCH:L REVCTL
40 1 // GPIFTCB3 GPIFTCB2
41 1 // GPIFTCB1 GPIFTCB0
42 1 // EPxFIFOPFH:L EPxAUTOINLENH:L
43 1 // EPxFIFOCFG EPxGPIFFLGSEL
44 1 // PINFLAGSxx EPxFIFOIRQ
45 1 // EPxFIFOIE GPIFIRQ
46 1 // GPIFIE GPIFADRH:L
47 1 // UDMACRCH:L EPxGPIFTRIG
48 1 // GPIFTRIG
49 1
50 1 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
51 1 // ...these have been replaced by GPIFTC[B3:B0] registers
52 1
53 1 // default: all endpoints have their VALID bit set
54 1 // default: TYPE1 = 1 and TYPE0 = 0 --> BULK
55 1 // default: EP2 and EP4 DIR bits are 0 (OUT direction)
C51 COMPILER V6.14 BULKLOOP 05/18/2006 20:44:04 PAGE 2
56 1 // default: EP6 and EP8 DIR bits are 1 (IN direction)
57 1 // default: EP2, EP4, EP6, and EP8 are double buffered
58 1
59 1 // we are just using the default values, yes this is not necessary...
60 1 EP1OUTCFG = 0xA0;
61 1 EP1INCFG = 0xA0;
62 1 SYNCDELAY; // see TRM section 15.14
63 1 EP2CFG = 0xB2;
64 1 // SYNCDELAY;
65 1 // EP4CFG = 0xB0;
66 1 SYNCDELAY;
67 1 EP6CFG = 0xF2;
68 1 // SYNCDELAY;
69 1 // EP8CFG = 0xF0;
70 1
71 1 // out endpoints do not come up armed
72 1
73 1 // since the defaults are double buffered we must write dummy byte counts twice
74 1 SYNCDELAY;
75 1 EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip.
76 1 SYNCDELAY;
77 1 EP2BCL = 0x80;
78 1 // SYNCDELAY;
79 1 // EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip.
80 1 // SYNCDELAY;
81 1 // EP4BCL = 0x80;
82 1
83 1 // enable dual autopointer feature
84 1 AUTOPTRSETUP |= 0x01;
85 1
86 1 Rwuen = TRUE; // Enable remote-wakeup
87 1 }
88
89
90 void TD_Poll(void) // Called repeatedly while the device is idle
91 {
92 1 WORD i;
93 1 WORD count;
94 1
95 1 if(!(EP2468STAT & bmEP2EMPTY))
96 1 { // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
97 2 if(!(EP2468STAT & bmEP6FULL))
98 2 { // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
99 3 APTR1H = MSB( &EP2FIFOBUF );
100 3 APTR1L = LSB( &EP2FIFOBUF );
101 3
102 3 AUTOPTRH2 = MSB( &EP6FIFOBUF );
103 3 AUTOPTRL2 = LSB( &EP6FIFOBUF );
104 3
105 3 count = (EP2BCH << 8) + EP2BCL;
106 3
107 3 // loop EP2OUT buffer data to EP6IN
108 3 for( i = 0x0000; i < count; i++ )
109 3 {
110 4 // setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s)
111 4 EXTAUTODAT2 = EXTAUTODAT1;
112 4
113 4
114 4 }
115 3 EP6BCH = EP2BCH;
116 3 SYNCDELAY;
117 3 EP6BCL = EP2BCL; // arm EP6IN
C51 COMPILER V6.14 BULKLOOP 05/18/2006 20:44:04 PAGE 3
118 3 SYNCDELAY;
119 3 EP2BCL = 0x80; // re(arm) EP2OUT
120 3 }
121 2 }
122 1 /*
123 1 if(!(EP2468STAT & bmEP4EMPTY))
124 1 { // check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
125 1 if(!(EP2468STAT & bmEP8FULL))
126 1 { // check EP8 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
127 1 APTR1H = MSB( &EP4FIFOBUF );
128 1 APTR1L = LSB( &EP4FIFOBUF );
129 1
130 1 AUTOPTRH2 = MSB( &EP8FIFOBUF );
131 1 AUTOPTRL2 = LSB( &EP8FIFOBUF );
132 1
133 1 count = (EP4BCH << 8) + EP4BCL;
134 1
135 1 // loop EP4OUT buffer data to EP8IN
136 1 for( i = 0x0000; i < count; i++ )
137 1 {
138 1 // setup to transfer EP4OUT buffer to EP8IN buffer using AUTOPOINTER(s)
139 1 EXTAUTODAT2 = EXTAUTODAT1;
140 1 }
141 1 EP8BCH = EP4BCH;
142 1 SYNCDELAY;
143 1 EP8BCL = EP4BCL; // arm EP8IN
144 1 SYNCDELAY;
145 1 EP4BCL = 0x80; // re(arm) EP4OUT
146 1 }
147 1 }*/
148 1 }
149
150 BOOL TD_Suspend(void) // Called before the device goes into suspend mode
151 {
152 1 return(TRUE);
153 1 }
154
155 BOOL TD_Resume(void) // Called after the device resumes
156 {
157 1 return(TRUE);
158 1 }
159
160 //-----------------------------------------------------------------------------
161 // Device Request hooks
162 // The following hooks are called by the end point 0 device request parser.
163 //-----------------------------------------------------------------------------
164
165 BOOL DR_GetDescriptor(void)
166 {
167 1 return(TRUE);
168 1 }
169
170 BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received
171 {
172 1 Configuration = SETUPDAT[2];
173 1 return(TRUE); // Handled by user code
174 1 }
175
176 BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received
177 {
178 1 EP0BUF[0] = Configuration;
179 1 EP0BCH = 0;
C51 COMPILER V6.14 BULKLOOP 05/18/2006 20:44:04 PAGE 4
180 1 EP0BCL = 1;
181 1 return(TRUE); // Handled by user code
182 1 }
183
184 BOOL DR_SetInterface(void) // Called when a Set Interface command is received
185 {
186 1 AlternateSetting = SETUPDAT[2];
187 1 return(TRUE); // Handled by user code
188 1 }
189
190 BOOL DR_GetInterface(void) // Called when a Set Interface command is received
191 {
192 1 EP0BUF[0] = AlternateSetting;
193 1 EP0BCH = 0;
194 1 EP0BCL = 1;
195 1 return(TRUE); // Handled by user code
196 1 }
197
198 BOOL DR_GetStatus(void)
199 {
200 1 return(TRUE);
201 1 }
202
203 BOOL DR_ClearFeature(void)
204 {
205 1 return(TRUE);
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