init.s

ucos2 in lpc2104 的源码

/*
  uC/OS-II Porting for LPC210x
  Compiler: gcc
  By Pary WU <[e-mail]>

  History:
*/
    /* IRQ vector symbols */
    .global IRQ_VECTOR_0
    .global IRQ_VECTOR_1
    .global IRQ_VECTOR_2
    .global IRQ_VECTOR_3
    .global IRQ_VECTOR_4
    .global IRQ_VECTOR_5
    .global IRQ_VECTOR_6
    .global IRQ_VECTOR_7
    .global IRQ_VECTOR_8
    .global IRQ_VECTOR_9
    .global IRQ_VECTOR_10
    .global IRQ_VECTOR_11
    .global IRQ_VECTOR_12
    .global IRQ_VECTOR_13
    .global IRQ_VECTOR_14
    .global IRQ_VECTOR_15
    .global IRQ_VECTOR_16
    .global frame_irq_flag
    .global frame_irq_enable
    .global frame_irq_disable
        
/* modes, with NOINT */
MODE_NOINT_USR = 0xd0
MODE_NOINT_FIQ = 0xd1
MODE_NOINT_IRQ = 0xd2
MODE_NOINT_SVC = 0xd3
MODE_NOINT_ABT = 0xd7
MODE_NOINT_UND = 0xdb
MODE_NOINT_SYS = 0xdf

/*
   unit: byte
   size should be the multiplier of 4, safe factor is recommended to 2
*/
   
STACK_SIZE_SYS = 256     /* cannot be 0, at least 64*2 (two contexts) */
STACK_SIZE_FIQ = 0       
STACK_SIZE_IRQ = 256     /* cannot be 0, at least 4*2 */
STACK_SIZE_SVC = 64      /* cannot be 0, at least 4*2 */
STACK_SIZE_ABT = 0       
STACK_SIZE_UND = 0
/* USR stack is as SYS */

/*
    configurations
    shall match as in config.h
*/    
SRAM_SIZE_LPC2106 = (64*1024) /* LPC2106, 64KB SRAM */
SRAM_SIZE_LPC2105 = (32*1024) /* LPC2105, 32KB SRAM */
SRAM_SIZE_LPC2104 = (16*1024) /* LPC2104, 16KB SRAM */
SRAM_SIZE         = (SRAM_SIZE_LPC2104)
SRAM_BEG_ADDR     = 0x40000000
IRQ_BEG_ADDR      = SRAM_BEG_ADDR   /* IRQ begin address */
IRQ_NUM           = 17

STACK_SIZE        = (STACK_SIZE_SYS+STACK_SIZE_FIQ+STACK_SIZE_IRQ+STACK_SIZE_SVC+STACK_SIZE_ABT+STACK_SIZE_UND)

STACK_BEG_ADDR    = (SRAM_BEG_ADDR+SRAM_SIZE-STACK_SIZE)

/*
    startup section
*/
    .global _frame_entry
    
_frame_entry:    
    /* vector table */
    b handler_entry_RST
    b handler_entry_UND
    b handler_entry_SWI
    b handler_entry_PAB
    b handler_entry_DAB
    b .
    b handler_entry_IRQ
    b handler_entry_FIQ
    
handler_entry_FIQ:
    b .                                 /* halt */
    
handler_entry_UND:
    b .                                 /* halt */
    
handler_entry_SWI:
    stmfd sp!, {lr}                     
    
    /* save context */
    msr cpsr_c, #MODE_NOINT_SYS
    stmfd sp!, {r0-r1}                  /* dummy, for (cpsr, pc) */
    stmfd sp!, {r0-r12, lr}
    msr cpsr_c, #MODE_NOINT_SVC
    mov r2, lr                          /* lr = pc_sys */
    mrs r1, spsr                        /* spsr = cpsr_sys */
    ldr r0, [lr, #-4]                   /* calculate the 'x' of 'swi x' */
    bic r0, r0, #0xff000000             /* r0 = 'x' */
    msr cpsr_c, #MODE_NOINT_SYS
    str r1, [sp, #60]                   /* cpsr */
    str r2, [sp, #56]                   /* pc */
    
    /*  
        c declaration:
        void frame_swi_handler(int num)
    */        
    
    bl frame_swi_handler                /* refer `frame_tick_handler' */
                                        /*  to write a proper handler */
                                        /*  (be careful to context switch) */
    
    ldr r0, [sp, #56]
    ldr r1, [sp, #60]
    msr cpsr_c, #MODE_NOINT_SVC
    msr spsr_cf, r1
    mov lr, r0
    msr cpsr_c, #MODE_NOINT_SYS
    ldmfd sp!, {r0-r12, lr}
    add sp, sp, #8                      /* drop 2 items (pc, cpsr) */
    msr cpsr_c, #MODE_NOINT_SVC
    
    ldmfd sp!, {pc}^


handler_entry_PAB:  /* PAB handler */
    b .             /* halt */
    
handler_entry_DAB:  /* DAB handler */
    b .             /* halt */
    
/*
    IMPLEMENTATION NOTE
    IRQ table without VIC, to ease porting
    VIC should be used then, for better performance
*/
handler_entry_IRQ:
    sub lr, lr, #4
    stmfd sp!, {lr}                     

    /*
     save sys's context
      cpsr
      pc
      lr
      r12
      r11
      r10
      r9
      r8
      r7
      r6
      r5
      r4
      r3
      r2
      r1
      r0 <= sp (r13), saved in TCB
    */
    
    msr cpsr_c, #MODE_NOINT_SYS
    stmfd sp!, {r0-r1}                  /* dummy, for (cpsr, pc) */
    stmfd sp!, {r0-r12, lr}
    msr cpsr_c, #MODE_NOINT_IRQ
    mov r0, lr                          /* lr = pc_sys */
    mrs r1, spsr                        /* spsr = cpsr_sys */
    msr cpsr_c, #MODE_NOINT_SYS
    str r1, [sp, #60]                   /* cpsr */
    str r0, [sp, #56]                   /* pc */

    /* enter irq_dispatch under sys mode */
    bl irq_dispatch
    
    ldr r0, [sp, #56]
    ldr r1, [sp, #60]
    msr cpsr_c, #MODE_NOINT_IRQ
    msr spsr_cf, r1
    mov lr, r0
    msr cpsr_c, #MODE_NOINT_SYS
    ldmfd sp!, {r0-r12, lr}
    add sp, sp, #8                      /* drop 2 items (pc, cpsr) */
    msr cpsr_c, #MODE_NOINT_IRQ
    
    ldmfd sp!, {pc}^

irq_dispatch:
    ldr r4, =0xfffff000                 /* VICIRQStatus */
    ldr r4, [r4]
    ldr r5, =IRQ_VECTOR_0
    ldr r6, =IRQ_VECTOR_END
    mov r8, lr
lbl41:
    tst r4, #1
    ldrne r7, [r5]
    movne lr, pc
    movne pc, r7
    mov r4, r4, ror #1
    add r5, r5, #4
    /* bne lbl42 */
    cmp r5, r6
    bne lbl41
lbl42:
    bx r8
    
    
/*  RESET */
handler_entry_RST:
    bl init_irq_handlers
    bl init_stacks
    
    ldr r0, =_etext
    ldr r1, =_data
    ldr r3, =_edata
    
    cmp r0, r1
    beq lbl1
    /* copy RW section if necessary */
lbl0:
    cmp r1, r3
    ldrcc r2, [r0], #4
    strcc r2, [r1], #4
    bcc lbl0
    /* init ZI */
lbl1:
    ldr r1, =_end
    mov r2, #0
lbl2:   
    cmp r3, r1
    strcc r2, [r3], #4
    bcc lbl2
    
    /* external initialization before main */

    bl frame_init

/*    
    Main, should never return
*/
    ldr lr, =frame_main
    bx lr
    
init_stacks:
    /*
        cpsr_c = MODE|NOINT
        sp = STACK_xxx
    */        
    mov r0, lr
    
    msr cpsr_c, #MODE_NOINT_UND
    ldr sp, =STACK_UND
    
    msr cpsr_c, #MODE_NOINT_ABT
    ldr sp, =STACK_ABT
    
    msr cpsr_c, #MODE_NOINT_IRQ
    ldr sp, =STACK_IRQ
    
    msr cpsr_c, #MODE_NOINT_FIQ
    ldr sp, =STACK_FIQ
    
    msr cpsr_c, #MODE_NOINT_SVC
    ldr sp, =STACK_SVC
    
    msr cpsr_c, #MODE_NOINT_SYS
    ldr sp, =STACK_SYS
    
    /*
        c_main starts with SYS mode
        SVC mode is not suitable!
        if SVC mode is applied, then SWI cannot be used
        refer ARM developer guide page 5-45 for more details
    */        
    
    mov pc, r0

init_irq_handlers:
    ldr r0, =IRQ_VECTOR_0
    ldr r1, =IRQ_VECTOR_END
    ldr r2, =irq_default_handler
12:
    stmia r0!, {r2}
    cmp r0, r1
    bne 12b
    /* reset frame_irq_flag */
    ldr r0, =frame_irq_flag
    mov r1, #0
    str r1, [r0]
    mov pc, lr

irq_default_handler:
    b .
    
frame_irq_enable:
    mrs r0, cpsr
    bic r0, r0, #0x80
    msr cpsr_c, r0
    bx lr

frame_irq_disable:
    mrs r0, cpsr
    orr r0, r0, #0x80
    msr cpsr_c, r0
    bx lr

/*
    section STACK
*/

    .struct STACK_BEG_ADDR
STACK_FIQ_TOP:
    .struct STACK_FIQ_TOP+STACK_SIZE_FIQ
STACK_FIQ:

STACK_IRQ_TOP:
    .struct STACK_IRQ_TOP+STACK_SIZE_IRQ
STACK_IRQ:

STACK_SVC_TOP:
    .struct STACK_SVC_TOP+STACK_SIZE_SVC
STACK_SVC:

STACK_ABT_TOP:
    .struct STACK_ABT_TOP+STACK_SIZE_ABT
STACK_ABT:

STACK_UND_TOP:
    .struct STACK_UND_TOP+STACK_SIZE_UND
STACK_UND:

STACK_SYS_TOP:
    .struct STACK_SYS_TOP+STACK_SIZE_SYS
STACK_SYS:

/*
    SECTION IRQ
*/    
    .struct IRQ_BEG_ADDR
IRQ_VECTOR_0:
    .struct IRQ_VECTOR_0+4
IRQ_VECTOR_1:
    .struct IRQ_VECTOR_1+4
IRQ_VECTOR_2:
    .struct IRQ_VECTOR_2+4
IRQ_VECTOR_3:
    .struct IRQ_VECTOR_3+4
IRQ_VECTOR_4:
    .struct IRQ_VECTOR_4+4
IRQ_VECTOR_5:
    .struct IRQ_VECTOR_5+4
IRQ_VECTOR_6:
    .struct IRQ_VECTOR_6+4
IRQ_VECTOR_7:
    .struct IRQ_VECTOR_7+4
IRQ_VECTOR_8:
    .struct IRQ_VECTOR_8+4
IRQ_VECTOR_9:
    .struct IRQ_VECTOR_9+4
IRQ_VECTOR_10:
    .struct IRQ_VECTOR_10+4
IRQ_VECTOR_11:
    .struct IRQ_VECTOR_11+4
IRQ_VECTOR_12:
    .struct IRQ_VECTOR_12+4
IRQ_VECTOR_13:
    .struct IRQ_VECTOR_13+4
IRQ_VECTOR_14:
    .struct IRQ_VECTOR_14+4
IRQ_VECTOR_15:
    .struct IRQ_VECTOR_15+4
IRQ_VECTOR_16:
    .struct IRQ_VECTOR_16+4
IRQ_VECTOR_END:    
frame_irq_flag:
    .struct frame_irq_flag+4