cs5532_test.lst

CS5532的驱动程序

    0114 922A      ST	R2,-Y
(0067) }
(0068) 
(0069) 
(0070) 
(0071) 
(0072) /**********************************************************************
(0073) functionName:void uart0_rx_isr(void)
(0074) description:串口接受中断函数
(0075) **********************************************************************/
(0076) #pragma interrupt_handler uart0_rx_isr:12
(0077) void uart0_rx_isr(void)
(0078) {
(0079)  	uint08 uart_data;
(0080)  	uart_data=UDR;
    0115 B10C      IN	R16,0x0C
(0081)  	switch(rx_stu_mac)
    0116 91200067  LDS	R18,rx_stu_mac
    0118 2733      CLR	R19
    0119 3F20      CPI	R18,0xF0
    011A E0E0      LDI	R30,0
    011B 073E      CPC	R19,R30
    011C F0E9      BEQ	0x013A
    011D 3F21      CPI	R18,0xF1
    011E E0E0      LDI	R30,0
    011F 073E      CPC	R19,R30
    0120 F119      BEQ	0x0144
    0121 3F22      CPI	R18,0xF2
    0122 E0E0      LDI	R30,0
    0123 073E      CPC	R19,R30
    0124 F151      BEQ	0x014F
    0125 3F23      CPI	R18,0xF3
    0126 E0E0      LDI	R30,0
    0127 073E      CPC	R19,R30
    0128 F409      BNE	0x012A
    0129 C03A      RJMP	0x0164
    012A 3F24      CPI	R18,0xF4
    012B E0E0      LDI	R30,0
    012C 073E      CPC	R19,R30
    012D F409      BNE	0x012F
    012E C04A      RJMP	0x0179
    012F 3F25      CPI	R18,0xF5
    0130 E0E0      LDI	R30,0
    0131 073E      CPC	R19,R30
    0132 F409      BNE	0x0134
    0133 C057      RJMP	0x018B
    0134 3F26      CPI	R18,0xF6
    0135 E0E0      LDI	R30,0
    0136 073E      CPC	R19,R30
    0137 F409      BNE	0x0139
    0138 C073      RJMP	0x01AC
    0139 C07D      RJMP	0x01B7
(0082)  	{
(0083)  		case ST_START:
(0084)  		{
(0085)  			if(uart_data==MESSAGE_START)
    013A 310B      CPI	R16,0x1B
    013B F009      BEQ	0x013D
    013C C07D      RJMP	0x01BA
(0086) 			{
(0087) 				rx_stu_mac = ST_GET_SEQ_NUM;	
    013D EF81      LDI	R24,0xF1
    013E 93800067  STS	rx_stu_mac,R24
(0088) 				check_sum = MESSAGE_START;
    0140 E18B      LDI	R24,0x1B
    0141 93800068  STS	check_sum,R24
(0089) 			}
(0090)  			break;
    0143 C076      RJMP	0x01BA
(0091)  		}
(0092)  		case ST_GET_SEQ_NUM:
(0093)  		{
(0094)  			seq_number = uart_data;
    0144 93000069  STS	seq_number,R16
(0095) 			check_sum ^= uart_data; 
    0146 90200068  LDS	R2,check_sum
    0148 2620      EOR	R2,R16
    0149 92200068  STS	check_sum,R2
(0096) 			rx_stu_mac = ST_MSG_SIZE_H;
    014B EF82      LDI	R24,0xF2
    014C 93800067  STS	rx_stu_mac,R24
(0097)  			break;
    014E C06B      RJMP	0x01BA
(0098)  		}
(0099)  		case ST_MSG_SIZE_H:
(0100)  		{
(0101)  			msg_size = uart_data;
    014F 2E20      MOV	R2,R16
    0150 2433      CLR	R3
    0151 92300065  STS	msg_size+1,R3
    0153 92200064  STS	msg_size,R2
(0102) 			msg_size <<=8;
    0155 2C32      MOV	R3,R2
    0156 2422      CLR	R2
    0157 92300065  STS	msg_size+1,R3
    0159 92200064  STS	msg_size,R2
(0103) 			check_sum ^= uart_data;
    015B 90200068  LDS	R2,check_sum
    015D 2620      EOR	R2,R16
    015E 92200068  STS	check_sum,R2
(0104) 			rx_stu_mac = ST_MSG_SIZE_L;
    0160 EF83      LDI	R24,0xF3
    0161 93800067  STS	rx_stu_mac,R24
(0105)  			break;
    0163 C056      RJMP	0x01BA
(0106)  		}
(0107)  		case ST_MSG_SIZE_L:
(0108)  		{
(0109)  			msg_size |= uart_data;
    0164 2E20      MOV	R2,R16
    0165 2433      CLR	R3
    0166 90400064  LDS	R4,msg_size
    0168 90500065  LDS	R5,msg_size+1
    016A 2842      OR	R4,R2
    016B 2853      OR	R5,R3
    016C 92500065  STS	msg_size+1,R5
    016E 92400064  STS	msg_size,R4
(0110) 			check_sum ^= uart_data;
    0170 90200068  LDS	R2,check_sum
    0172 2620      EOR	R2,R16
    0173 92200068  STS	check_sum,R2
(0111) 			rx_stu_mac = ST_GET_TOKEN;	
    0175 EF84      LDI	R24,0xF4
    0176 93800067  STS	rx_stu_mac,R24
(0112)  			break;
    0178 C041      RJMP	0x01BA
(0113)  		}
(0114)  		case ST_GET_TOKEN:
(0115)  		{
(0116)  			if(uart_data==TOKEN)
    0179 300E      CPI	R16,0xE
    017A F461      BNE	0x0187
(0117) 			{
(0118) 				check_sum ^= uart_data;
    017B 90200068  LDS	R2,check_sum
    017D 2620      EOR	R2,R16
    017E 92200068  STS	check_sum,R2
(0119) 				rx_stu_mac = ST_GET_DATA;
    0180 EF85      LDI	R24,0xF5
    0181 93800067  STS	rx_stu_mac,R24
(0120) 				uart_rx_counter=0;
    0183 2422      CLR	R2
    0184 9220007F  STS	uart_rx_counter,R2
(0121) 			}
    0186 C033      RJMP	0x01BA
(0122) 			else
(0123) 			{
(0124) 				rx_stu_mac = ST_START;
    0187 EF80      LDI	R24,0xF0
    0188 93800067  STS	rx_stu_mac,R24
(0125) 			}
(0126)  			break;
    018A C02F      RJMP	0x01BA
(0127)  		}
(0128)  		case ST_GET_DATA:
(0129)  		{
(0130)  			uart_rx_buf[uart_rx_counter++]=uart_data;
    018B 9020007F  LDS	R2,uart_rx_counter
    018D 2433      CLR	R3
    018E 2D82      MOV	R24,R2
    018F 5F8F      SUBI	R24,0xFF
    0190 9380007F  STS	uart_rx_counter,R24
    0192 E68A      LDI	R24,0x6A
    0193 E090      LDI	R25,0
    0194 2DE2      MOV	R30,R2
    0195 27FF      CLR	R31
    0196 0FE8      ADD	R30,R24
    0197 1FF9      ADC	R31,R25
    0198 8300      STD	Z+0,R16
(0131) 			check_sum ^= uart_data;
    0199 90200068  LDS	R2,check_sum
    019B 2620      EOR	R2,R16
    019C 92200068  STS	check_sum,R2
(0132) 			if(uart_rx_counter==msg_size)
    019E 90200064  LDS	R2,msg_size
    01A0 90300065  LDS	R3,msg_size+1
    01A2 9040007F  LDS	R4,uart_rx_counter
    01A4 2455      CLR	R5
    01A5 1442      CP	R4,R2
    01A6 0453      CPC	R5,R3
    01A7 F491      BNE	0x01BA
(0133) 			{
(0134) 				rx_stu_mac = ST_GET_CHECK;
    01A8 EF86      LDI	R24,0xF6
    01A9 93800067  STS	rx_stu_mac,R24
(0135) 			}
(0136)  			break;
    01AB C00E      RJMP	0x01BA
(0137)  		}
(0138)  		case ST_GET_CHECK:
(0139)  		{
(0140)  			if(uart_data == check_sum)
    01AC 90200068  LDS	R2,check_sum
    01AE 1502      CP	R16,R2
    01AF F419      BNE	0x01B3
(0141) 			{
(0142) 				msg_end_flag=1;
    01B0 E081      LDI	R24,1
    01B1 93800066  STS	msg_end_flag,R24
(0143) 			}		
(0144) 			rx_stu_mac = ST_START;
    01B3 EF80      LDI	R24,0xF0
    01B4 93800067  STS	rx_stu_mac,R24
(0145)  			break;
    01B6 C003      RJMP	0x01BA
(0146)  		}
(0147)  		default:
(0148)  		{
(0149)  			rx_stu_mac=ST_START;
    01B7 EF80      LDI	R24,0xF0
    01B8 93800067  STS	rx_stu_mac,R24
(0150)  			break;
    01BA 9029      LD	R2,Y+
    01BB BE2F      OUT	0x3F,R2
    01BC 91F9      LD	R31,Y+
    01BD 91E9      LD	R30,Y+
    01BE 9199      LD	R25,Y+
    01BF 9189      LD	R24,Y+
    01C0 9139      LD	R19,Y+
    01C1 9129      LD	R18,Y+
    01C2 9109      LD	R16,Y+
    01C3 9059      LD	R5,Y+
    01C4 9049      LD	R4,Y+
    01C5 9039      LD	R3,Y+
    01C6 9029      LD	R2,Y+
    01C7 9518      RETI
_rx_pkg_process:
  cmd                  --> R20
  i                    --> R20
    01C8 940E029F  CALL	push_gset1
(0151)  		}
(0152)  	}
(0153) }
(0154) 
(0155) 
(0156) 
(0157) 
(0158) /*void packageProcess(uint08 seqNum) 
(0159) {
(0160) 	uint08 cmd;
(0161) 	uint08 tmp=0;
(0162) 	uint08 tmp2=0;
(0163) 	uint08 tmp3=0;
(0164) 	uint08 mode;
(0165) 	uint16 block_size;
(0166) 	uint16 i;
(0167) 	uint16 tmp16;
(0168) 	uint16 num_bytes=0;
(0169) 	uint32 polling_address=0;
(0170) 	uint32 start_address = address;
(0171) 	cmd = msg_buffer[0];
(0172) 	
(0173) 	//命令CMD_SIGN_ON
(0174) 	if(cmd==CMD_SIGN_ON)
(0175) 	{
(0176) 		num_bytes = 11;
(0177) 		msg_buffer[0] = CMD_SIGN_ON;
(0178) 		msg_buffer[1] = STATUS_CMD_OK;
(0179) 		msg_buffer[2] = 8;
(0180) 		memcpy(msg_buffer+3,"STK500_2",8);
(0181) 	}
(0182) 	//命令CMD_SET_PARAMETER
(0183) 	else if(cmd==CMD_SET_PARAMETER)
(0184) 	{
(0185) 		switch(msg_buffer[1])
(0186) 		{
(0187) 			case PARAM_SCK_DURATION:
(0188) 				
(0189) 				if((msg_buffer[2]) >= 1  ) clockSpeed=SPI_SPEED_2MHZ;
(0190) 				if((msg_buffer[2]) >= 2  ) clockSpeed=SPI_SPEED_1MHZ;
(0191) 				if((msg_buffer[2]) >= 4  ) clockSpeed=SPI_SPEED_500KHZ;
(0192) 				if((msg_buffer[2]) >= 8  ) clockSpeed=SPI_SPEED_250KHZ;
(0193) 				if((msg_buffer[2]) >= 16 ) clockSpeed=SPI_SPEED_125KHZ;
(0194) 				if((msg_buffer[2]) >= 32 ) clockSpeed=SPI_SPEED_62KHZ;
(0195) 				if(EEPROMread(EEP_SCK_DURATION)!=clockSpeed) 
(0196) 				EEPROMwrite(EEP_SCK_DURATION,clockSpeed);
(0197) 				//spi_set_speed(clock_speed);		//因为我这里不用硬件SPI 
(0198) 				break;
(0199) 			case PARAM_RESET_POLARITY:			//区分51和AVR用的,1表示AVR 0表示AT89C
(0200) 				if(resetPolarity != msg_buffer[2])
(0201) 				{
(0202) 					resetPolarity = msg_buffer[2];
(0203) 					EEPROMwrite(EEP_RESET_POLARITY,resetPolarity);				
(0204) 				}
(0205) 				break;
(0206) 			case PARAM_CONTROLLER_INIT:
(0207) 				paramControllerInit = msg_buffer[2];
(0208) 				break;
(0209) 			case PARAM_VADJUST:
(0210) 				vAdjust = msg_buffer[2];
(0211) 				EEPROMwrite(EEP_VOL_ADJUST,vAdjust);
(0212) 				break;
(0213) 			case PARAM_VTARGET:
(0214) 				vTarget = msg_buffer[2]; 
(0215) 				EEPROMwrite(EEP_VOL_TARGET,vTarget);
(0216) 				asm("jmp 0x17FF");
(0217) 				break;	
(0218) 			default:break; 		
(0219) 		}
(0220) 		num_bytes = 2;
(0221) 		msg_buffer[0] = CMD_SET_PARAMETER;
(0222) 		msg_buffer[1] = STATUS_CMD_OK;
(0223) 	}
(0224) 	//命令CMD_GET_PARAMETER
(0225) 	else if(cmd==CMD_GET_PARAMETER)
(0226) 	{
(0227) 		switch(msg_buffer[1])
(0228) 		{
(0229) 			case PARAM_BUILD_NUMBER_LOW:
(0230) 				tmp = CONFIG_PARAM_BUILD_NUMBER_LOW;
(0231) 				break;
(0232) 			case PARAM_BUILD_NUMBER_HIGH:
(0233) 				tmp = CONFIG_PARAM_BUILD_NUMBER_HIGH;
(0234) 				break;
(0235) 			case PARAM_HW_VER:
(0236) 				tmp = CONFIG_PARAM_HW_VER;
(0237) 				break;
(0238) 			case PARAM_SW_MAJOR:
(0239) 				tmp = CONFIG_PARAM_SW_MAJOR;
(0240) 				break;
(0241) 			case PARAM_SW_MINOR:
(0242) 				tmp = CONFIG_PARAM_SW_MINOR;
(0243) 				break;
(0244) 			case PARAM_SCK_DURATION:
(0245) 				tmp = clockSpeed;
(0246) 				break;
(0247) 			case PARAM_RESET_POLARITY:
(0248) 				tmp = resetPolarity;
(0249) 				break;
(0250) 			case PARAM_CONTROLLER_INIT:
(0251) 				tmp = paramControllerInit;
(0252) 				break;
(0253) 			case PARAM_VTARGET:				//目标电压
(0254) 				tmp = vTarget;
(0255) 				break;	
(0256) 			case PARAM_VADJUST:
(0257) 				tmp = vAdjust;				//参考电压
(0258) 				break;
(0259) 			case PARAM_TOPCARD_DETECT:
(0260) 				tmp = TOP_CARD_STK520;
(0261) 				break;	
(0262) 		}
(0263) 		num_bytes = 3;
(0264) 		msg_buffer[0] = CMD_GET_PARAMETER;
(0265) 		msg_buffer[1] = STATUS_CMD_OK;
(0266) 		msg_buffer[2] = tmp;
(0267) 	}
(0268) 	//命令CMD_OSCCAL
(0269) 	else if(cmd==CMD_OSCCAL)
(0270) 	{
(0271) 		num_bytes = 2;
(0272) 		msg_buffer[0] = CMD_OSCCAL;
(0273) 		msg_buffer[1] = STATUS_CMD_OK;
(0274) 	}	
(0275) 	//命令CMD_LOAD_ADDRESS
(0276) 	else if(cmd==CMD_LOAD_ADDRESS)
(0277) 	{
(0278) 		address =  ((unsigned long)msg_buffer[1])<<24;
(0279) 		address |= ((unsigned long)msg_buffer[2])<<16;
(0280) 		address |= ((unsigned long)msg_buffer[3])<<8;
(0281) 		address |= ((unsigned long)msg_buffer[4]);
(0282) 		num_bytes = 2;
(0283) 		msg_buffer[0] = CMD_LOAD_ADDRESS;
(0284) 		msg_buffer[1] = STATUS_CMD_OK;
(0285) 	}
(0286) 	//命令CMD_FIRMWARE_UPGRADE
(0287) 	else if(cmd==CMD_FIRMWARE_UPGRADE)
(0288) 	{
(0289) 		num_bytes = 2;
(0290) 		msg_buffer[0] = CMD_FIRMWARE_UPGRADE;
(0291) 		//msg_buffer[1] = STATUS_CMD_OK;
(0292) 		msg_buffer[1] = STATUS_CMD_FAILED;
(0293) 		asm("jmp 0x17FF");
(0294) 		//进入Firmware upgrade模式
(0295) 	}
(0296) 	//命令CMD_ENTER_PROGMODE_ISP
(0297) 	else if(cmd == CMD_ENTER_PROGMODE_ISP)
(0298) 	{
(0299) 		prgMode=1;
(0300) 		spiEnable();
(0301) 		msDelay(msg_buffer[2]);	
(0302) 		LED_ON2;
(0303) 		for(i=0;i<msg_buffer[4];i++)
(0304) 		{
(0305) 			SPIWrite(msg_buffer[8]);
(0306) 			msDelay(msg_buffer[5]);
(0307) 			SPIWrite(msg_buffer[9]);
(0308) 			msDelay(msg_buffer[5]);
(0309) 			if(msg_buffer[7]==3)		//AVR
(0310) 			{
(0311) 				tmp=SPIWrite(msg_buffer[10]);
(0312) 				msDelay(msg_buffer[5]);				
(0313) 				SPIWrite(msg_buffer[11]);
(0314) 				msDelay(msg_buffer[5]);				
(0315) 			}
(0316) 			else				//AT89S
(0317) 			{
(0318) 				SPIWrite(msg_buffer[10]);
(0319) 				msDelay(msg_buffer[5]);				
(0320) 				tmp=SPIWrite(msg_buffer[11]);
(0321) 				msDelay(msg_buffer[5]);
(0322) 			}
(0323) 			if((tmp==msg_buffer[6])||(msg_buffer[7]==0))
(0324) 			{
(0325) 				i=0xFF;
(0326) 				LED_OFF2;
(0327) 				break;
(0328) 			}
(0329) 			else
(0330) 			{
(0331) 				spiEnable();
(0332) 				msDelay(msg_buffer[2]);	
(0333) 			}
(0334) 		}
(0335) 		num_bytes = 2;
(0336) 		msg_buffer[0] = CMD_ENTER_PROGMODE_ISP;
(0337) 		if(i==0xFF)
(0338) 		{			
(0339) 			msg_buffer[1] = STATUS_CMD_OK;			
(0340) 		}
(0341) 		else
(0342) 		{			
(0343) 			msg_buffer[1] = STATUS_CMD_FAILED;
(0344) 		}		
(0345) 	}
(0346) 	//命令 CMD_LEAVE_PROGMODE_ISP
(0347) 	else if(cmd==CMD_LEAVE_PROGMODE_ISP)
(0348) 	{
(0349) 		prgMode=0;		
(0350) 		spiDisable();
(0351) 		num_bytes = 2;
(0352) 		msg_buffer[0] = CMD_LEAVE_PROGMODE_ISP;
(0353) 		msg_buffer[1] = STATUS_CMD_OK;		
(0354) 	}
(0355) 	//命令CMD_CHIP_ERASE_ISP
(0356) 	else if(cmd==CMD_CHIP_ERASE_ISP)
(0357) 	{
(0358) 		universalComm(msg_buffer[3],msg_buffer[4],msg_buffer[5],msg_buffer[6]);	
(0359) 		//Newer AVR's seems to have a busy bit
(0360) 		//cant test this because I don't have any of these new chips
(0361) 		if(msg_buffer[2]==0)
(0362) 		{
(0363) 			msDelay(msg_buffer[1]);
(0364) 		}
(0365) 		else 	//if(msg_buffer[2]==1)
(0366) 		{
(0367) 			while(universalComm(0xF0,0x00,0x00,0x00)&1);
(0368) 		}		
(0369) 		num_bytes = 2;
(0370) 		msg_buffer[0] = CMD_CHIP_ERASE_ISP;
(0371) 		msg_buffer[1] = STATUS_CMD_OK;			
(0372) 	}
(0373) 	//命令CMD_PROGRAM_FLASH_ISP
(0374) 	else if(cmd==CMD_PROGRAM_FLASH_ISP)
(0375) 	{
(0376) 		block_size = ((unsigned int)msg_buffer[1])<<8;
(0377) 		block_size |= msg_buffer[2];
(0378) 		mode = msg_buffer[3];
(0379) 		LED_FLASH2;
(0380) 		//如果是字写模式
(0381) 		if((mode&1) == 0)
(0382) 		{	
(0383) 			for(i=0;i<block_size;i++)
(0384) 			{	
(0385) 				//If we have an uneven byte programm the
(0386) 				//high byte			
(0387) 				if(i&1)