tvpuarts_fw.h

ti的数字电视芯片 tvp9000的源码

#ifndef TVPUARTS_FW_DOT_H_IS_DEFINED
#define TVPUARTS_FW_DOT_H_IS_DEFINED

/********************************************************************* 
*    Property of Texas Instruments Incorporated, Copyright 2004
*    All rights reserved
**********************************************************************/
/*********************************************************************
*
* Description:
*   private include file for smart card modules
*   It includes the definitions that are not needed for the API:
*   an application program must not include this file.
*   
**********************************************************************/
/***************************************************************************
*   uarts_fw.h Contains all local private definitions that pertain to 
*             the uarts.h modules
*
*   $Revision: $
*
*   $History: TvpUarts_fw.h $
* 
****************************************************************************/

/* Common Constants */
#define TVP_UART_OFFSET     0x04    // Word Offset of address in between UARTs   


/* UART Addresses  (Note that this is word based address/addition */
#define TVP_URB   (TVP_UART_BASE)  // New memory location for UART interfaces 
#define TVP_UTB   (TVP_UART_BASE)     
#define TVP_ASPCR (TVP_UART_BASE+1)
#define TVP_USTAT (TVP_UART_BASE+2)
#define TVP_BRD   (TVP_UART_BASE+3)

/* XON/XOFF Transmission states */
#define TVP_XON_S           0x01    // XON char has been xmitted        
#define TVP_XOFF_S          0x03    // XOFF char has been xmitted       

/* General Purpose UART control bit masks   */
#define TVP_GPU_FREE        0x8000
#define TVP_GPU_SOFT        0x4000
#define TVP_GPU_RST         0x2000	// Reset
#define TVP_GPU_FTOM        0x1000	// Fifo Timeout Mask
#define TVP_GPU_TIM         0x0800	// Transmitter Interrupt Mask
#define TVP_GPU_RIM         0x0400	// Receiver Interrupt Mask
#define TVP_GPU_DBIT        0x0200	// Data Bit size
#define TVP_GPU_EPS         0x0100	// Parity Select
#define TVP_GPU_PEN         0x0080	// Parity Enable
#define TVP_GPU_STP         0x0040	// Stop bits
#define TVP_GPU_STKPAR      0x0020	// Stick Parity
#define TVP_GPU_STBR        0x0010	// Set break
#define TVP_GPU_INTLEV_01   TVP_INTLEV_01   
#define TVP_GPU_INTLEV_04   TVP_INTLEV_04   
#define TVP_GPU_INTLEV_08   TVP_INTLEV_08  
#define TVP_GPU_INTLEV_14   TVP_INTLEV_14   
#define TVP_GPU_HWHS        0x0003	// Hardware handshaking
#define TVP_GPU_CTS_EN      0x0002	// CTS Enable
#define TVP_GPU_RTS_DIS     0x0001	// RTS Disable


/* General Purpose UART USTAT register masks */
#define TVP_GPU_PER_USTAT   0x8000	// Parity Error (Valid prior to reading data)
#define TVP_GPU_FTO_USTAT   0x4000  // Fifo Time Out (Data is ready)
#define TVP_GPU_BI_USTAT    0x2000  // Break Interrupt
#define TVP_GPU_TEMT_USTAT  0x1000  // Transmitter Empty
#define TVP_GPU_THRE_USTAT  0x0800  // Transmitter Holding Register Empty
#define TVP_GPU_FE_USTAT    0x0400  // Framing Error (Valid prior to reading data)
#define TVP_GPU_OE_USTAT    0x0200  // Overflow error
#define TVP_GPU_DR_USTAT    0x0100  // Data Ready
#define TVP_GPU_RFCNT_USTAT 0x00f8  // Receive Fifo Count
#define TVP_GPU_INT_USTAT   0x0004  // interrupt (Used for testing)
#define TVP_GPU_TXFF_USTAT  0x0002  // Transmitter Fifo Full


#define TVP_ANY_ERROR       (TVP_GPU_PER_USTAT + TVP_GPU_BI_USTAT +  TVP_GPU_FE_USTAT)

/*    Structure and union definitions for the Uart             */
typedef struct {
    unsigned long state;         // Interface state machine Used to indicate 
                                 //  the external receiver XON/XOFF state 
    unsigned long loc_state;     // Interface state machine Used to indicate 
                                 //  if the local receiver XON/XOFF state 
    Tvp_True_False xmitting_flag;// Used to identify if a transmission is 
                                 //  currently in progress
    TvpUartStatusOut *status;   // Status pointer that will indicate 
                                 //  completion status of UART.       
    TvpUartDataBuffer *recv_buf;// Received char is placed in this 
                                 //  storage location on a DR interrupt  
    TvpUartDataStatus *sts_buf;    // Received char status, this buf is 
                                 //  parallel to receive buffer       
    TvpUartDataSize recv_buf_size;  
    TvpUartDataSize send_buf_size;  
    TvpUartDataBuffer *send_buf;   // Send buffer
    unsigned long send_buf_ptr;  // Pointer indicating the current 
                                 //  position of the send transaction 

    unsigned long recv_buf_hd_ptr;  // Pointer indicating the current 
                                    //  position of a receive transaction

    unsigned long recv_buf_tl_ptr;  // Pointer indicating the current 
                                    //  position of a receive transaction

    TvpUartXoffThresh xoff_thres;  // User defined number of received 
                                 //  characters that have not been 
                                 //  processed before an XOFF command 
                                 //  is issued to the sender      

    TvpIntNum int_num;           // Interrupt number that the UART driver 
                                 //  interface will use to interrupt 
                                 //  the user
    Tvp_En_Dis xon_flag;         // Flag to indicate XON/XOFF 
                                 //  enable or disable
} TvpUartGlbl_s;

typedef struct {           
   unsigned long data;           // Read and Write Fifo
   unsigned long aspcr;          // Control register
   unsigned long ustat;          // Status register
   unsigned long brd;            // Baud rate divisor
   unsigned long reserved[12];   // Reserved words between UART_0 and UART_1
} TvpUartRegMap_s;


// Prototypes

#ifdef __cplusplus
extern "C" {
#endif

#ifdef DEBUG_UARTS_TI
FERROR tvpUartGetUartMemory (TvpUartUartNum uart_adr, TvpUartRegMap_s *hwMem, uartGlbl *swMem);
#endif 

#ifdef __cplusplus
 };
#endif

#endif