tvpebi.h

ti的数字电视芯片 tvp9000的源码

#ifndef TVP_EBI_DOT_H_IS_DEFINED
#define TVP_EBI_DOT_H_IS_DEFINED

/***************************************************************************** 
*    Property of Texas Instruments Incorporated, Copyright 2004
*    All rights reserved
******************************************************************************/
/*********************************************************************
*
* Description:
*  ebi.h contains all private global defines.
*   
*   
**********************************************************************/
/*********************************************************************
*
* $Revision: $
*
* $History: TvpEbi.h $
* 
*********************************************************************/

// this structure is used to pass parameters to the ebiConfig() function
typedef struct 
{
  unsigned long cfg0;   // config register 0
  unsigned long cfg1;   // config register 1
  unsigned long cfg2;   // config register 2
  unsigned long cfg3;   // config register 3
  unsigned long cfg4;   // config register 4
} TvpEbi;

// this struct is used to read parms from the ebiErrSet() function
typedef struct 
{
  unsigned long wait_err_cs;  // CS
  unsigned long wait_err_rw;  // read/write
  unsigned long wait_err_add; // address
} TvpEbiErr;

typedef unsigned long TvpExtCs;  // to define EBI_CSx
typedef unsigned long TvpEbiInt; // to define int states

#define TVP_EBI_MAX  5     // maximum extension bus chip select

#define TVP_EBI_CS0  0     // extension bus chip select 0 (Boot ROM looks for FLASH Here)
#define TVP_EBI_CS1  1     // extension bus chip select 1
#define TVP_EBI_CS2  2     // extension bus chip select 2
#define TVP_EBI_CS3  3     // extension bus chip select 3
#define TVP_EBI_CS4  4     // extension bus chip select 4
#define TVP_EBI_CS5  5     // extension bus chip select 5

#define TVP_EBI_WR_DATA_START(A)    ((A & 0x1f) << 24)  // cycle ext data is valid for writes
#define TVP_EBI_WR_DATA_END(A)      ((A & 0x1f) << 16)  // cycle ext data is tri-stated for writes
#define TVP_EBI_WR_XFER_END(A)      ((A & 0x1f) <<  8)  // cycle write transaction complets
#define TVP_EBI_REG_INIT(A)         ((A & 0x01) <<  5)  // 1 = sw has written register
#define TVP_EBI_DATA_WIDTH16(A)     ((A & 0x01) <<  4)  // 0 = width 8, 1 = width 16
#define TVP_EBI_WAIT_POLARITY(A)    ((A & 0x01) <<  3)  // 0 = active low, 1 = active high
#define TVP_EBI_CS_POLARITY(A)      ((A & 0x01) <<  2)  // 0 = active low, 1 = active high
#define TVP_EBI_OE_POLARITY(A)      ((A & 0x01) <<  1)  // 0 = active low, 1 = active high
#define TVP_EBI_WE_POLARITY(A)      ((A & 0x01) <<  0)  // 0 = active low, 1 = active high

// config register 1

#define TVP_EBI_WAIT_START(A)       ((A & 0x1f) << 24)  // 1st cyc wait is observed (>=03) 1f no wait
#define TVP_EBI_WR_ADR_START(A)     ((A & 0x1f) << 16)  // cycle adr is valid for writes
#define TVP_EBI_WR_CS_START(A)      ((A & 0x1f) <<  8)  // cycle cs is asserted for writes
#define TVP_EBI_WR_CS_END(A)        ((A & 0x1f) <<  0)  // cycle cs is deasserted for writes

// config register 2

#define TVP_EBI_RD_ADR_START(A)     ((A & 0x1f) << 16)  // cycle that adr is valid for reads
#define TVP_EBI_RD_CS_START(A)      ((A & 0x1f) <<  8)  // cycle that cs is asserted for reads
#define TVP_EBI_RD_CS_END(A)        ((A & 0x1f) <<  0)  // cycle that adr is deasserted for reads
                                 
// config register 3

#define TVP_EBI_OE_START(A)         ((A & 0x1f) << 24)  // cycle that oe is asserted for reads
#define TVP_EBI_OE_END(A)           ((A & 0x1f) << 16)  // cycle that oe is deasserted for reads
#define TVP_EBI_WE_START(A)         ((A & 0x1f) <<  8)  // cycle that we is asserted for reads
#define TVP_EBI_WE_END(A)           ((A & 0x1f) <<  0)  // cycle that we is deasserted for reads

// config register 4

#define TVP_EBI_RD_XFER_END(A)     ((A & 0x1f) << 24)  // cycle that read transaction completes
#define TVP_EBI_RD_GRAB(A)         ((A & 0x1f) << 16)  // cycle that read data is registered
#define TVP_EBI_TURN_AROUND(A)     ((A & 0x1f) <<  8)  // cycles of delay when switching device or direction
#define TVP_EBI_WAIT_MAX(A)        ((A & 0x1f) <<  0)  // max cycles that wait can be asserted before error

// ext_int_cfg register

#define TVP_EXT_INT2_POLARITY(A)    ((A & 0x01) <<  2)  // 0 = active low, 1 = active high
#define TVP_EXT_INT1_POLARITY(A)    ((A & 0x01) <<  1)  // 0 = active low, 1 = active high
#define TVP_EXT_INT0_POLARITY(A)    ((A & 0x01) <<  0)  // 0 = active low, 1 = active high

#define TVP_EBI_DMA_MAX_SIZE        0xfffff
#define TVP_CS_MASK                 0xf0000000
#define TVP_CS_SDRAM                0x10000000
#define TVP_EBI_MAX_OFFSET          0x1ffffff
#define TVP_EBI_DMA_FIX_ADDR        0x10000000
#define TVP_EBI_DMA_FIX_BYTE        0x20000000
#define TVP_EBI_DMA_SDRAM_2_EBI     0x40000000
#define TVP_EBI_DMA_GO              0x80000000

#define TVP_EBI_DMA_CMD_PTR_MASK    0x6
#define TVP_EBI_DMA_CMD_PTR_SHIFT   1
#define TVP_EBI_DMA_MAX_SLOT        3

typedef enum {
   TVP_EBI_DMA_NOT_FIXED,
   TVP_EBI_DMA_FIXED_ADDRESS,
   TVP_EBI_DMA_FIXED_BYTE   
} TvpEbiDmaFixed;

typedef struct {
   unsigned long msw;
   unsigned long asw;
   unsigned long lsw;
} TvpEbiDmaCW_s;

#ifdef __cplusplus
extern "C" {
#endif

TVP_FERROR tvpEbiConfig(TvpExtCs , TvpEbi *);  // configure extension bus
void tvpEbiErrStat(TvpEbiErr *);         // read error status
void tvpEbiIntSet(TvpEbiInt );           // ebi interrupt polarity set

#ifdef __cplusplus
};
#endif

#endif