tvpint.h

ti的数字电视芯片 tvp9000的源码

#ifndef TVPINT_DOT_H_IS_DEFINED
#define TVPINT_DOT_H_IS_DEFINED

/***************************************************************************** 
*    Property of Texas Instruments Incorporated, Copyright 2004
*    All rights reserved
******************************************************************************/
/*********************************************************************
*
* Description:
*  TvpInt.h contains all global interrupt defines.
*   
*   
**********************************************************************/
/*********************************************************************
*
* $Revision: $
*
* $History: TvpInt.h $
* 
**********************************************************************/

#define TVP_INT_NULL       0x00000000  // when no parameter is passed

#define TVP_MASK_IRQ       0x0fffffff  // mask all irqs at the mask level  
#define TVP_MASK_FIQ       0x1fffffff  // mask all fiqs at the mask level
#define TVP_MASK_IRQ_A     0x3fffffff  // mask all irqs at the all level (No mask change)
#define TVP_MASK_FIQ_A     0x7fffffff  // mask all fiqs at the all level (No mask change)
#define TVP_MASK_IRQFIQ_A  0xffffffff  // mask all irqs and fiqs at the all level (no mask change)

#define TVP_IRQFIQ_SELECT  0x0fffffff  // default slelect for irqs and fiqs

#define TVP_FIQ_ACTIVE     0x20        // FIQ Active bit in FIQ Vector number word
#define TVP_IRQ_ACTIVE     0x20        // IRQ Active bit in IRQ Vector number word

#define TVP_MAX_FIQ_INTS   16
#define TVP_FIQ_SRC_BITMASK (TVP_MAX_FIQ_INTS-1)

#define TVP_MAX_IRQ_INTS   32
#define TVP_IRQ_SRC_BITMASK (TVP_MAX_IRQ_INTS-1)

#define TVP_MAX_INTS       64

// API typedefs

typedef unsigned long TvpIntNum;          // interrupt # 0-#define TVP_MAXINTERRUPT
typedef unsigned long TvpIntSelect;       // unsigned long bit mask
typedef unsigned long TvpIntPriority;     // 0-31 interrupt priority
typedef unsigned long TvpIntMask;         // 0-31 interrupt # to mask 0xff is all
typedef struct   {                        // interrupt set function parameter
  unsigned long  intr;                    // interrupt
  unsigned long  parm1;                   // parameter 1
  unsigned long  parm2;                   // parameter 2
  unsigned long  parm3;                   // parameter 3
}TvpIntParm;

typedef struct {
  unsigned long total;                    // total timer count
  unsigned long count;                    // number of times in since restart
  unsigned long high;                     // high count since restart
  unsigned long low;                      // low count since restart
}TvpIntDbg ;
   
typedef struct {
  unsigned long irqMaskAll;               // current irq mask all state
  unsigned long fiqMaskAll;               // current fiq mask all state
  unsigned long intMask;                  // current irq or fiq mask
}TvpIntMaskRead;

  
typedef void (*TvpIntExec)(TvpIntParm*);  // for indirect function execution

extern TvpIntExec TvpIntVecsGlbl[];       // interrupt vectors

/*******************************************
* Long Branch Function Pointer Structures
*******************************************/
typedef TVP_FERROR  (*tvpFiqHookFuncIndType)(TvpIntNum, TvpIntPriority,  TvpIntExec);
 
/*********************************************************************
* API FUNCTIONS
*********************************************************************/
#ifdef __cplusplus
extern "C" {
#endif

void        tvpIntInit(void);                   // init functions for IRQ intc's
TVP_FERROR  tvpIntMaskSet(TvpIntMask);          // set interrupt masks
TVP_FERROR  tvpIntMaskReset(TvpIntMask);        // reset interrupt masks
void        tvpIntMaskRead(TvpIntMaskRead *);   // read all masks        
void        tvpCIrqPass(unsigned long intNum);
void        tvpCIrqHandler(void);

void        tvpFiqInit(void);                   // init functions for FIQ intc's
TVP_FERROR  tvpFiqMaskSet(TvpIntMask);          // set interrupt masks
TVP_FERROR  tvpFiqMaskReset(TvpIntMask);        // reset interrupt masks
void        tvpFiqMaskRead(TvpIntMaskRead *);   // read all masks        

TVP_FERROR  tvpIntHook(TvpIntNum, TvpIntPriority,  TvpIntExec);// hook and define an IRQ

// Permit an external definition of tvpFiqHook for OS support
#if !defined (TVP_FIQ_HOOK_EXTERNAL)
TVP_FERROR  tvpFiqHook(TvpIntNum, TvpIntPriority,  TvpIntExec);// hook and define an IRQ
#endif

TVP_FERROR  tvpIntSet(TvpIntParm*);             // set IRQ n
TVP_FERROR  tvpFiqSet(TvpIntParm*);             // set FIQ n
TVP_FERROR  tvpIntClear(TvpIntParm*);           // clear int n
TVP_FERROR  tvpFiqClear(TvpIntParm*);           // set FIQ n

void    tvpIrqEnable(void);                     // irq enable
void    tvpIrqDisable(void);                    // irq disable
void    tvpSwiirqEnable(void);                  // swi irq enable
void    tvpSwiirqDisable(void);                 // swi irq disable

void    tvpFiqEnable(void);                     // fiq enable
void    tvpFiqDisable(void);                    // fiq disable
void    tvpSwifiqEnable(void);                  // swi fiq enable
void    tvpSwifiqDisable(void);                 // swi fiq disable

#ifdef __cplusplus
};
#endif


// These defines represent the hardwired position in the traffic controller
// and can not be changed. What can be changed is the priority of each of
// these interrupts. There is a corrsponding set of 32 interrupt priority
// registers that control the order and processing of the actual interrupts
// The lower the number, the higher the priority. So if you wanted Hardwired
// position 0 to be the highest priority, you would place a 0 in that priority
// array position

// Interrupts that are set to the same priority will be scanned on
// greater then HW position basis

// Also note that each of these HW interrupts can generate either a FIQ or
// an IRQ. The interrupt select register controls that. If they are set to
// generate an IRQ then the cooresponding FIQ automatically becomes a SW
// interrupt. The priorities of the SW and HW interrupts can be set
// independantly

#define TVP_MAX_FIQ_VALUE  31    // FIQ's are ranged 0-31
#define TVP_MAX_IRQ_VALUE  31    // IRQ's are ranged 0-31
#define TVP_MAX_INT_VALUE  63    // IRQ 0-31 and Callbacks 32-63

#endif