tvpint926.h

ti的数字电视芯片 tvp9000的源码

#ifndef TVPINT926_DOT_H_IS_DEFINED
#define TVPINT926_DOT_H_IS_DEFINED

/***************************************************************************** 
*    Property of Texas Instruments Incorporated, Copyright 2004
*    All rights reserved
******************************************************************************/
/*********************************************************************
*
* Description:
*  TvpInt926.h contains all global interrupt defines.
*   
*   
**********************************************************************/
/*********************************************************************
*
* $Revision: $
*
* $History: TvpInt926.h $
* 
*********************************************************************/

#define   TVP_MAXINTERRUPT   64
                                                 
#define TVP_IRQ_REQ        (TVP_SYS_CONFIG_BASE+0x8)   // Pending IRQ requests
#define TVP_IRQ_MASK       (TVP_SYS_CONFIG_BASE+0xa)   // Bitwise-mask of IRQ requests
#define TVP_IRQ_STATUS     (TVP_SYS_CONFIG_BASE+0xc)   // Result of applying IRQ_MASK to IRQ_REQ
#define TVP_IRQ_SRC        (TVP_SYS_CONFIG_BASE+0xe)   // Specifies the highest priority IRQ active in IRQ_STATUS
#define TVP_IRQ_MASK_ALL   (TVP_SYS_CONFIG_BASE+0xf)   // Mask all IRQ requests

#define TVP_IRQ_REQ_SET    (TVP_SYS_CONFIG_BASE+0xc4)  // Bitwise-set for IRQ_REQ register
#define TVP_IRQ_REQ_CLR    (TVP_SYS_CONFIG_BASE+0xc6)  // Bitwise-clear for IRQ_REQ register
                                                  
// interrupt sources with value

// place holder for irqs (INTS) and fiqs
// all irqs are physically 0-31
// all fiqs are physically 0-15

#define TVP_INT_SW14        31  
#define TVP_INT_SW13        30  
#define TVP_INT_SW12        29  
#define TVP_INT_SW11        28  
#define TVP_INT_SW10        27  
#define TVP_INT_SW09        26  
#define TVP_INT_SW08        25  
#define TVP_INT_SW07        24  
#define TVP_INT_SW06        23  
#define TVP_INT_SW05        22  
#define TVP_INT_SW04        21  
#define TVP_INT_SW03        20  
#define TVP_INT_SW02        19  
#define TVP_INT_SW01        18  
#define TVP_INT_SW00        17  

#define TVP_INT_VBI_FRAME   15  
#define TVP_INT_VBI_END0    14  
#define TVP_INT_VBI_STRT    13  
#define TVP_INT_TPPIRQ      12  
#define TVP_INT_SC0         11
#define TVP_INT_TIMER2      10  
#define TVP_INT_TIMER1      9  
#define TVP_INT_TIMER0      8  
#define TVP_INT_UART1       7  
#define TVP_INT_UART0       6  
#define TVP_INT_GPIO        5
#define TVP_INT_I2C1        4  
#define TVP_INT_I2C0        3  
#define TVP_INT_IR1         2  
#define TVP_INT_IR0         1  
#define TVP_INT_EBI         0  

// FIQ (Hardware) Interrupts
#define TVP_FIQ_SW03        15  
#define TVP_FIQ_SW02        14  
#define TVP_FIQ_SW01        13  
#define TVP_FIQ_SW00        12  
#define TVP_FIQ_SYS         11  
#define TVP_FIQ_BB          10  
#define TVP_FIQ_DM          9  
#define TVP_FIQ_NV          8  
#define TVP_FIQ_AD          7  
#define TVP_FIQ_VC          6  
#define TVP_FIQ_PS          5  
#define TVP_FIQ_EOP         4  
#define TVP_FIQ_DMA         3  
#define TVP_FIQ_STC         2  
#define TVP_FIQ_DEBUG       1  
#define TVP_FIQ_ILINK       0  

// interrupt sources with PRIORITY select
// designates the current priority - no two can be the same
// each irq or fiq can have a priority of 0-31. 31 is highest priority
// These are the default priorities for the interrupts. The
//  application may change these values in the tvpIntHook() function.
// fiqs always have a higher priority than irqs

#define TVP_INTP_SW14        0  
#define TVP_INTP_SW13        1  
#define TVP_INTP_SW12        2  
#define TVP_INTP_SW11        3  
#define TVP_INTP_SW10        4  
#define TVP_INTP_SW09        5  
#define TVP_INTP_SW08        6 
#define TVP_INTP_SW07        7  
#define TVP_INTP_SW06        8  
#define TVP_INTP_SW05        9  
#define TVP_INTP_SW04        10  
#define TVP_INTP_SW03        11  
#define TVP_INTP_SW02        12  
#define TVP_INTP_SW01        13  
#define TVP_INTP_SW00        14  

#define TVP_INTP_VBI_FRAME   15  
#define TVP_INTP_VBI_END0    16  
#define TVP_INTP_VBI_STRT    17  
#define TVP_INTP_TPPIRQ      18  
#define TVP_INTP_SC0         30
#define TVP_INTP_TIMER2      19  
#define TVP_INTP_TIMER1      20  
#define TVP_INTP_TIMER0      21  
#define TVP_INTP_UART1       22  
#define TVP_INTP_UART0       23  
#define TVP_INTP_GPIO        24  
#define TVP_INTP_I2C2        25  
#define TVP_INTP_I2C1        26  
#define TVP_INTP_I2C0        27  
#define TVP_INTP_IR1         28  
#define TVP_INTP_IR0         29  
#define TVP_INTP_EBI         31  


// FIQ (Hardware) Interrupts Priority Defaults
// This priority of FIQ's has been through extensive testing
// Changing these priorities may have system wide impacts on 
//  the TVP9000 to include intdocuction of jitter to the video
//  subsystem. It may also negatively impact the 
//  throughput of packet processing. 
#define TVP_FIQP_SW03       0  
#define TVP_FIQP_SW02       1  
#define TVP_FIQP_SW01       2  
#define TVP_FIQP_SW00       3  
#define TVP_FIQP_SYS        5  
#define TVP_FIQP_BB         6  
#define TVP_FIQP_DM         7  
#define TVP_FIQP_NV         8  
#define TVP_FIQP_AD         9  
#define TVP_FIQP_VC         10  
#define TVP_FIQP_PS         11  
#define TVP_FIQP_EOP        13
#define TVP_FIQP_DMA        12  
#define TVP_FIQP_STC        14  
#define TVP_FIQP_DEBUG      15  
#define TVP_FIQP_ILINK      4  
            

#endif