dma-fdc.s

用于汇编领域的,运用于OS的MAIN函数.基于硬件基础的源代码

dma_setup: # set the location of read buffer into es:bx and call dma_setup
           # this routine will communicate this addr to dma controller,
		   # tell num of sect is 1, and open ch 2, and enable dma 1
		   # To use this routine, fdc shoud put the addr of read buf into es:bx
		   # and be ready to accept data from dma controller
dma_disble:  # disable DMA 1
outb $0x14, $0x8  # output 0001 0100 to comand register to diable and init 8237a
mode:        # setup DMA mode for channel 2
outb $0x56, $0xb  # output 0101 0110 to mode register
                 # single transfer, addr increment, no autoinit, write, ch 2
split_address:   # split addr in es:bx into pppp hhhh hhhh llll llll
                 # es was ssss ssss ssss ssss, bx was oooo oooo oooo oooo
				 # the physical addr is 
				 #   ssss ssss ssss ssss 0000 + oooo oooo oooo oooo
				 # = pppp hhhh hhhh llll llll 
movw %es, %ax    # load ssss ssss ssss ssss (the location of read buffer) to ax
                 # es points to the base of read buf into which dma will write
				 # data it reads from floppy
movb $0x4, %cl   # load count value into cl
shlw %cl, %ax    # ax now becomes ssss ssss ssss oooo 
addw %bx, %ax    # add offset. ax is now hhhh hhhh llll llll
jc   carry
no_carry:
movw %es, %bx    # bx now has ssss ssss ssss ssss
movb $0x4, %cl   # 
shrb %cl, %bh    # bh now has pppp
jmp buffer_address
carry:
movw %es, %bx    # bx has ssss ssss ssss ssss
movb $0x4, %cl
shrb %cl, %bh    # bh has high ssss
adc $0x0, %bh    # bh now has pppp
buffer_address:  # output address to 8237a and page register
outb %al, $0xc    # reset flip-flop
outb %al, $0x4    # output low-order address byte nnnn nnnn to addr register
movb %ah, %al    # load high-order address byte hhhh hhhh into al
outb  %al, $0x4   # output high-order address byte hhhh hhhh to addr register
movb %bh, %al    # load page value pppp into al
outb %bh, $0x81   # load page register with pppp
count_value:     # load count register with value 511 to transfer 512 bytes
outb %al, $0xc     # rest flip-flop
outb $0xff, $0x5  # load low-order byte 255 of count value into count register
outb $0x1, $0x5   # load high-order byte 1 of count value into count register
channel_unmask:  # release eventual channel masking
outb $0x2, $0xa   # output 0000 0010 to release channel 2
dma1_enable:     # enable DMA 1
outb $0x10, $0x8  # output 0001 0000 to command register to enable 8237a.

ret