📄 pic16f946.h
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#ifndef _HTC_H_
//#warning Header file pic16f946.h included directly. Use #include <htc.h> instead.
#endif
/* header file for the MICROCHIP PIC microcontroller
*/
#ifndef __PIC16F946_H
#define __PIC16F946_H
// Special function register definitions
static volatile unsigned char TMR0 @ 0x001;
static volatile unsigned char PCL @ 0x002;
static volatile unsigned char STATUS @ 0x003;
static unsigned char FSR @ 0x004;
static volatile unsigned char PORTA @ 0x005;
static volatile unsigned char PORTB @ 0x006;
static volatile unsigned char PORTC @ 0x007;
static volatile unsigned char PORTD @ 0x008;
static volatile unsigned char PORTE @ 0x009;
static volatile unsigned char PCLATH @ 0x00A;
static volatile unsigned char INTCON @ 0x00B;
static volatile unsigned char PIR1 @ 0x00C;
static volatile unsigned char PIR2 @ 0x00D;
static volatile unsigned char TMR1L @ 0x00E;
static volatile unsigned char TMR1H @ 0x00F;
static unsigned char T1CON @ 0x010;
static volatile unsigned char TMR2 @ 0x011;
static unsigned char T2CON @ 0x012;
static volatile unsigned char SSPBUF @ 0x013;
static volatile unsigned char SSPCON @ 0x014;
static volatile unsigned char CCPR1L @ 0x015;
static volatile unsigned char CCPR1H @ 0x016;
static volatile unsigned char CCP1CON @ 0x017;
static volatile unsigned char RCSTA @ 0x018;
static volatile unsigned char TXREG @ 0x019;
static volatile unsigned char RCREG @ 0x01A;
static volatile unsigned char CCPR2L @ 0x01B;
static volatile unsigned char CCPR2H @ 0x01C;
static volatile unsigned char CCP2CON @ 0x01D;
static volatile unsigned char ADRESH @ 0x01E;
static volatile unsigned char ADCON0 @ 0x01F;
static bank1 unsigned char OPTION @ 0x081;
static volatile bank1 unsigned char TRISA @ 0x085;
static volatile bank1 unsigned char TRISB @ 0x086;
static volatile bank1 unsigned char TRISC @ 0x087;
static volatile bank1 unsigned char TRISD @ 0x088;
static volatile bank1 unsigned char TRISE @ 0x089;
static bank1 unsigned char PIE1 @ 0x08C;
static bank1 unsigned char PIE2 @ 0x08D;
static volatile bank1 unsigned char PCON @ 0x08E;
static volatile bank1 unsigned char OSCCON @ 0x08F;
static bank1 unsigned char OSCTUNE @ 0x090;
static bank1 unsigned char ANSEL @ 0x091;
static bank1 unsigned char PR2 @ 0x092;
static bank1 unsigned char SSPADD @ 0x093;
static volatile bank1 unsigned char SSPSTAT @ 0x094;
static bank1 unsigned char WPUB @ 0x095;
static bank1 unsigned char IOCB @ 0x096;
static bank1 unsigned char CMCON1 @ 0x097;
static volatile bank1 unsigned char TXSTA @ 0x098;
static bank1 unsigned char SPBRG @ 0x099;
static volatile bank1 unsigned char CMCON0 @ 0x09C;
static bank1 unsigned char VRCON @ 0x09D;
static volatile bank1 unsigned char ADRESL @ 0x09E;
static bank1 unsigned char ADCON1 @ 0x09F;
static volatile bank2 unsigned char WDTCON @ 0x105;
static volatile bank2 unsigned char LCDCON @ 0x107;
static volatile bank2 unsigned char LCDPS @ 0x108;
static volatile bank2 unsigned char LVDCON @ 0x109;
static volatile bank2 unsigned char EEDATL @ 0x10C;
/* Alternate definition */
static volatile bank2 unsigned char EEDATA @ 0x10C;
static bank2 unsigned char EEADRL @ 0x10D;
/* Alternate definition */
static bank2 unsigned char EEADR @ 0x10D;
static volatile bank2 unsigned char EEDATH @ 0x10E;
static bank2 unsigned char EEADRH @ 0x10F;
static bank2 unsigned char LCDDATA0 @ 0x110;
static bank2 unsigned char LCDDATA1 @ 0x111;
static bank2 unsigned char LCDDATA2 @ 0x112;
static bank2 unsigned char LCDDATA3 @ 0x113;
static bank2 unsigned char LCDDATA4 @ 0x114;
static bank2 unsigned char LCDDATA5 @ 0x115;
static bank2 unsigned char LCDDATA6 @ 0x116;
static bank2 unsigned char LCDDATA7 @ 0x117;
static bank2 unsigned char LCDDATA8 @ 0x118;
static bank2 unsigned char LCDDATA9 @ 0x119;
static bank2 unsigned char LCDDATA10 @ 0x11A;
static bank2 unsigned char LCDDATA11 @ 0x11B;
static bank2 unsigned char LCDSE0 @ 0x11C;
static bank2 unsigned char LCDSE1 @ 0x11D;
static bank2 unsigned char LCDSE2 @ 0x11E;
static volatile bank3 unsigned char TRISF @ 0x185;
static volatile bank3 unsigned char TRISG @ 0x187;
static volatile bank3 unsigned char PORTF @ 0x188;
static volatile bank3 unsigned char PORTG @ 0x189;
static volatile bank3 unsigned char EECON1 @ 0x18C;
static volatile bank3 unsigned char EECON2 @ 0x18D;
static bank3 unsigned char LCDDATA12 @ 0x190;
static bank3 unsigned char LCDDATA13 @ 0x191;
static bank3 unsigned char LCDDATA14 @ 0x192;
static bank3 unsigned char LCDDATA15 @ 0x193;
static bank3 unsigned char LCDDATA16 @ 0x194;
static bank3 unsigned char LCDDATA17 @ 0x195;
static bank3 unsigned char LCDDATA18 @ 0x196;
static bank3 unsigned char LCDDATA19 @ 0x197;
static bank3 unsigned char LCDDATA20 @ 0x198;
static bank3 unsigned char LCDDATA21 @ 0x199;
static bank3 unsigned char LCDDATA22 @ 0x19A;
static bank3 unsigned char LCDDATA23 @ 0x19B;
static bank3 unsigned char LCDSE3 @ 0x19C;
static bank3 unsigned char LCDSE4 @ 0x19D;
static bank3 unsigned char LCDSE5 @ 0x19E;
/* Definitions for STATUS register */
static volatile bit CARRY @ ((unsigned)&STATUS*8)+0;
static volatile bit DC @ ((unsigned)&STATUS*8)+1;
static volatile bit ZERO @ ((unsigned)&STATUS*8)+2;
static volatile bit PD @ ((unsigned)&STATUS*8)+3;
static volatile bit TO @ ((unsigned)&STATUS*8)+4;
static bit RP0 @ ((unsigned)&STATUS*8)+5;
static bit RP1 @ ((unsigned)&STATUS*8)+6;
static bit IRP @ ((unsigned)&STATUS*8)+7;
/* Definitions for PORTA register */
static volatile bit RA0 @ ((unsigned)&PORTA*8)+0;
static volatile bit RA1 @ ((unsigned)&PORTA*8)+1;
static volatile bit RA2 @ ((unsigned)&PORTA*8)+2;
static volatile bit RA3 @ ((unsigned)&PORTA*8)+3;
static volatile bit RA4 @ ((unsigned)&PORTA*8)+4;
static volatile bit RA5 @ ((unsigned)&PORTA*8)+5;
static volatile bit RA6 @ ((unsigned)&PORTA*8)+6;
static volatile bit RA7 @ ((unsigned)&PORTA*8)+7;
/* Definitions for PORTB register */
static volatile bit RB0 @ ((unsigned)&PORTB*8)+0;
static volatile bit RB1 @ ((unsigned)&PORTB*8)+1;
static volatile bit RB2 @ ((unsigned)&PORTB*8)+2;
static volatile bit RB3 @ ((unsigned)&PORTB*8)+3;
static volatile bit RB4 @ ((unsigned)&PORTB*8)+4;
static volatile bit RB5 @ ((unsigned)&PORTB*8)+5;
static volatile bit RB6 @ ((unsigned)&PORTB*8)+6;
static volatile bit RB7 @ ((unsigned)&PORTB*8)+7;
/* Definitions for PORTC register */
static volatile bit RC0 @ ((unsigned)&PORTC*8)+0;
static volatile bit RC1 @ ((unsigned)&PORTC*8)+1;
static volatile bit RC2 @ ((unsigned)&PORTC*8)+2;
static volatile bit RC3 @ ((unsigned)&PORTC*8)+3;
static volatile bit RC4 @ ((unsigned)&PORTC*8)+4;
static volatile bit RC5 @ ((unsigned)&PORTC*8)+5;
static volatile bit RC6 @ ((unsigned)&PORTC*8)+6;
static volatile bit RC7 @ ((unsigned)&PORTC*8)+7;
/* Definitions for PORTD register */
static volatile bit RD0 @ ((unsigned)&PORTD*8)+0;
static volatile bit RD1 @ ((unsigned)&PORTD*8)+1;
static volatile bit RD2 @ ((unsigned)&PORTD*8)+2;
static volatile bit RD3 @ ((unsigned)&PORTD*8)+3;
static volatile bit RD4 @ ((unsigned)&PORTD*8)+4;
static volatile bit RD5 @ ((unsigned)&PORTD*8)+5;
static volatile bit RD6 @ ((unsigned)&PORTD*8)+6;
static volatile bit RD7 @ ((unsigned)&PORTD*8)+7;
/* Definitions for PORTE register */
static volatile bit RE0 @ ((unsigned)&PORTE*8)+0;
static volatile bit RE1 @ ((unsigned)&PORTE*8)+1;
static volatile bit RE2 @ ((unsigned)&PORTE*8)+2;
static volatile bit RE3 @ ((unsigned)&PORTE*8)+3;
static volatile bit RE4 @ ((unsigned)&PORTE*8)+4;
static volatile bit RE5 @ ((unsigned)&PORTE*8)+5;
static volatile bit RE6 @ ((unsigned)&PORTE*8)+6;
static volatile bit RE7 @ ((unsigned)&PORTE*8)+7;
/* Definitions for INTCON register */
static volatile bit RBIF @ ((unsigned)&INTCON*8)+0;
// Alternate definition for backward compatibility
static volatile bit RABIF @ ((unsigned)&INTCON*8)+0;
static volatile bit INTF @ ((unsigned)&INTCON*8)+1;
static volatile bit T0IF @ ((unsigned)&INTCON*8)+2;
static bit RBIE @ ((unsigned)&INTCON*8)+3;
// Alternate definition for backward compatibility
static bit RABIE @ ((unsigned)&INTCON*8)+3;
static bit INTE @ ((unsigned)&INTCON*8)+4;
static bit T0IE @ ((unsigned)&INTCON*8)+5;
static bit PEIE @ ((unsigned)&INTCON*8)+6;
static bit GIE @ ((unsigned)&INTCON*8)+7;
/* Definitions for PIR1 register */
static volatile bit TMR1IF @ ((unsigned)&PIR1*8)+0;
static volatile bit TMR2IF @ ((unsigned)&PIR1*8)+1;
static volatile bit CCP1IF @ ((unsigned)&PIR1*8)+2;
static volatile bit SSPIF @ ((unsigned)&PIR1*8)+3;
static volatile bit TXIF @ ((unsigned)&PIR1*8)+4;
static volatile bit RCIF @ ((unsigned)&PIR1*8)+5;
static volatile bit ADIF @ ((unsigned)&PIR1*8)+6;
static volatile bit EEIF @ ((unsigned)&PIR1*8)+7;
/* Definitions for PIR2 register */
static volatile bit CCP2IF @ ((unsigned)&PIR2*8)+0;
static volatile bit LVDIF @ ((unsigned)&PIR2*8)+2;
static volatile bit LCDIF @ ((unsigned)&PIR2*8)+4;
static volatile bit C1IF @ ((unsigned)&PIR2*8)+5;
static volatile bit C2IF @ ((unsigned)&PIR2*8)+6;
static volatile bit OSFIF @ ((unsigned)&PIR2*8)+7;
/* Definitions for T1CON register */
static bit TMR1ON @ ((unsigned)&T1CON*8)+0;
static bit TMR1CS @ ((unsigned)&T1CON*8)+1;
static bit T1SYNC @ ((unsigned)&T1CON*8)+2;
static bit T1OSCEN @ ((unsigned)&T1CON*8)+3;
static bit T1CKPS0 @ ((unsigned)&T1CON*8)+4;
static bit T1CKPS1 @ ((unsigned)&T1CON*8)+5;
static bit T1GE @ ((unsigned)&T1CON*8)+6;
static bit T1GINV @ ((unsigned)&T1CON*8)+7;
/* Definitions for T2CON register */
static bit T2CKPS0 @ ((unsigned)&T2CON*8)+0;
static bit T2CKPS1 @ ((unsigned)&T2CON*8)+1;
static bit TMR2ON @ ((unsigned)&T2CON*8)+2;
static bit TOUTPS0 @ ((unsigned)&T2CON*8)+3;
static bit TOUTPS1 @ ((unsigned)&T2CON*8)+4;
static bit TOUTPS2 @ ((unsigned)&T2CON*8)+5;
static bit TOUTPS3 @ ((unsigned)&T2CON*8)+6;
/* Definitions for SSPCON register */
static bit SSPM0 @ ((unsigned)&SSPCON*8)+0;
static bit SSPM1 @ ((unsigned)&SSPCON*8)+1;
static bit SSPM2 @ ((unsigned)&SSPCON*8)+2;
static bit SSPM3 @ ((unsigned)&SSPCON*8)+3;
static bit CKP @ ((unsigned)&SSPCON*8)+4;
static bit SSPEN @ ((unsigned)&SSPCON*8)+5;
static volatile bit SSPOV @ ((unsigned)&SSPCON*8)+6;
static volatile bit WCOL @ ((unsigned)&SSPCON*8)+7;
/* Definitions for CCP1CON register */
static bit CCP1M0 @ ((unsigned)&CCP1CON*8)+0;
static bit CCP1M1 @ ((unsigned)&CCP1CON*8)+1;
static bit CCP1M2 @ ((unsigned)&CCP1CON*8)+2;
static bit CCP1M3 @ ((unsigned)&CCP1CON*8)+3;
static volatile bit CCP1Y @ ((unsigned)&CCP1CON*8)+4;
static volatile bit CCP1X @ ((unsigned)&CCP1CON*8)+5;
/* Definitions for RCSTA register */
static volatile bit RX9D @ ((unsigned)&RCSTA*8)+0;
static volatile bit OERR @ ((unsigned)&RCSTA*8)+1;
static volatile bit FERR @ ((unsigned)&RCSTA*8)+2;
static bit ADDEN @ ((unsigned)&RCSTA*8)+3;
static bit CREN @ ((unsigned)&RCSTA*8)+4;
static bit SREN @ ((unsigned)&RCSTA*8)+5;
static bit RX9 @ ((unsigned)&RCSTA*8)+6;
static bit SPEN @ ((unsigned)&RCSTA*8)+7;
/* Definitions for CCP2CON register */
static bit CCP2M0 @ ((unsigned)&CCP2CON*8)+0;
static bit CCP2M1 @ ((unsigned)&CCP2CON*8)+1;
static bit CCP2M2 @ ((unsigned)&CCP2CON*8)+2;
static bit CCP2M3 @ ((unsigned)&CCP2CON*8)+3;
static volatile bit CCP2Y @ ((unsigned)&CCP2CON*8)+4;
static volatile bit CCP2X @ ((unsigned)&CCP2CON*8)+5;
/* Definitions for ADCON0 register */
static bit ADON @ ((unsigned)&ADCON0*8)+0;
static volatile bit GODONE @ ((unsigned)&ADCON0*8)+1;
static bit CHS0 @ ((unsigned)&ADCON0*8)+2;
static bit CHS1 @ ((unsigned)&ADCON0*8)+3;
static bit CHS2 @ ((unsigned)&ADCON0*8)+4;
static bit VCFG0 @ ((unsigned)&ADCON0*8)+5;
static bit VCFG1 @ ((unsigned)&ADCON0*8)+6;
static bit ADFM @ ((unsigned)&ADCON0*8)+7;
/* Definitions for OPTION register */
static bank1 bit PS0 @ ((unsigned)&OPTION*8)+0;
static bank1 bit PS1 @ ((unsigned)&OPTION*8)+1;
static bank1 bit PS2 @ ((unsigned)&OPTION*8)+2;
static bank1 bit PSA @ ((unsigned)&OPTION*8)+3;
static bank1 bit T0SE @ ((unsigned)&OPTION*8)+4;
static bank1 bit T0CS @ ((unsigned)&OPTION*8)+5;
static bank1 bit INTEDG @ ((unsigned)&OPTION*8)+6;
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