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m25513cModel TechnologydF:\verilog experiment\add_4vallIz57S4H0UmUX=a=Y72_8]R3Vj_GPaN2n8KSc<N?lG[Mk60dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/All.vFdefines.vL0 52Vj_GPaN2n8KSc<N?lG[Mk60OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000valu_src3_selIJF[C9WN^Xhali9]EI_OVQ2V41E>332[`838PHU[R0FfE1dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/alu_src3_sel.vL0 47V41E>332[`838PHU[R0FfE1OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vdivideIPaH:OR8R>TCcc?GkM9oBe1VnERUX5E@FnIK3]I`g9>Zj2dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/Divide.vL0 47VnERUX5E@FnIK3]I`g9>Zj2OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vext_addr_selInn5z]=4ZR1JLeG]W;8SZE3VjBGUF7@n6?_TcR7;UMBXX3dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/ext_addr_sel.vL0 48VjBGUF7@n6?_TcR7;UMBXX3OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vIndiAddrIhdDeoJ6[]NF:`F?0i>j2`3V1V61_@e8?Y=2J5Lk0fL>`1dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/IndiAddr.vL0 48V1V61_@e8?Y=2J5Lk0fL>`1OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000n@indi@addrvmultiplyIP2a`C5?hFal68CNj;_W`M1Vj=^V7hKeSmW9^M8D9JiA02dF:\verilog experiment\8051core-Verilogw996938696FF:/verilog experiment/8051core-Verilog/Multiply.vL0 48Vj=^V7hKeSmW9^M8D9JiA02OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg1IgOaz0hPV81ZiGQch@I6`h0V0RiB66gk>3e1fRWSDY;2z3dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg1.vL0 47V0RiB66gk>3e1fRWSDY;2z3OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg2IQIi1RA[Qj@74n04ogYWeA1V2A2WDZ[8hCNI5:z_9F>660dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg2.vL0 47V2A2WDZ[8hCNI5:z_9F>660OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg3I[g=0F3d8U1RZCGiJQoU133V]`GD[1R?9o^JXLW]804Uc2dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg3.vL0 47V]`GD[1R?9o^JXLW]804Uc2OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg4IDjDPGBX7kcH0Fe[1n99YP2VIT0UG82gYVdAN8W=lg7WQ0dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg4.vL0 47VIT0UG82gYVdAN8W=lg7WQ0OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg5IbRjGVCH9A4jN4W8;NiVOO1VK5@Zcmnza>ocW>;WaSb7]3dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg5.vL0 47VK5@Zcmnza>ocW>;WaSb7]3OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg8I@Aah12YIVR[R3Rn:?<=FX0VOi[IMb9z109YU=XESNGKD1dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg8.vL0 46VOi[IMb9z109YU=XESNGKD1OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vreg8rI9hbzEfAE]lnP?`_d3k]9^0VAd[_Z]:TCaOX75Q@_ZdP@1dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Reg8r.vL0 48VAd[_Z]:TCaOX75Q@_ZdP@1OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vrom_addr_selIaLOCT]HHOc[5V8KVInXHA3V`Q;fjdQ78:G`zLcc<gKA]0dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/rom_addr_sel.vL0 48V`Q;fjdQ78:G`zLcc<gKA]0OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000vtb_allI;?]l`YNYf_RATb50>Fc_V1V^BZMV:n6;Xe4hcKZAA75n1dF:\verilog experiment\8051core-Verilogw996938698FF:/verilog experiment/8051core-Verilog/Tb_all.vL0 47V^BZMV:n6;Xe4hcKZAA75n1OE;L;6.1f;31r131o-work worktGenerateLoopIterationMax 100000⌨️ 快捷键说明
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