mach64.h

原名叫avifile

#	define MEM_VGA_RPS0		0x0000fffful
#	define MEM_VGA_RPS1		0xffff0000ul
#define LT_GIO			BlockIOTag(0x2fu)	/* LT */
#define I2C_CNTL_1		BlockIOTag(0x2fu)	/* GTPro */
#define DAC_REGS		IOPortTag(0x17u, 0x30u)	/* 4 separate bytes */
#	define M64_DAC_WRITE		(DAC_REGS + 0)
#	define M64_DAC_DATA		(DAC_REGS + 1)
#	define M64_DAC_MASK		(DAC_REGS + 2)
#	define M64_DAC_READ		(DAC_REGS + 3)
#define DAC_CNTL		IOPortTag(0x18u, 0x31u)
#	define DAC_EXT_SEL		0x00000003ul
#	define DAC_EXT_SEL_RS2		0x00000001ul
#	define DAC_EXT_SEL_RS3		0x00000002ul
#	define DAC_RANGE_CTL		0x00000003ul	/* VTB/GTB/LT */
#	define DAC_BLANKING		0x00000004ul	/* 264xT */
#	define DAC_CMP_DIS		0x00000008ul	/* 264xT */
#	define DAC1_CLK_SEL		0x00000010ul	/* LTPro */
#	define DAC_PALETTE_ACCESS_CNTL	0x00000020ul	/* LTPro */
#	define DAC_PALETTE2_SNOOP_EN	0x00000040ul	/* LTPro */
#	define DAC_CMP_OUTPUT		0x00000080ul	/* 264xT */
#	define DAC_8BIT_EN		0x00000100ul
#	define DAC_PIX_DLY		0x00000600ul
#	define DAC_DIRECT		0x00000400ul	/* VTB/GTB/LT */
#	define DAC_BLANK_ADJ		0x00001800ul
#	define DAC_PAL_CLK_SEL		0x00000800ul	/* VTB/GTB/LT */
#	define DAC_CRT_SENSE		0x00000800ul	/* XC/XL */
#	define DAC_CRT_DETECTION_ON	0x00001000ul	/* XC/XL */
#	define DAC_VGA_ADR_EN		0x00002000ul
#	define DAC_FEA_CON_EN		0x00004000ul	/* 264xT */
#	define DAC_PDMN			0x00008000ul	/* 264xT */
#	define DAC_TYPE			0x00070000ul
/*	?				0x00f80000ul */
#	define DAC_MON_ID_STATE0	0x01000000ul	/* GX-E+/CX */
#	define DAC_GIO_STATE_1		0x01000000ul	/* 264xT */
#	define DAC_MON_ID_STATE1	0x02000000ul	/* GX-E+/CX */
#	define DAC_GIO_STATE_0		0x02000000ul	/* 264xT */
#	define DAC_MON_ID_STATE2	0x04000000ul	/* GX-E+/CX */
#	define DAC_GIO_STATE_4		0x04000000ul	/* 264xT */
#	define DAC_MON_ID_DIR0		0x08000000ul	/* GX-E+/CX */
#	define DAC_GIO_DIR_1		0x08000000ul	/* 264xT */
#	define DAC_MON_ID_DIR1		0x10000000ul	/* GX-E+/CX */
#	define DAC_GIO_DIR_0		0x10000000ul	/* 264xT */
#	define DAC_MON_ID_DIR2		0x20000000ul	/* GX-E+/CX */
#	define DAC_GIO_DIR_4		0x20000000ul	/* 264xT */
#	define DAC_MAN_CMP_STATE	0x40000000ul	/* GX-E+ */
#	define DAC_RW_WS		0x80000000ul	/* VT/GT */
#define HORZ_STRETCHING		BlockIOTag(0x32u)	/* LT */
#	define HORZ_STRETCH_BLEND	0x00000ffful
#	define HORZ_STRETCH_RATIO	0x0000fffful
#	define HORZ_STRETCH_LOOP	0x00070000ul
#	define HORZ_STRETCH_LOOP09	0x00000000ul
#	define HORZ_STRETCH_LOOP11	0x00010000ul
#	define HORZ_STRETCH_LOOP12	0x00020000ul
#	define HORZ_STRETCH_LOOP14	0x00030000ul
#	define HORZ_STRETCH_LOOP15	0x00040000ul
/*	?				0x00050000ul */
/*	?				0x00060000ul */
/*	?				0x00070000ul */
/*	?				0x00080000ul */
#	define HORZ_PANEL_SIZE		0x0ff00000ul	/* XC/XL */
/*	?				0x10000000ul */
#	define AUTO_HORZ_RATIO		0x20000000ul	/* XC/XL */
#	define HORZ_STRETCH_MODE	0x40000000ul
#	define HORZ_STRETCH_EN		0x80000000ul
#define EXT_DAC_REGS		BlockIOTag(0x32u)	/* GTPro */
#define VERT_STRETCHING		BlockIOTag(0x33u)	/* LT */
#	define VERT_STRETCH_RATIO0	0x000003fful
#	define VERT_STRETCH_RATIO1	0x000ffc00ul
#	define VERT_STRETCH_RATIO2	0x3ff00000ul
#	define VERT_STRETCH_USE0	0x40000000ul
#	define VERT_STRETCH_EN		0x80000000ul
#define GEN_TEST_CNTL		IOPortTag(0x19u, 0x34u)
#	define GEN_EE_DATA_OUT		0x00000001ul	/* GX/CX */
#	define GEN_GIO2_DATA_OUT	0x00000001ul	/* 264xT */
#	define GEN_EE_CLOCK		0x00000002ul	/* GX/CX */
/*	?				0x00000002ul */	/* 264xT */
#	define GEN_EE_CHIP_SEL		0x00000004ul	/* GX/CX */
#	define GEN_GIO3_DATA_OUT	0x00000004ul	/* 264xT */
#	define GEN_EE_DATA_IN		0x00000008ul	/* GX/CX */
#	define GEN_GIO2_DATA_IN		0x00000008ul	/* 264xT */
#	define GEN_EE_EN		0x00000010ul	/* GX/CX */
#	define GEN_GIO2_ENABLE		0x00000010ul	/* 264xT */
#	define GEN_ICON2_ENABLE		0x00000010ul	/* XC/XL */
#	define GEN_OVR_OUTPUT_EN	0x00000020ul	/* GX/CX */
#	define GEN_GIO2_WRITE		0x00000020ul	/* 264xT */
#	define GEN_CUR2_ENABLE		0x00000020ul	/* XC/XL */
#	define GEN_OVR_POLARITY		0x00000040ul	/* GX/CX */
#	define GEN_ICON_ENABLE		0x00000040ul	/* XC/XL */
#	define GEN_CUR_EN		0x00000080ul
#	define GEN_GUI_EN		0x00000100ul	/* GX/CX */
#	define GEN_GUI_RESETB		0x00000100ul	/* 264xT */
#	define GEN_BLOCK_WR_EN		0x00000200ul	/* GX */
/*	?				0x00000200ul */	/* CX/264xT */
#	define GEN_SOFT_RESET		0x00000200ul	/* VTB/GTB/LT */
#	define GEN_MEM_TRISTATE		0x00000400ul	/* GTPro */
/*	?				0x00000800ul */
#	define GEN_TEST_VECT_MODE	0x00003000ul	/* VT/GT */
/*	?				0x0000c000ul */
#	define GEN_TEST_FIFO_EN		0x00010000ul	/* GX/CX */
#	define GEN_TEST_GUI_REGS_EN	0x00020000ul	/* GX/CX */
#	define GEN_TEST_VECT_EN		0x00040000ul	/* GX/CX */
#	define GEN_TEST_CRC_STR		0x00080000ul	/* GX-C/-D */
/*	?				0x00080000ul */	/* GX-E+/CX */
#	define GEN_TEST_MODE_T		0x000f0000ul	/* 264xT */
#	define GEN_TEST_MODE		0x00700000ul	/* GX/CX */
#	define GEN_TEST_CNT_EN		0x00100000ul	/* 264xT */
#	define GEN_TEST_CRC_EN		0x00200000ul	/* 264xT */
/*	?				0x00400000ul */	/* 264xT */
/*	?				0x00800000ul */
#	define GEN_TEST_MEM_WR		0x01000000ul	/* GX-C/-D */
#	define GEN_TEST_MEM_STROBE	0x02000000ul	/* GX-C/-D */
#	define GEN_TEST_DST_SS_EN	0x04000000ul	/* GX/CX */
#	define GEN_TEST_DST_SS_STROBE	0x08000000ul	/* GX/CX */
#	define GEN_TEST_SRC_SS_EN	0x10000000ul	/* GX/CX */
#	define GEN_TEST_SRC_SS_STROBE	0x20000000ul	/* GX/CX */
#	define GEN_TEST_CNT_VALUE	0x3f000000ul	/* 264xT */
#	define GEN_TEST_CC_EN		0x40000000ul	/* GX/CX */
#	define GEN_TEST_CC_STROBE	0x80000000ul	/* GX/CX */
/*	?				0xc0000000ul */	/* 264xT */
#	define GEN_DEBUG_MODE		0xff000000ul	/* VTB/GTB/LT */
#	define GEN_DEBUG_MC_PARSER	0x2A000000ul	/* Mobility pro  */
#	define GEN_DEBUG_IDCT_PARSER	0x2B000000ul	/* Mobility pro  */
#	define GEN_DEBUG_MC_BUFFER	0x2C000000ul	/* Mobility pro  */
#	define GEN_DEBUG_IDCT_BUFFER	0x2E000000ul	/* Mobility pro  */
#	define GEN_DEBUG_IDCT1		0x90000000ul	/* Mobility pro  */
#	define GEN_DEBUG_IDCT2		0x91000000ul	/* Mobility pro  */
#	define GEN_DEBUG_IDCT3		0x92000000ul	/* Mobility pro  */
#define LCD_GEN_CTRL		BlockIOTag(0x35u)	/* LT */
#	define CRT_ON			0x00000001ul
#	define LCD_ON			0x00000002ul
#	define HORZ_DIVBY2_EN		0x00000004ul
#	define DONT_DS_ICON		0x00000008ul
#	define LOCK_8DOT		0x00000010ul
#	define ICON_ENABLE		0x00000020ul
#	define DONT_SHADOW_VPAR		0x00000040ul
#	define V2CLK_PM_EN		0x00000080ul
#	define RST_FM			0x00000100ul
#	define DISABLE_PCLK_RESET	0x00000200ul	/* XC/XL */
#	define DIS_HOR_CRT_DIVBY2	0x00000400ul
#	define SCLK_SEL			0x00000800ul
#	define SCLK_DELAY		0x0000f000ul
#	define TVCLK_PM_EN		0x00010000ul
#	define VCLK_DAC_PM_EN		0x00020000ul
#	define VCLK_LCD_OFF		0x00040000ul
#	define SELECT_WAIT_4MS		0x00080000ul
#	define XTALIN_PM_EN		0x00080000ul	/* XC/XL */
#	define V2CLK_DAC_PM_EN		0x00100000ul
#	define LVDS_EN			0x00200000ul
#	define LVDS_PLL_EN		0x00400000ul
#	define LVDS_PLL_RESET		0x00800000ul
#	define LVDS_RESERVED_BITS	0x07000000ul
#	define CRTC_RW_SELECT		0x08000000ul	/* LTPro */
#	define USE_SHADOWED_VEND	0x10000000ul
#	define USE_SHADOWED_ROWCUR	0x20000000ul
#	define SHADOW_EN		0x40000000ul
#	define SHADOW_RW_EN		0x80000000ul
#define CUSTOM_MACRO_CNTL	BlockIOTag(0x35u)	/* GTPro */
#	define IDCT_FIFO_EXTENSE	0x00000001ul
#define POWER_MANAGEMENT	BlockIOTag(0x36u)	/* LT */
#	define PWR_MGT_ON		0x00000001ul
#	define PWR_MGT_MODE		0x00000006ul
#	define AUTO_PWRUP_EN		0x00000008ul
#	define ACTIVITY_PIN_ON		0x00000010ul
#	define STANDBY_POL		0x00000020ul
#	define SUSPEND_POL		0x00000040ul
#	define SELF_REFRESH		0x00000080ul
#	define ACTIVITY_PIN_EN		0x00000100ul
#	define KEYBD_SNOOP		0x00000200ul
#	define USE_F32KHZ		0x00000400ul	/* LTPro */
#	define DONT_USE_XTALIN		0x00000400ul	/* XC/XL */
#	define TRISTATE_MEM_EN		0x00000800ul	/* LTPro */
#	define LCDENG_TEST_MODE		0x0000f000ul
#	define STANDBY_COUNT		0x000f0000ul
#	define SUSPEND_COUNT		0x00f00000ul
#	define BAISON			0x01000000ul
#	define BLON			0x02000000ul
#	define DIGON			0x04000000ul
#	define PM_D3_SUPPORT_ENABLE	0x08000000ul	/* XC/XL */
#	define STANDBY_NOW		0x10000000ul
#	define SUSPEND_NOW		0x20000000ul
#	define PWR_MGT_STATUS		0xc0000000ul
#define CONFIG_CNTL		IOPortTag(0x1au, 0x37u)
#	define CFG_MEM_AP_SIZE		0x00000003ul
#	define CFG_MEM_VGA_AP_EN	0x00000004ul
/*	?				0x00000008ul */
#	define CFG_MEM_AP_LOC		0x00003ff0ul
/*	?				0x0000c000ul */
#	define CFG_CARD_ID		0x00070000ul
#	define CFG_VGA_DIS		0x00080000ul
/*	?				0x00f00000ul */
#	define CFG_CDE_WINDOW		0x3f000000ul	/* VT/GT */
/*	?				0xc0000000ul */
#define CONFIG_CHIP_ID		IOPortTag(0x1bu, 0x38u)	/* Read */
#	define CFG_CHIP_TYPE0		0x000000fful
#	define CFG_CHIP_TYPE1		0x0000ff00ul
#	define CFG_CHIP_TYPE		0x0000fffful
#	define CFG_CHIP_CLASS		0x00ff0000ul
#	define CFG_CHIP_REV		0xff000000ul
#	define CFG_CHIP_VERSION		0x07000000ul	/* 264xT */
#	define CFG_CHIP_FOUNDRY		0x38000000ul	/* 264xT */
#	define CFG_CHIP_REVISION	0xc0000000ul	/* 264xT */
#define CONFIG_STATUS64_0	IOPortTag(0x1cu, 0x39u)	/* Read (R/W (264xT)) */
#	define CFG_BUS_TYPE		0x00000007ul	/* GX/CX */
#	define CFG_MEM_TYPE_T		0x00000007ul	/* 264xT */
#	define CFG_MEM_TYPE		0x00000038ul	/* GX/CX */
#	define CFG_DUAL_CAS_EN_T	0x00000008ul	/* 264xT */
#	define CFG_ROM_128K_EN		0x00000008ul	/* VTB/GTB/LT */
#	define CFG_ROM_REMAP		0x00000008ul	/* GTPro */
#	define CFG_VGA_EN_T		0x00000010ul	/* VT/GT */
#	define CFG_CLOCK_EN		0x00000020ul	/* 264xT */
#	define CFG_DUAL_CAS_EN		0x00000040ul	/* GX/CX */
#	define CFG_VMC_SENSE		0x00000040ul	/* VT/GT */
#	define CFG_SHARED_MEM_EN	0x00000040ul	/* VTB/GTB/LT */
#	define CFG_LOCAL_BUS_OPTION	0x00000180ul	/* GX/CX */
#	define CFG_VFC_SENSE		0x00000080ul	/* VT/GT */
#	define CFG_INIT_DAC_TYPE	0x00000e00ul	/* GX/CX */
#	define CFG_INIT_CARD_ID		0x00007000ul	/* GX-C/-D */
#	define CFG_BLK_WR_SIZE		0x00001000ul	/* GX-E+ */
#	define CFG_INT_QSF_EN		0x00002000ul	/* GX-E+ */
/*	?				0x00004000ul */	/* GX-E+ */
/*	?				0x00007000ul */	/* CX */
#	define CFG_TRI_BUF_DIS		0x00008000ul	/* GX/CX */
#	define CFG_BOARD_ID		0x0000ff00ul	/* VT/GT */
#	define CFG_EXT_RAM_ADDR		0x003f0000ul	/* GX/CX */
#	define CFG_PANEL_ID		0x001f0000ul	/* LT */
#	define CFG_MACROVISION_EN	0x00200000ul	/* GTPro */
#	define CFG_ROM_DIS		0x00400000ul	/* GX/CX */
#	define CFG_PCI33EN		0x00400000ul	/* GTPro */
#	define CFG_VGA_EN		0x00800000ul	/* GX/CX */
#	define CFG_FULLAGP		0x00800000ul	/* GTPro */
#	define CFG_ARITHMOS_ENABLE	0x00800000ul	/* XC/XL */
#	define CFG_LOCAL_BUS_CFG	0x01000000ul	/* GX/CX */
#	define CFG_CHIP_EN		0x02000000ul	/* GX/CX */
#	define CFG_LOCAL_READ_DLY_DIS	0x04000000ul	/* GX/CX */
#	define CFG_ROM_OPTION		0x08000000ul	/* GX/CX */
#	define CFG_BUS_OPTION		0x10000000ul	/* GX/CX */
#	define CFG_LOCAL_DAC_WR_EN	0x20000000ul	/* GX/CX */
#	define CFG_VLB_RDY_DIS		0x40000000ul	/* GX/CX */
#	define CFG_AP_4GBYTE_DIS	0x80000000ul	/* GX/CX */
#define CONFIG_STATUS64_1	IOPortTag(0x1du, 0x3au)	/* Read */
#	define CFG_PCI_DAC_CFG		0x00000001ul	/* GX/CX */
/*	?				0x0000001eul */	/* GX/CX */
#	define CFG_1C8_IO_SEL		0x00000020ul	/* GX/CX */
/*	?				0xffffffc0ul */	/* GX/CX */
#	define CRC_SIG			0xfffffffful	/* 264xT */
#define MPP_CONFIG		BlockIOTag(0x3bu)	/* VTB/GTB/LT */
#define MPP_STROBE_CONFIG	BlockIOTag(0x3cu)	/* VTB/GTB/LT */
#define MPP_ADDR		BlockIOTag(0x3du)	/* VTB/GTB/LT */
#define MPP_DATA		BlockIOTag(0x3eu)	/* VTB/GTB/LT */
#define TVO_CNTL		BlockIOTag(0x3fu)	/* VTB/GTB/LT */
/*	GP_IO			IOPortTag(0x1eu, 0x1eu) */	/* See above */
/*	CRTC_H_TOTAL_DISP	IOPortTag(0x1fu, 0x00u) */	/* Duplicate */
#define DST_OFF_PITCH		BlockIOTag(0x40u)
#	define DST_OFFSET		0x000ffffful
/*	?				0x00300000ul */
#	define DST_PITCH		0xffc00000ul
#define DST_X			BlockIOTag(0x41u)
#define DST_Y			BlockIOTag(0x42u)
#define DST_Y_X			BlockIOTag(0x43u)
#define DST_WIDTH		BlockIOTag(0x44u)
#define DST_HEIGHT		BlockIOTag(0x45u)
#define DST_HEIGHT_WIDTH	BlockIOTag(0x46u)
#define DST_X_WIDTH		BlockIOTag(0x47u)
#define DST_BRES_LNTH		BlockIOTag(0x48u)
#define DST_BRES_ERR		BlockIOTag(0x49u)
#define DST_BRES_INC		BlockIOTag(0x4au)
#define DST_BRES_DEC		BlockIOTag(0x4bu)
#define DST_CNTL		BlockIOTag(0x4cu)
#	define DST_X_DIR		0x00000001ul
#	define DST_Y_DIR		0x00000002ul
#	define DST_Y_MAJOR		0x00000004ul
#	define DST_X_TILE		0x00000008ul
#	define DST_Y_TILE		0x00000010ul
#	define DST_LAST_PEL		0x00000020ul
#	define DST_POLYGON_EN		0x00000040ul
#	define DST_24_ROT_EN		0x00000080ul
#	define DST_24_ROT		0x00000700ul
#	define DST_BRES_SIGN		0x00000800ul	/* GX/CX */
#	define DST_BRES_ZERO		0x00000800ul	/* CT */
#	define DST_POLYGON_RTEDGE_DIS	0x00001000ul	/* CT */
#	define TRAIL_X_DIR		0x00002000ul	/* GT */
#	define TRAP_FILL_DIR		0x00004000ul	/* GT */
#	define TRAIL_BRES_SIGN		0x00008000ul	/* GT */
/*	?				0x00010000ul */
#	define BRES_SIGN_AUTO		0x00020000ul	/* GT */
/*	?				0x00040000ul */
#	define ALPHA_OVERLAP_ENB	0x00080000ul	/* GTPro */
#	define SUB_PIX_ON		0x00100000ul	/* GTPro */
/*	?				0xffe00000ul */
/*	DST_Y_X			BlockIOTag(0x4du) */	/* Duplicate */
#define TRAIL_BRES_ERR		BlockIOTag(0x4eu)	/* GT */
#define TRAIL_BRES_INC		BlockIOTag(0x4fu)	/* GT */
#define TRAIL_BRES_DEC		BlockIOTag(0x50u)	/* GT */
#define LEAD_BRES_LNTH		BlockIOTag(0x51u)	/* GT */
#define Z_OFF_PITCH		BlockIOTag(0x52u)	/* GT */
#define Z_CNTL			BlockIOTag(0x53u)	/* GT */
#define ALPHA_TST_CNTL		BlockIOTag(0x54u)	/* GTPro */
#	define IDCT_EN			0x00008000UL
/*	?			BlockIOTag(0x55u) */
#define SECONDARY_STW_EXP	BlockIOTag(0x56u)	/* GTPro */
#define SECONDARY_S_X_INC	BlockIOTag(0x57u)	/* GTPro */
#define SECONDARY_S_Y_INC	BlockIOTag(0x58u)	/* GTPro */
#define SECONDARY_S_START	BlockIOTag(0x59u)	/* GTPro */
#define SECONDARY_W_X_INC	BlockIOTag(0x5au)	/* GTPro */
#define SECONDARY_W_Y_INC	BlockIOTag(0x5bu)	/* GTPro */
#define SECONDARY_W_START	BlockIOTag(0x5cu)	/* GTPro */
#define SECONDARY_T_X_INC	BlockIOTag(0x5du)	/* GTPro */
#define SECONDARY_T_Y_INC	BlockIOTag(0x5eu)	/* GTPro */
#define SECONDARY_T_START	BlockIOTag(0x5fu)	/* GTPro */
#define SRC_OFF_PITCH		BlockIOTag(0x60u)
#	define SRC_OFFSET		0x000ffffful
/*	?				0x00300000ul */
#	define SRC_PITCH		0xffc00000ul
#define SRC_X			BlockIOTag(0x61u)
#define SRC_Y			BlockIOTag(0x62u)
#define SRC_Y_X			BlockIOTag(0x63u)
#define SRC_WIDTH1		BlockIOTag(0x64u)
#define SRC_HEIGHT1		BlockIOTag(0x65u)
#define SRC_HEIGHT1_WIDTH1	BlockIOTag(0x66u)
#define SRC_X_START		BlockIOTag(0x67u)
#define SRC_Y_START		BlockIOTag(0x68u)
#define SRC_Y_X_START		BlockIOTag(0x69u)