📄 elf.h
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#define ELF_NOTE_PAGESIZE_HINT 1
/* Defined note types for GNU systems. */
/* ABI information. The descriptor consists of words:
word 0: OS descriptor
word 1: major version of the ABI
word 2: minor version of the ABI
word 3: subminor version of the ABI
*/
#define ELF_NOTE_ABI 1
/* Known OSes. These value can appear in word 0 of an ELF_NOTE_ABI
note section entry. */
#define ELF_NOTE_OS_LINUX 0
#define ELF_NOTE_OS_GNU 1
#define ELF_NOTE_OS_SOLARIS2 2
#define ELF_NOTE_OS_FREEBSD 3
/* Move records. */
typedef struct
{
Elf32_Xword m_value; /* Symbol value. */
Elf32_Word m_info; /* Size and index. */
Elf32_Word m_poffset; /* Symbol offset. */
Elf32_Half m_repeat; /* Repeat count. */
Elf32_Half m_stride; /* Stride info. */
} Elf32_Move;
typedef struct
{
Elf64_Xword m_value; /* Symbol value. */
Elf64_Xword m_info; /* Size and index. */
Elf64_Xword m_poffset; /* Symbol offset. */
Elf64_Half m_repeat; /* Repeat count. */
Elf64_Half m_stride; /* Stride info. */
} Elf64_Move;
/* Macro to construct move records. */
#define ELF32_M_SYM(info) ((info) >> 8)
#define ELF32_M_SIZE(info) ((unsigned char) (info))
#define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size))
#define ELF64_M_SYM(info) ELF32_M_SYM (info)
#define ELF64_M_SIZE(info) ELF32_M_SIZE (info)
#define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size)
/* Motorola 68k specific definitions. */
/* Values for Elf32_Ehdr.e_flags. */
#define EF_CPU32 0x00810000
/* m68k relocs. */
#define R_68K_NONE 0 /* No reloc */
#define R_68K_32 1 /* Direct 32 bit */
#define R_68K_16 2 /* Direct 16 bit */
#define R_68K_8 3 /* Direct 8 bit */
#define R_68K_PC32 4 /* PC relative 32 bit */
#define R_68K_PC16 5 /* PC relative 16 bit */
#define R_68K_PC8 6 /* PC relative 8 bit */
#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */
#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */
#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */
#define R_68K_GOT32O 10 /* 32 bit GOT offset */
#define R_68K_GOT16O 11 /* 16 bit GOT offset */
#define R_68K_GOT8O 12 /* 8 bit GOT offset */
#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */
#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */
#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */
#define R_68K_PLT32O 16 /* 32 bit PLT offset */
#define R_68K_PLT16O 17 /* 16 bit PLT offset */
#define R_68K_PLT8O 18 /* 8 bit PLT offset */
#define R_68K_COPY 19 /* Copy symbol at runtime */
#define R_68K_GLOB_DAT 20 /* Create GOT entry */
#define R_68K_JMP_SLOT 21 /* Create PLT entry */
#define R_68K_RELATIVE 22 /* Adjust by program base */
/* Keep this the last entry. */
#define R_68K_NUM 23
/* Intel 80386 specific definitions. */
/* i386 relocs. */
#define R_386_NONE 0 /* No reloc */
#define R_386_32 1 /* Direct 32 bit */
#define R_386_PC32 2 /* PC relative 32 bit */
#define R_386_GOT32 3 /* 32 bit GOT entry */
#define R_386_PLT32 4 /* 32 bit PLT address */
#define R_386_COPY 5 /* Copy symbol at runtime */
#define R_386_GLOB_DAT 6 /* Create GOT entry */
#define R_386_JMP_SLOT 7 /* Create PLT entry */
#define R_386_RELATIVE 8 /* Adjust by program base */
#define R_386_GOTOFF 9 /* 32 bit offset to GOT */
#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT */
#define R_386_32PLT 11
#define R_386_TLS_TPOFF 14 /* Offset in static TLS block */
#define R_386_TLS_IE 15 /* Address of GOT entry for static TLS
block offset */
#define R_386_TLS_GOTIE 16 /* GOT entry for static TLS block
offset */
#define R_386_TLS_LE 17 /* Offset relative to static TLS
block */
#define R_386_TLS_GD 18 /* Direct 32 bit for GNU version of
general dynamic thread local data */
#define R_386_TLS_LDM 19 /* Direct 32 bit for GNU version of
local dynamic thread local data
in LE code */
#define R_386_16 20
#define R_386_PC16 21
#define R_386_8 22
#define R_386_PC8 23
#define R_386_TLS_GD_32 24 /* Direct 32 bit for general dynamic
thread local data */
#define R_386_TLS_GD_PUSH 25 /* Tag for pushl in GD TLS code */
#define R_386_TLS_GD_CALL 26 /* Relocation for call to
__tls_get_addr() */
#define R_386_TLS_GD_POP 27 /* Tag for popl in GD TLS code */
#define R_386_TLS_LDM_32 28 /* Direct 32 bit for local dynamic
thread local data in LE code */
#define R_386_TLS_LDM_PUSH 29 /* Tag for pushl in LDM TLS code */
#define R_386_TLS_LDM_CALL 30 /* Relocation for call to
__tls_get_addr() in LDM code */
#define R_386_TLS_LDM_POP 31 /* Tag for popl in LDM TLS code */
#define R_386_TLS_LDO_32 32 /* Offset relative to TLS block */
#define R_386_TLS_IE_32 33 /* GOT entry for negated static TLS
block offset */
#define R_386_TLS_LE_32 34 /* Negated offset relative to static
TLS block */
#define R_386_TLS_DTPMOD32 35 /* ID of module containing symbol */
#define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */
#define R_386_TLS_TPOFF32 37 /* Negated offset in static TLS block */
/* Keep this the last entry. */
#define R_386_NUM 38
/* SUN SPARC specific definitions. */
/* Legal values for ST_TYPE subfield of st_info (symbol type). */
#define STT_REGISTER 13 /* Global register reserved to app. */
/* Values for Elf64_Ehdr.e_flags. */
#define EF_SPARCV9_MM 3
#define EF_SPARCV9_TSO 0
#define EF_SPARCV9_PSO 1
#define EF_SPARCV9_RMO 2
#define EF_SPARC_LEDATA 0x800000 /* little endian data */
#define EF_SPARC_EXT_MASK 0xFFFF00
#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
/* SPARC relocs. */
#define R_SPARC_NONE 0 /* No reloc */
#define R_SPARC_8 1 /* Direct 8 bit */
#define R_SPARC_16 2 /* Direct 16 bit */
#define R_SPARC_32 3 /* Direct 32 bit */
#define R_SPARC_DISP8 4 /* PC relative 8 bit */
#define R_SPARC_DISP16 5 /* PC relative 16 bit */
#define R_SPARC_DISP32 6 /* PC relative 32 bit */
#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */
#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */
#define R_SPARC_HI22 9 /* High 22 bit */
#define R_SPARC_22 10 /* Direct 22 bit */
#define R_SPARC_13 11 /* Direct 13 bit */
#define R_SPARC_LO10 12 /* Truncated 10 bit */
#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */
#define R_SPARC_GOT13 14 /* 13 bit GOT entry */
#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */
#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */
#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */
#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */
#define R_SPARC_COPY 19 /* Copy symbol at runtime */
#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */
#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */
#define R_SPARC_RELATIVE 22 /* Adjust by program base */
#define R_SPARC_UA32 23 /* Direct 32 bit unaligned */
/* Additional Sparc64 relocs. */
#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */
#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */
#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */
#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */
#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */
#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */
#define R_SPARC_10 30 /* Direct 10 bit */
#define R_SPARC_11 31 /* Direct 11 bit */
#define R_SPARC_64 32 /* Direct 64 bit */
#define R_SPARC_OLO10 33 /* 10bit with secondary 13bit addend */
#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */
#define R_SPARC_HM10 35 /* High middle 10 bits of ... */
#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */
#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */
#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */
#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */
#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */
#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */
#define R_SPARC_7 43 /* Direct 7 bit */
#define R_SPARC_5 44 /* Direct 5 bit */
#define R_SPARC_6 45 /* Direct 6 bit */
#define R_SPARC_DISP64 46 /* PC relative 64 bit */
#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */
#define R_SPARC_HIX22 48 /* High 22 bit complemented */
#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */
#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */
#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */
#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */
#define R_SPARC_REGISTER 53 /* Global register usage */
#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */
#define R_SPARC_UA16 55 /* Direct 16 bit unaligned */
#define R_SPARC_TLS_GD_HI22 56
#define R_SPARC_TLS_GD_LO10 57
#define R_SPARC_TLS_GD_ADD 58
#define R_SPARC_TLS_GD_CALL 59
#define R_SPARC_TLS_LDM_HI22 60
#define R_SPARC_TLS_LDM_LO10 61
#define R_SPARC_TLS_LDM_ADD 62
#define R_SPARC_TLS_LDM_CALL 63
#define R_SPARC_TLS_LDO_HIX22 64
#define R_SPARC_TLS_LDO_LOX10 65
#define R_SPARC_TLS_LDO_ADD 66
#define R_SPARC_TLS_IE_HI22 67
#define R_SPARC_TLS_IE_LO10 68
#define R_SPARC_TLS_IE_LD 69
#define R_SPARC_TLS_IE_LDX 70
#define R_SPARC_TLS_IE_ADD 71
#define R_SPARC_TLS_LE_HIX22 72
#define R_SPARC_TLS_LE_LOX10 73
#define R_SPARC_TLS_DTPMOD32 74
#define R_SPARC_TLS_DTPMOD64 75
#define R_SPARC_TLS_DTPOFF32 76
#define R_SPARC_TLS_DTPOFF64 77
#define R_SPARC_TLS_TPOFF32 78
#define R_SPARC_TLS_TPOFF64 79
/* Keep this the last entry. */
#define R_SPARC_NUM 80
/* For Sparc64, legal values for d_tag of Elf64_Dyn. */
#define DT_SPARC_REGISTER 0x70000001
#define DT_SPARC_NUM 2
/* Bits present in AT_HWCAP, primarily for Sparc32. */
#define HWCAP_SPARC_FLUSH 1 /* The cpu supports flush insn. */
#define HWCAP_SPARC_STBAR 2
#define HWCAP_SPARC_SWAP 4
#define HWCAP_SPARC_MULDIV 8
#define HWCAP_SPARC_V9 16 /* The cpu is v9, so v8plus is ok. */
#define HWCAP_SPARC_ULTRA3 32
/* MIPS R3000 specific definitions. */
/* Legal values for e_flags field of Elf32_Ehdr. */
#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */
#define EF_MIPS_PIC 2 /* Contains PIC code */
#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */
#define EF_MIPS_XGOT 8
#define EF_MIPS_64BIT_WHIRL 16
#define EF_MIPS_ABI2 32
#define EF_MIPS_ABI_ON32 64
#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
/* Legal values for MIPS architecture level. */
#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
#define EF_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
#define EF_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
/* The following are non-official names and should not be used. */
#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
#define E_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
#define E_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
/* Special section indices. */
#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
/* Legal values for sh_type field of Elf32_Shdr. */
#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
#define SHT_MIPS_MSYM 0x70000001
#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/
#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
#define SHT_MIPS_PACKAGE 0x70000007
#define SHT_MIPS_PACKSYM 0x70000008
#define SHT_MIPS_RELD 0x70000009
#define SHT_MIPS_IFACE 0x7000000b
#define SHT_MIPS_CONTENT 0x7000000c
#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */
#define SHT_MIPS_SHDR 0x70000010
#define SHT_MIPS_FDESC 0x70000011
#define SHT_MIPS_EXTSYM 0x70000012
#define SHT_MIPS_DENSE 0x70000013
#define SHT_MIPS_PDESC 0x70000014
#define SHT_MIPS_LOCSYM 0x70000015
#define SHT_MIPS_AUXSYM 0x70000016
#define SHT_MIPS_OPTSYM 0x70000017
#define SHT_MIPS_LOCSTR 0x70000018
#define SHT_MIPS_LINE 0x70000019
#define SHT_MIPS_RFDESC 0x7000001a
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