📄 atareset.lst
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C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 1
C51 COMPILER V7.10, COMPILATION OF MODULE ATARESET
OBJECT MODULE PLACED IN .\_Oput\atareset.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE source\atareset.c ROM(COMPACT) OPTIMIZE(9,SPEED) BROWSE ORDER DEFINE(GPIF=0
-,FLASH=0,DEVICE_TYPE_IS_SCSI=1,DEVICE_TYPE_IS_IDE=1,VBUS_DETECT=1) DEBUG OBJECTEXTEND CODE PRINT(.\_List\atareset.lst) O
-BJECT(.\_Oput\atareset.obj)
line level source
1 //-----------------------------------------------------------------------------
2 // Copyright (c) 1999-2001 Cypress Semiconductor, Inc. All rights reserved
3 //-----------------------------------------------------------------------------
4 //
5 // This file contains the device initialization code.
6 //
7 // $Archive: /USB/atapifx2/software/atareset.c $
8 // $Date: 1/23/02 9:37a $
9 // $Revision: 44 $
10 //-----------------------------------------------------------------------------
11 #include "fx2.h"
12 #include "fx2regs.h"
13 #include "gpif.h"
14
15 char NumCylindersMSB; // global #Cyl MSB
16 char NumCylindersLSB; // global #Cyl LSB
17 char NumHeads; // global #Heads
18 char NumSectPerTrack; // global #SectorsPerTrack
19
20 char MaxPIO;
21 char udmaMode; // global to keep track of which udma mode we are in
22 xdata BYTE halfKBuffer[BUFFER_SIZE];
23 idata char localSerialNumber[ATAPI_INQUIRY_SERIAL_LEN*2];
24 bit bExtAddrSupport;
25
26 void resetATAPIDevice()
27 {
28 1 // Select ATAPI device, read it back
29 1 bit done = 0;
30 1 BYTE driveStatus;
31 1 #define MAX_COUNT 200
32 1
33 1 BYTE count;
34 1
35 1 while (!done)
36 1 {
37 2 // Pound the reset line
38 2 hardwareReset();
39 2
40 2 EZUSB_Delay(900); // Mitsumi CR-4808TE(CYSD007) is a good test for this number.
41 2
42 2 // Wait for the completion
43 2 for (count = 0, driveStatus = readATAPI_STATUS_REG();
44 2 count < MAX_COUNT
45 2 && ((driveStatus & ATAPI_STATUS_BUSY_BIT) || (driveStatus == 0x7f)) ;
46 2 driveStatus = readATAPI_STATUS_REG(), count++)
47 2 {
48 3 EZUSB_Delay(50); // Wait 50 ms to be polite
49 3 }
50 2
51 2 if (count == MAX_COUNT)
52 2 continue;
53 2
C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 2
54 2 // Byte count should be a special code -- 0xeb14
55 2 if (readPIO8(ATAPI_BYTE_COUNT_MSB) == 0xeb && readPIO8(ATAPI_BYTE_COUNT_LSB) == 0x14)
56 2 {
57 3 done = 1;
58 3 scsi = 1;
59 3 }
60 2 else
61 2 // device = ide
62 2 {
63 3 writePIO8(ATAPI_NULL_REG, 0xff); // Pre-load the bus with 0xff -- Make sure someone drives
- the 00's
64 3 if ((readPIO8(ATA_ERROR_REG) & 0x7f) == 1)
65 3 {
66 4 done = 1;
67 4 scsi = 0;
68 4 }
69 3 else
70 3 EZUSB_Delay(500); // Wait 500 ms to make sure it's really ready.
71 3 }
72 2
73 2 }
74 1
75 1 EZUSB_Delay(500); // Wait 500 ms to make sure it's really ready.
76 1
77 1 #if DEVICE_TYPE_IS_SCSI
78 1 if (scsi)
79 1 SCSITestUnitReady();
80 1 #endif
81 1 }
82
83
84
85 void ATAPIIdDevice()
86 {
87 1 BYTE i;
88 1 BYTE driveStatus;
89 1
90 1 // Wait for the register block to be non-busy and for a "drive ready" condition
91 1 do
92 1 {
93 2 writePIO8(ATAPI_DRIVESEL_REG, 0xa0);
94 2 driveStatus = readATAPI_STATUS_REG();
95 2 } while((driveStatus & (ATAPI_STATUS_BUSY_BIT | ATAPI_STATUS_DRDY_BIT)) != (ATAPI_STATUS_DRDY_BIT));
- // Do-while
96 1
97 1 writePIO8(ATA_ERROR_REG, 0); // Copied from Phoenix BIOS
98 1 writePIO8(ATA_SECTOR_COUNT_REG, 1);
99 1 writePIO8(ATA_LBA_LSB_REG , 0xff);
100 1 writePIO8(ATA_LBA_2SB_REG , 0xff);
101 1 writePIO8(ATA_LBA_MSB_REG , 0);
102 1 writePIO8(ATAPI_DRIVESEL_REG, 0xa0);
103 1 writePIO8(ATAPI_CONTROL_REG, 0); // Added later -- Make sure the nIEN bit is clear (active)
104 1
105 1
106 1 // Send Identify device command
107 1 if (scsi)
108 1 writePIO8(ATAPI_COMMAND_REG, ATAPI_COMMAND_ID_DEVICE);
109 1 else
110 1 writePIO8(ATAPI_COMMAND_REG, IDE_COMMAND_ID_DEVICE);
111 1
112 1 waitForIntrq();
113 1
C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 3
114 1 // Wait for the register block to be non-busy and to have data ready
115 1 do
116 1 {
117 2 driveStatus = readATAPI_STATUS_REG();
118 2 if (driveStatus & ATAPI_STATUS_ERROR_BIT) // don't get stuck here with an error
119 2 return;
120 2 } while((driveStatus & (ATAPI_STATUS_BUSY_BIT | ATAPI_STATUS_DRQ_BIT)) != (ATAPI_STATUS_DRQ_BIT)); /
-/ Do-while
121 1
122 1 // Read the data from the drive
123 1 {
124 2 char timeout = 10;
125 2
126 2 while (!readPIO16toXdata(ATAPI_DATA_REG, halfKBuffer, BUFFER_SIZE, IGNORE_DRIVE_LEN))
127 2 if (!timeout--)
128 2 break;
129 2 }
130 1
131 1 // Place the fields that we need into the SCSI block
132 1 for (i = 0; i < SCSI_INQUIRY_MANUFACTURER_LEN; i++)
133 1 {
134 2 // swap bytes within words. This is stored backwards!
135 2 SCSIInquiryData_[SCSI_INQUIRY_MANUFACTURER+i] = halfKBuffer[ATAPI_INQUIRY_MANUFACTURER * 2 + (i ^ 1)
-];
136 2 }
137 1
138 1 SCSIInquiryData_[SCSI_INQUIRY_REVISION+1] = halfKBuffer[ATAPI_INQUIRY_REVISION * 2]+'0';
139 1 SCSIInquiryData_[SCSI_INQUIRY_REVISION+3] = halfKBuffer[ATAPI_INQUIRY_REVISION * 2 +2]+'0';
140 1 SCSIInquiryData_[SCSI_INQUIRY_REMOVABLE_BYTE] |= SCSI_INQUIRY_REMOVABLE_BIT & halfKBuffer[ATAPI_INQUIRY
-_REMOVABLE_BYTE];
141 1
142 1 // BUG -- what is this doing? Reduce the command set for ATA
143 1 if (!scsi)
144 1 SCSIInquiryData_[SCSI_INQUIRY_DATA_FORMAT] = 0;
145 1
146 1 // Copy serial number to our local storage area, converting zeroes to text.
147 1 // It's stored as double byte characters, so zero every other byte.
148 1 for (i = 0; i < ATAPI_INQUIRY_SERIAL_LEN; i++)
149 1 {
150 2 if (halfKBuffer[i+ATAPI_INQUIRY_SERIAL])
151 2 localSerialNumber[i+i] = halfKBuffer[i+ATAPI_INQUIRY_SERIAL];
152 2 else
153 2 localSerialNumber[i+i] = '0';
154 2 localSerialNumber[i+i+1] = 0;
155 2 }
156 1
157 1 // Check for large disk (48 bit) support. ATA-6 spec below....
158 1 // 6.2.1
159 1 // 4) The contents of words (61:60) and (103:100) shall not be used to determine if 48-bit addressin
-g is
160 1 // supported. IDENTIFY DEVICE bit 10 word 83 indicates support for 48-bit addressing.
161 1 if (halfKBuffer[IDENTIFY_48BIT_ADDRESSING+1] & (1<<2))
162 1 {
163 2 bExtAddrSupport = 1;
164 2 // This is actually smaller than a loop of 4!!
165 2 // Yes, this only supports 0x100 00 00 00 sectors, which is 220,000GB (industry GB, not true)
166 2 ((BYTE *)&driveCapacity)[3] = halfKBuffer[0+IDE_ID_TOTAL_48_BIT_SECTORS_LSW];
167 2 ((BYTE *)&driveCapacity)[2] = halfKBuffer[1+IDE_ID_TOTAL_48_BIT_SECTORS_LSW];
168 2 ((BYTE *)&driveCapacity)[1] = halfKBuffer[2+IDE_ID_TOTAL_48_BIT_SECTORS_LSW];
169 2 ((BYTE *)&driveCapacity)[0] = halfKBuffer[3+IDE_ID_TOTAL_48_BIT_SECTORS_LSW];
170 2 }
171 1 else
C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 4
172 1 {
173 2 bExtAddrSupport = 0;
174 2 // This is actually smaller than a loop of 4!!
175 2 ((BYTE *)&driveCapacity)[3] = halfKBuffer[0+IDE_ID_TOTAL_SECTORS_LSW];
176 2 ((BYTE *)&driveCapacity)[2] = halfKBuffer[1+IDE_ID_TOTAL_SECTORS_LSW];
177 2 ((BYTE *)&driveCapacity)[1] = halfKBuffer[2+IDE_ID_TOTAL_SECTORS_LSW];
178 2 ((BYTE *)&driveCapacity)[0] = halfKBuffer[3+IDE_ID_TOTAL_SECTORS_LSW];
179 2 }
180 1
181 1 NumCylindersMSB = halfKBuffer[IDENTIFY_NUM_CYLINDERS_MSB];
182 1 NumCylindersLSB = halfKBuffer[IDENTIFY_NUM_CYLINDERS_LSB];
183 1 NumHeads = halfKBuffer[IDENTIFY_NUM_HEADS];
184 1 NumSectPerTrack = halfKBuffer[IDENTIFY_NUM_SECT_PER_TRACK];
185 1
186 1 // check for PIO3 support (or greater)
187 1 // 64 = word index to ID Device parameter block - LSB=value, MSB=reserved
188 1 // if( (!scsi) && ( MaxPIO = halfKBuffer[(64*2)]) ). WaveDataPio4 is used
189 1 // for both PIO3 and PIO4, with PIO3 @ 30MHz, and PIO4 @ 48Mhz
190 1 MaxPIO = halfKBuffer[IDENTIFY_ADVANCED_PIO];
191 1 udmaMode = 0;
192 1
193 1 // Check for UDMA support
194 1 if ((halfKBuffer[IDENTIFY_FIELD_VALIDITY] & bmBIT2) &&
195 1 (halfKBuffer[IDENTIFY_UDMA_MODES] & (UDMA_MODE2 | UDMA_MODE4)))
196 1 {
197 2 if (halfKBuffer[IDENTIFY_UDMA_MODES] & UDMA_MODE4)
198 2 {
199 3 udmaMode = TRANSFER_MODE_UDMA4;
200 3 }
201 2 else if (halfKBuffer[IDENTIFY_UDMA_MODES] & UDMA_MODE2)
202 2 {
203 3 udmaMode = TRANSFER_MODE_UDMA2;
204 3 }
205 2 }
206 1
207 1 // If UDMA is supported, enable it. If not, enable the highest PIO mode
208 1 if (udmaMode)
209 1 {
210 2 configureATATransferMode(udmaMode);
211 2 udmaErrorCount = 0;
212 2 mymemmovexx(&GPIF_WAVE_DATA, (BYTE xdata *) WaveDataPio4, sizeof(WaveDataPio4));
213 2 }
214 1 else if(MaxPIO)
215 1 {
216 2 if(MaxPIO & PIO4)
217 2 {
218 3 IFCONFIG |= 0x40; // SET CLOCK TO 48MHZ
219 3 configureATATransferMode(PIO_MODE4); // SCR_PIO4=0x0C, PIO-mode4
220 3 }
221 2 else if(MaxPIO & PIO3)
222 2 {
223 3 configureATATransferMode(PIO_MODE3); // SCR_PIO3=0x0B, PIO-mode3
224 3 }
225 2
226 2 mymemmovexx(&GPIF_WAVE_DATA, (BYTE xdata *) WaveDataPio4, sizeof(WaveDataPio4));
227 2 }
228 1
229 1
230 1 driveCapacity -= 1; // The command that reads drive capacity actually wants the last valid LBA.
231 1 return;
232 1 }
233
C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 5
234 void configureATATransferMode(BYTE mode)
235 {
236 1 // select the drive and set new speed
237 1 writePIO8(ATAPI_DRIVESEL_REG, 0xa0);
238 1 writePIO8(ATA_SECTOR_COUNT_REG, mode);
239 1 writePIO8(ATAPI_FEATURE_REG, 0x03); // opcode 0x03 used for transfer mode
240 1 writePIO8(ATAPI_COMMAND_REG, ATAPI_COMMAND_SET_FEATURES); // execute the command
241 1 }
C51 COMPILER V7.10 ATARESET 05/28/2007 19:12:26 PAGE 6
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION Com0035 (BEGIN)
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