add32.asm

dsp2407源程序

             .include "f2407regs.h" 
            .def     	_c_int0
        	.sect	".vectors"						
RSVECT			B    _c_int0 
 
             .text
_c_int0      CLRC  C  
             ldp #0
             lar ar0,#0060h
             lar ar1,#0060h
             mar *,ar0
             lacc #1111h
             sacl *+
             lacc #2222h
             sacl *+
             lacc #0ffffh
             sacl *+
             lacc #4444h
             sacl *+
             zac
             ldp #0
             lar ar0,#0062h
             mar *,ar1
             lacc *+
             mar *,ar0
             add *+
             sacl 64h
             
             mar *,ar1
             lacc *
             mar *,ar0
             addc *
             sacl 65h
             lacc 65h,16
             or 64h        ;通过A累加器观察结果           
wait:         nop
            b wait  
	
            end