tnkernel_startup_iar.s79

LPC2148 bulk传输,带DMA的,而且还带TNKernel实时操作系统

;-----------------------------------------------------------------------------
; This file contains the startup code used by the ICCARM C compiler.
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; All code in the modules (except ?RESET) will be placed in the ICODE segment.
;
; $Revision: 1.3 $
;
;-----------------------------------------------------------------------------

;
; Naming covention of labels in this file:
;
;  ?xxx          - External labels only accessed from assembler.
;  __xxx  - External labels accessed from or defined in C.
;  xxx          - Labels local to one module (note: this file contains
;           several modules).
;  main          - The starting point of the user program.
;

;---------------------------------------------------------------
; Macros and definitions for the whole file
;---------------------------------------------------------------

; Mode, correspords to bits 0-5 in CPSR
MODE_BITS       DEFINE        0x1F                ; Bit mask for mode bits in CPSR
USR_MODE        DEFINE        0x10                ; User mode
FIQ_MODE        DEFINE        0x11                ; Fast Interrupt Request mode
IRQ_MODE        DEFINE        0x12                ; Interrupt Request mode
SVC_MODE        DEFINE        0x13                ; Supervisor mode
ABT_MODE        DEFINE        0x17                ; Abort mode
UND_MODE        DEFINE        0x1B                ; Undefined Instruction mode
SYS_MODE        DEFINE        0x1F                ; System mode

;---------------------------------------------------------------
; ?RESET
; Reset Vector.
; Normally, segment INTVEC is linked at address 0.
; For debugging purposes, INTVEC may be placed at other
; addresses.
; A debugger that honors the entry point will start the
; program in a normal way even if INTVEC is not at address 0.
;---------------------------------------------------------------
                PROGRAM    ?RESET_FLASH_
                COMMON     INTVEC:CODE:ROOT(2)
                PUBLIC     reset
                EXTERN     ?cstartup
                EXTERN     tn_cpu_irq_isr
                EXTERN     tn_cpu_fiq_isr


                CODE32                       ; Always ARM mode after reset

                org  0
reset           ldr     pc, ?vect_entry
                ldr     pc, ?vect_entry +  4
                ldr     pc, ?vect_entry +  8
                ldr     pc, ?vect_entry + 12
                ldr     pc, ?vect_entry + 16
                DC32    0xB8A06F58          /* 0 - (sum of other vectors instructions) */
                ldr     pc, ?vect_entry + 24
                ldr     pc, ?vect_entry + 28

?vect_entry:
                DC32    ?cstartup       ; RES    (  0)
                DC32    ?cstartup       ; UND    ( +4)
                DC32    ?cstartup       ; SWI    ( +8)
                DC32    ?cstartup       ; P_ABT  (+12)
                DC32    ?cstartup       ; D_ABT  (+16)
                DC32    0               ; ARM-reserved vector  (+20)
                DC32    tn_cpu_irq_isr   ; IRQ    (+24)
                DC32    tn_cpu_fiq_isr   ; FRQ    (+28)

                ENDMOD

;---------------------------------------------------------------
; ?CSTARTUP
;---------------------------------------------------------------
                MODULE        ?CSTARTUP

                RSEG        IRQ_STACK:DATA(2)
                RSEG        FIQ_STACK:DATA(2) ;-- My
                RSEG        SVC_STACK:DATA:NOROOT(2)
                RSEG        CSTACK:DATA(2)
                RSEG        ICODE:CODE:NOROOT(2)
                PUBLIC      ?cstartup
                EXTERN      ?main
                EXTERN      tn_startup_hardware_init

; Execution starts here.
; After a reset, the mode is ARM, Supervisor, interrupts disabled.


                CODE32
?cstartup


; Add initialization nedded before setup of stackpointers here


                ldr     r0, =tn_startup_hardware_init
                mov     lr, pc
                bx      r0


; Initialize the stack pointers.
; The pattern below can be used for any of the exception stacks:
; FIQ, IRQ, SVC, ABT, UND, SYS.
; The USR mode uses the same stack as SYS.
; The stack segments must be defined in the linker command file,
; and be declared above.
                mrs     r0,cpsr                             ; Original PSR value
                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
                orr     r0,r0,#IRQ_MODE                     ; Set IRQ mode bits
                msr     cpsr_c,r0                           ; Change the mode
                ldr     sp,=SFE(IRQ_STACK) & 0xFFFFFFF8     ; End of IRQ_STACK
;-------- My -----------
                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
                orr     r0,r0,#FIQ_MODE                     ; Set FIQ mode bits
                msr     cpsr_c,r0                           ; Change the mode
                ldr     sp,=SFE(FIQ_STACK) & 0xFFFFFFF8     ; End of FIQ_STACK
   ;-- In SVC mode
                bic     r0,r0,#MODE_BITS                  ; Clear the mode bits
                orr     r0,r0,#SVC_MODE                   ; Set Supervisor mode bits
                msr     cpsr_c,r0                         ; Change the mode
                ldr     sp,=SFE(CSTACK) & 0xFFFFFFF8      ; End of CSTACK
;------- End My --------

#ifdef __ARMVFP__
; Enable the VFP coprocessor.
                mov     r0, #0x40000000                 ; Set EN bit in VFP
                fmxr    fpexc, r0                       ; FPEXC, clear others.

; Disable underflow exceptions by setting flush to zero mode.
; For full IEEE 754 underflow compliance this code should be removed
; and the appropriate exception handler installed.
                mov     r0, #0x01000000                        ; Set FZ bit in VFP
                fmxr    fpscr, r0                       ; FPSCR, clear others.
#endif

; Add more initialization here


; Continue to ?main for more IAR specific system startup

                ldr     r0,=?main
                bx      r0

;------------------------------------------------------------------------------
;- Loop for ever
;---------------
;- End of application. Normally, never occur.
;- Could jump on Software Reset ( B 0x0 ).
;------------------------------------------------------------------------------
?call_exit:
End
            b       End

                LTORG

                ENDMOD


                END