dac2adc.tan.summary

来自「FPGA+DA转换,ALTERA公司FPGA与DA实现,DA转换功能!」· SUMMARY 代码 · 共 87 行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.049 ns
From           : LM311
To             : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[0]
From Clock     : 
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 10.242 ns
From           : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[0]
To             : DD[0]
From Clock     : CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 11.344 ns
From           : LM311
To             : DISPDATA[7]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -4.997 ns
From           : LM311
To             : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[0]
From Clock     : 
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 6.834 ns
From           : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[6]
To             : DD[6]
From Clock     : CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tpd
Slack          : N/A
Required Time  : None
Actual Time    : 10.973 ns
From           : LM311
To             : DISPDATA[2]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[1]
To             : lpm_counter:CQI_rtl_0|cntr_uu7:auto_generated|safe_q[7]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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