ixjdefs.h

radius协议源码÷The Radius Stack will connect to a Radius Server. This stack implementation is built upo

/*
	ixjDefs.h

	Copyright (c) 1996-1998, Quicknet Technologies, Inc.
	All Rights Reserved.

	Internet PhoneJACK, Internet LineJACK, etc. definitions.

    -----------------------------------------------------------------

	$Header: /home/cvsroot/openh323/include/ixjDefs.h,v 1.1 1999/10/24 12:59:40 robertj Exp $
	
*/

#ifndef _IXJDEFS_H
#define _IXJDEFS_H

//==========================================================================
//==========================================================================
//
//	Constants and structures for Quicknet's Internet PhoneJACK and
//	Internet LineJACK cards.
//
//==========================================================================

//------------------------------------------------
//	Plug and Play IDs
//------------------------------------------------
#define MODEL_INTERNET_PHONEJACK	0x0100
#define MODEL_INTERNET_LINEJACK		0x0300

//--------------------------------------------------------------------------
//	Codec support
//--------------------------------------------------------------------------
//
#define CODEC_RATE_4000Hz  4000
#define CODEC_RATE_5500Hz  5500
#define CODEC_RATE_6000Hz  6000
#define CODEC_RATE_7333Hz  7333
#define CODEC_RATE_8000Hz  8000
#define CODEC_RATE_11025Hz 11025
#define CODEC_RATE_16000Hz 16000
#define CODEC_RATE_22050Hz 22050
#define CODEC_RATE_32000Hz 32000
#define CODEC_RATE_33075Hz 33075
#define CODEC_RATE_44100Hz 44100
#define CODEC_RATE_48000Hz 48000

#define OLD_CODEC_RATE_4000Hz  1000
#define OLD_CODEC_RATE_5500Hz  1010
#define OLD_CODEC_RATE_6000Hz  1020
#define OLD_CODEC_RATE_7333Hz  1030
#define OLD_CODEC_RATE_8000Hz  1040
#define OLD_CODEC_RATE_11025Hz 1050
#define OLD_CODEC_RATE_16000Hz 1060
#define OLD_CODEC_RATE_22050Hz 1070
#define OLD_CODEC_RATE_32000Hz 1080
#define OLD_CODEC_RATE_33075Hz 1090
#define OLD_CODEC_RATE_44100Hz 1100
#define OLD_CODEC_RATE_48000Hz 1110

//	XTAL = 3.8912 MHz
//	Clock = 10*XTAL = 38.912 MHz
//
//	Rules:
//		SCLK = Clock/(N+1)
//		FSYNC = SCLK/(M+1)
//
//		4 <= (N+1) <= 32
//		For 8-bit Codec:  SCLK >= 16*FSYNC
//		For 16-bit Codec: SCLK >= 32*FSYNC
//
//	8Khz Playback/Record:
//		SCLK = Clock/( 18+1) = 2.048 MHz
//		FSYNC = SCLK/(255+1) =  8000 Hz ( 8,000.0 Hz =   8,000 Hz standard + 0%)
//	11Khz Playback/Record:
//		SCLK = Clock/( 13+1) = 2.779 MHz
//		FSYNC = SCLK/(251+1) =  11025 Hz (11,029.5 Hz = 11,025 Hz standard + -0.04%)
//	22Khz Playback/Record:
//		SCLK = Clock/( 9+1)  = 3.8912 MHz
//		FSYNC = SCLK/(175+1) =  22050 Hz (22,109.1 Hz = 22,050 Hz standard + ?.?%) +59.1
//
//		SCLK = Clock/( 13+1) = 2.779 MHz
//		FSYNC = SCLK/(125+1) =  22050 Hz (22,059.0 Hz = 22,050 Hz standard + ?.?%) 
//

//	XTAL = 3.8912 MHz
//	Clock = 10*XTAL = 38.912 MHz
//
//	SCLK = Clock/( 18+1) = 2.048 MHz
//	FSYNC = SCLK/(371+1) =  5505 Hz ( 5,505.4 Hz =  5,500 Hz standard + x%)
//	FSYNC = SCLK/(340+1) =  6006 Hz ( 6,005.9 Hz =  6,000 Hz standard + x%)
//	FSYNC = SCLK/(278+1) =  7341 Hz ( 7,340.5 Hz =  7,333 Hz standard + x%)
//	FSYNC = SCLK/(255+1) =  8000 Hz ( 8,000.0 Hz =  8,000 Hz standard + 0%)
//	FSYNC = SCLK/(127+1) = 16000 Hz (16,000.0 Hz = 16,000 Hz standard + 0%)
//	FSYNC = SCLK/( 63+1) = 32000 Hz (32,000.0 Hz = 32,000 Hz standard + 0%)
//	FSYNC = SCLK/( 61+1) = 33032 Hz (33,032.3 Hz = 33,075 Hz standard + x%)
//	FSYNC = SCLK/( 45+1) = 44522 Hz (44,521.7 Hz = 44,100 Hz standard + x%)
//	FSYNC = SCLK/( 42+1) = 47628 Hz (47,627.9 Hz = 48,000 Hz standard - x%)

//	Selects: Sets the division factor used to divide the SCLK clock to generate FSYNC.
#define CODEC_FSYNC_RATE_371 371
#define CODEC_FSYNC_RATE_340 340
#define CODEC_FSYNC_RATE_278 278
#define CODEC_FSYNC_RATE_255 255
#define CODEC_FSYNC_RATE_251 251
#define CODEC_FSYNC_RATE_185 185
#define CODEC_FSYNC_RATE_175 175
#define CODEC_FSYNC_RATE_127 127
#define CODEC_FSYNC_RATE_125 125
#define CODEC_FSYNC_RATE_92   92
#define CODEC_FSYNC_RATE_63   63
#define CODEC_FSYNC_RATE_61   61
#define CODEC_FSYNC_RATE_45   45
#define CODEC_FSYNC_RATE_42   42

//	Selects: Sets the division factor used to divide the main CT8020 clock to generate SCLK.
#define CODEC_CO_RATE_9 9
#define CODEC_CO_RATE_13 13
#define CODEC_CO_RATE_19 19
#define CODEC_CO_RATE_18 18

const WORD CODEC_WIDTH_8BIT  = 0;	//	Selects 8-bit Mu-law codec.
const WORD CODEC_WIDTH_16BIT = 1;	//	Selects 16-bit linear codec.

const WORD CODEC_LAW_MULAW = 0;	//	Selects external Mu-law codec.

const WORD CODEC_MASTER_SLAVE  = 0;	//	Selects save mode (FSYNC and SCLK are inputs - default after reset).
const WORD CODEC_MASTER_MASTER = 1;	//	Selects master mode (FSYNC and SCLK are outputs).

const WORD CODEC_LONG_SHORTFRAME = 0;	//	Selects short frame sync mode when WIDE=0.
const WORD CODEC_LONG_LONGFRAME  = 1;	//	Selects long frame sync mode when WIDE=1.

const WORD CODEC_OUTPUT_CODEC_DEFAULT = 0;	//	Selects: default output codec routing.
const WORD CODEC_OUTPUT_CODEC_CODEC1  = 1;	//	Selects: output signal goes to codec 1 only.
const WORD CODEC_OUTPUT_CODEC_CODEC0  = 2;	//	Selects: output signal goes to codec 0 only.
const WORD CODEC_OUTPUT_CODEC_BOTH    = 3;	//	Selects: output signal goes to both codec 0 and codec 1.

const WORD CODEC_INPUT_CODEC_NORMAL   = 0;	//	Selects: normal input codec routing.
const WORD CODEC_INPUT_CODEC_EXCHANGE = 1;	//	Selects: input from codec 0 and codec 1 exchanged.

const WORD CODEC_SET_RATE_NOACTION = 0;	//	Selects: no action.
const WORD CODEC_SET_RATE_NEXTCMD  = 1;	//	Selects: next command word programs codec sample rate dividers.

const WORD CODEC_WIDE_1SCLK      = 0;		//	Selects: FSYNC is 1 SCLK period wide.
const WORD CODEC_WIDE_8OR16SCLKS = 1;		//	Selects: FSYNC is 8 SCLK periods wide if Width=0 or 16 SCLK periods wide if Width=1.

const DWORD XTAL_38912 = 3891200;
const DWORD XTAL_4000 = 4000000;
const DWORD XTAL_4096 = 4096000;

const DWORD SCLK_2048 = 2048000;
const DWORD SCLK_512 = 512000;
const DWORD SCLK_1024 = 1024000;
const DWORD SCLK_2000 = 2000000;
const DWORD SCLK_MAX = 1835008; // 300373; // 2097152; // 2095600;

//==========================================================================
//--------------------------------------------------------------------------
//	Compression/Decompression support
//--------------------------------------------------------------------------
//
#define COMPRESS_MODE_TRUESPEECH  0	//	Selects: TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps
#define COMPRESS_MODE_ULAW        2	//	Selects: 64 Kbit/sec U-law PCM
#define COMPRESS_MODE_16LINEAR    6	//	Selects: 128 Kbit/sec 16-bit linear
#define COMPRESS_MODE_8LINEAR     4	//	Selects: 64 Kbit/sec 8-bit signed linear
#define COMPRESS_MODE_8LINEAR_WSS 5	//	Selects: 64 Kbit/sec WSS 8-bit unsigned linear

//	TrueSpeech compress modes: 8.5 - 4.1
#define COMPRESS_RATE_TS85 0	//	Selects TrueSpeech 8.5 play mode.
#define COMPRESS_RATE_TS63 1	//	Selects TrueSpeech 6.3 play mode.
#define COMPRESS_RATE_TS53 2	//	Selects TrueSpeech 5.3 play mode.
#define COMPRESS_RATE_TS48 3	//	Selects TrueSpeech 4.8 play mode.
#define COMPRESS_RATE_TS41 4	//	Selects TrueSpeech 4.1 play mode.

//	G.723.1 record/compress modes: 6.3 & 5.3
//	NOTE: Same as TrueSpeech 6.3 & 5.3 modes.
#define COMPRESS_RATE_G7231_TS63 1	//	Selects TrueSpeech 6.3 play mode.
#define COMPRESS_RATE_G7231_TS53 2	//	Selects TrueSpeech 5.3 play mode.

// ------------------------

#define COMPRESS_FRAME_TRUESPEECH  0	//	TrueSpeech 8.5, 6.3, 5.3, 4.8 or 4.1 Kbps
#define COMPRESS_FRAME_ULAW        120	//	64 Kbit/sec U-law PCM
#define COMPRESS_FRAME_16LINEAR    240	//	128 Kbit/sec 16-bit linear
#define COMPRESS_FRAME_8LINEAR     120	//	64 Kbit/sec 8-bit signed linear
#define COMPRESS_FRAME_8LINEAR_WSS 120	//	64 Kbit/sec WSS 8-bit unsigned linear

//	TrueSpeech recording modes: 8.5 - 4.1
#define COMPRESS_FRAME_TS85 16	//	TrueSpeech 8.5 record frame.
#define COMPRESS_FRAME_TS63 12	//	TrueSpeech 6.3 record frame.
#define COMPRESS_FRAME_TS53 10	//	TrueSpeech 5.3 record frame.
#define COMPRESS_FRAME_TS48 9		//	TrueSpeech 4.8 record frame.
#define COMPRESS_FRAME_TS41 8		//	TrueSpeech 4.1 record frame.

//	G.723.1 recording modes: 6.3 & 5.3
//	NOTE: Same as TrueSpeech 6.3 & 5.3 modes.
#define COMPRESS_FRAME_G7231_TS63 COMPRESS_FRAME_TS63	//	TrueSpeech 6.3 record frame.
#define COMPRESS_FRAME_G7231_TS53 COMPRESS_FRAME_TS53	//	TrueSpeech 5.3 record frame.

#define COMPRESS_MAX_BUFFER_SIZE COMPRESS_FRAME_16LINEAR	//	Max buffer size: Tx or Rx.

//	Additional bit patterns to 'Or' into Command Base 'words'
const WORD COMPRESS_TFRMODE_80X5 = 0;	//	Selects Data transfer via Software Control and Status Registers (CT8015/CT8005 protocol mode).
const WORD COMPRESS_TFRMODE_8020 = 3;	//	Selects Data transfer via Host Transmit Data Buffer Access Port.

const WORD COMPRESS_SYNC_MODE_CODEC = 0;
const WORD COMPRESS_SYNC_MODE_DATA  = 1;
const WORD COMPRESS_SYNC_MODE_POLL  = 2;
const WORD COMPRESS_SYNC_MODE_HOST  = 3;

//==========================================================================
//--------------------------------------------------------------------------
//	Device support
//--------------------------------------------------------------------------
//
//	Additional bit patterns to 'Or' into Command Base 'words'
//const WORD DEVCTRL_TONE_MODE_SYNC  = 0;	//	Selects Synchronous Tone mode
//const WORD DEVCTRL_TONE_MODE_ASYNC = 1;	//	Selects Asynchronous Tone mode

// Analog source for the Codec #1.
//	Analog source is determined by the GPIO bits: 6 & 7.
//					| GPIO6	| GPIO7	|
//------------------|-------|-------|-------
//	POTS Phone		|   0	|   0	|
//	Speakerphone	|   0	|   1	|
//	Handset Phone	|   1	|   0	|
//	  ??????		|   1   |   1   |
//-------------------------------------------
//
#define ANALOG_SOURCE_POTSPHONE		(0x0)
#define ANALOG_SOURCE_SPEAKERPHONE	(0x1)
#define ANALOG_SOURCE_HANDSETPHONE	(0x2)
#define ANALOG_SOURCE_PSTNLINE		(0x2)

#define LINEJACK_MODE_PHONEJACK		(0x0)
#define LINEJACK_MODE_LINEJACK		(0x1)
#define LINEJACK_MODE_STANDALONE	(0x2)

// SLIC States
//	SLIC State is determined by the GPIO bits: 1,2,3
//					| GPIO3	| GPIO2	| GPIO1	| !GPIO1 |
//					|   C3	|   C2	|   C1	|  B2EN	 |
//------------------|-------|-------|-------|--------|
//	Open Circuit	|   0	|   0	|   0	|   1	 |
//	Ringing   		|   0	|   0	|   1	|   0	 |
//	Active       	|   0	|   1	|   0	|   1	 |
//----------------------------------------------------
//
#define SLIC_STATE_OPENCIRCUIT	0
#define SLIC_STATE_RINGING		1
#define SLIC_STATE_ACTIVE		2
#define SLIC_STATE_OHT			3
#define SLIC_STATE_TIPOPEN		4
#define SLIC_STATE_STANDBY		5
#define SLIC_STATE_APR			6
#define SLIC_STATE_OHTPR		7

// Switch Hook States
//	Switch Hook State is determined by GPIO 5
//					| GPIO5	 |
//------------------|--------|
//	Off Hook		|   0	 |
//	On Hook			|   1	 |
//----------------------------
//
#define SLIC_OFF_HOOK	(0x0)
#define SLIC_ON_HOOK	(0x1)

// LineJack Test error codes
#define LINE_TEST_OK 0
#define LINE_TEST_TESTING 1
#define LINE_TEST_POTS_OFF_HOOK 2
#define LINE_TEST_LINE_CONNECTED_TO_POTS 3
#define LINE_TEST_NO_LINE_PRESENT 4

// The ring pattern is a 12-bit sequence.
// Each bit represents 1/2 second of ring
// on or off for a total of 6 seconds.
#define RING_PATTERN_MASK (0x0FFF)

#define DEVCTRL_HOOKSTATE_INIT			0
#define DEVCTRL_HOOKSTATE_ON_HOOK_1		1
#define DEVCTRL_HOOKSTATE_ON_HOOK_2		2
#define DEVCTRL_HOOKSTATE_ON_HOOK_3		3
#define DEVCTRL_HOOKSTATE_OFF_HOOK_1	4
#define DEVCTRL_HOOKSTATE_OFF_HOOK_2	5
#define DEVCTRL_HOOKSTATE_OFF_HOOK_3	6