ixj-redhat.c

radius协议源码÷The Radius Stack will connect to a Radius Server. This stack implementation is built upo

			ixj_WriteDSPCommand(0xE011, board);
			ixj_WriteDSPCommand(0x0080, board);
			break;

		case AEC_HIGH:
			ixj_WriteDSPCommand(0x0C00, board);	// Advanced AEC C2 = on high

			ixj_WriteDSPCommand(0xE011, board);
			ixj_WriteDSPCommand(0x0080, board);
			break;

		case AEC_AUTO:
			ixj_WriteDSPCommand(0x0002, board);	// Attenuation scaling factor of 2

			ixj_WriteDSPCommand(0xE011, board);
			ixj_WriteDSPCommand(0x0100, board);	// Higher Threshold Floor

			ixj_WriteDSPCommand(0xE012, board);	// Set Train and Lock

			ixj_WriteDSPCommand(0x0023, board);

			ixj_WriteDSPCommand(0xE014, board);
			ixj_WriteDSPCommand(0x0003, board);	// Lock threashold at 3dB

			break;
		}
	}
}

static void aec_stop(int board)
{
	IXJ *j = &ixj[board];

	if (j->rec_codec == G729 || j->play_codec == G729) {
		ixj_WriteDSPCommand(0xE022, board);	// Move AEC filter buffer back

		ixj_WriteDSPCommand(0x0700, board);
	}
	if (ixj[board].play_mode != -1 && ixj[board].rec_mode != -1);
	{
		ixj_WriteDSPCommand(0xB002, board);	// AEC Stop

	}
}

static int set_play_codec(int board, int rate)
{
	int retval = 0;
	IXJ *j = &ixj[board];

	j->play_codec = rate;

	switch (rate) {
	case G723_63:
		if (j->ver.low != 0x12 || ixj_convert_loaded) {
			j->play_frame_size = 12;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case G723_53:
		if (j->ver.low != 0x12 || ixj_convert_loaded) {
			j->play_frame_size = 10;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case TS85:
		if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
			j->play_frame_size = 16;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case TS48:
		if (j->ver.low != 0x12 || ixj_convert_loaded) {
			j->play_frame_size = 9;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case TS41:
		if (j->ver.low != 0x12 || ixj_convert_loaded) {
			j->play_frame_size = 8;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case G728:
		if (j->dsp.low != 0x20) {
			j->play_frame_size = 48;
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case G729:
		if (j->dsp.low != 0x20) {
			if (!j->flags.g729_loaded) {
				retval = 1;
				break;
			}
			switch (j->baseframe.low) {
			case 0xA0:
				j->play_frame_size = 10;
				break;
			case 0x50:
				j->play_frame_size = 5;
				break;
			default:
				j->play_frame_size = 15;
				break;
			}
			j->play_mode = 0;
		} else {
			retval = 1;
		}
		break;
	case ULAW:
		switch (j->baseframe.low) {
		case 0xA0:
			j->play_frame_size = 80;
			break;
		case 0x50:
			j->play_frame_size = 40;
			break;
		default:
			j->play_frame_size = 120;
			break;
		}
		j->play_mode = 2;
		break;
	case ALAW:
		switch (j->baseframe.low) {
		case 0xA0:
			j->play_frame_size = 80;
			break;
		case 0x50:
			j->play_frame_size = 40;
			break;
		default:
			j->play_frame_size = 120;
			break;
		}
		j->play_mode = 2;
		break;
	case LINEAR16:
		switch (j->baseframe.low) {
		case 0xA0:
			j->play_frame_size = 160;
			break;
		case 0x50:
			j->play_frame_size = 80;
			break;
		default:
			j->play_frame_size = 240;
			break;
		}
		j->play_mode = 6;
		break;
	case LINEAR8:
		switch (j->baseframe.low) {
		case 0xA0:
			j->play_frame_size = 80;
			break;
		case 0x50:
			j->play_frame_size = 40;
			break;
		default:
			j->play_frame_size = 120;
			break;
		}
		j->play_mode = 4;
		break;
	case WSS:
		switch (j->baseframe.low) {
		case 0xA0:
			j->play_frame_size = 80;
			break;
		case 0x50:
			j->play_frame_size = 40;
			break;
		default:
			j->play_frame_size = 120;
			break;
		}
		j->play_mode = 5;
		break;
	default:
		j->play_frame_size = 0;
		j->play_mode = -1;
		if (j->write_buffer) {
			kfree(j->write_buffer);
			j->write_buffer = NULL;
			j->write_buffer_size = 0;
		}
		retval = 1;
		break;
	}
	return retval;
}

static int ixj_play_start(int board)
{
	unsigned short cmd = 0x0000;
	IXJ *j = &ixj[board];

	if (j->write_buffer) {
		ixj_play_stop(board);
	}

	j->flags.play_first_frame = 1;
	j->drybuffer = 0;

	if (!j->play_mode) {
		switch (j->play_codec) {
		case G723_63:
			cmd = 0x5231;
			break;
		case G723_53:
			cmd = 0x5232;
			break;
		case TS85:
			cmd = 0x5230;	// TrueSpeech 8.5

			break;
		case TS48:
			cmd = 0x5233;	// TrueSpeech 4.8

			break;
		case TS41:
			cmd = 0x5234;	// TrueSpeech 4.1

			break;
		case G728:
			cmd = 0x5235;
			break;
		case G729:
			cmd = 0x5236;
			break;
		default:
			return 1;
		}
		if (ixj_WriteDSPCommand(cmd, board))
			return -1;
	}
	j->write_buffer = kmalloc(j->play_frame_size * 2, GFP_ATOMIC);
	if (!j->write_buffer) {
		printk("Write buffer allocation for ixj board %d failed!\n", board);
		return -ENOMEM;
	}
	j->write_buffers_empty = 2;
	j->write_buffer_size = j->play_frame_size * 2;
	j->write_buffer_end = j->write_buffer + j->play_frame_size * 2;
	j->write_buffer_rp = j->write_buffer_wp = j->write_buffer;

	if (ixj_WriteDSPCommand(0x5202, board))		// Set Poll sync mode

		return -1;

	switch (j->play_mode) {
	case 0:
		cmd = 0x2C03;
		break;
	case 2:
		if (j->ver.low == 0x12) {
			cmd = 0x2C23;
		} else {
			cmd = 0x2C21;
		}
		break;
	case 4:
		if (j->ver.low == 0x12) {
			cmd = 0x2C43;
		} else {
			cmd = 0x2C41;
		}
		break;
	case 5:
		if (j->ver.low == 0x12) {
			cmd = 0x2C53;
		} else {
			cmd = 0x2C51;
		}
		break;
	case 6:
		if (j->ver.low == 0x12) {
			cmd = 0x2C63;
		} else {
			cmd = 0x2C61;
		}
		break;
	}
	if (ixj_WriteDSPCommand(cmd, board))
		return -1;

	if (ixj_WriteDSPCommand(0x2000, board))		// Playback C2

		return -1;

	if (ixj_WriteDSPCommand(0x2000 + ixj[board].play_frame_size, board))	// Playback C3

		return -1;

	return 0;
}

static void ixj_play_stop(int board)
{
	IXJ *j = &ixj[board];

	if (j->write_buffer) {
		kfree(j->write_buffer);
		j->write_buffer = NULL;
		j->write_buffer_size = 0;
	}

	if (j->play_mode > -1) {
		ixj_WriteDSPCommand(0x5221, board);	// Stop playback

		j->play_mode = -1;
	}
}

extern __inline__ void set_play_depth(int board, int depth)
{
	if (depth > 60)
		depth = 60;
	if (depth < 0)
		depth = 0;
	ixj_WriteDSPCommand(0x5280 + depth, board);
}

extern __inline__ void set_play_volume(int board, int volume)
{
	ixj_WriteDSPCommand(0xCF02, board);
	ixj_WriteDSPCommand(volume, board);
}

extern __inline__ int get_play_level(int board)
{
	ixj_WriteDSPCommand(0xCF8F, board);
	return ixj[board].ssr.high << 8 | ixj[board].ssr.low;
}

static unsigned int ixj_poll(struct file *file_p, poll_table * wait)
{
	unsigned int mask = 0;
	IXJ *j = &ixj[NUM(file_p->f_dentry->d_inode->i_rdev)];

	poll_wait(file_p, &(j->poll_q), wait);
	if (j->read_buffer_ready > 0)
		mask |= POLLIN | POLLRDNORM;	/* readable */
	if (j->write_buffers_empty > 0)
		mask |= POLLOUT | POLLWRNORM;	/* writable */
	if (j->ex.bytes)
		mask |= POLLPRI;
	return mask;
}

static int ixj_play_tone(int board, char tone)
{
	IXJ *j = &ixj[board];

	if (!j->tone_state)
		idle(board);

	j->tone_index = tone;
	if (ixj_WriteDSPCommand(0x6000 + j->tone_index, board))
		return -1;

	if (!j->tone_state) {
		j->tone_start_jif = jiffies;

		j->tone_state = 1;
	}
	return 0;
}

static int ixj_set_tone_on(unsigned short arg, int board)
{
	IXJ *j = &ixj[board];

	j->tone_on_time = arg;

	if (ixj_WriteDSPCommand(0x6E04, board))		// Set Tone On Period

		return -1;

	if (ixj_WriteDSPCommand(arg, board))
		return -1;

	return 0;
}

static int SCI_WaitHighSCI(int board)
{
	int cnt;
	IXJ *j = &ixj[board];

	j->pld_scrr.byte = inb_p(j->XILINXbase);
	if (!j->pld_scrr.bits.sci) {
		for (cnt = 0; cnt < 10; cnt++) {
			udelay(32);
			j->pld_scrr.byte = inb_p(j->XILINXbase);

			if ((j->pld_scrr.bits.sci))
				return 1;
		}
		if (ixjdebug > 1)
			printk(KERN_INFO "SCI Wait High failed %x\n", j->pld_scrr.byte);
		return 0;
	} else
		return 1;
}

static int SCI_WaitLowSCI(int board)
{
	int cnt;
	IXJ *j = &ixj[board];

	j->pld_scrr.byte = inb_p(j->XILINXbase);
	if (j->pld_scrr.bits.sci) {
		for (cnt = 0; cnt < 10; cnt++) {
			udelay(32);
			j->pld_scrr.byte = inb_p(j->XILINXbase);

			if (!(j->pld_scrr.bits.sci))
				return 1;
		}
		if (ixjdebug > 1)
			printk(KERN_INFO "SCI Wait Low failed %x\n", j->pld_scrr.byte);
		return 0;
	} else
		return 1;
}

static int SCI_Control(int board, int control)
{
	IXJ *j = &ixj[board];

	switch (control) {
	case SCI_End:
		j->pld_scrw.bits.c0 = 0;	// Set PLD Serial control interface

		j->pld_scrw.bits.c1 = 0;	// to no selection 

		break;
	case SCI_Enable_DAA:
		j->pld_scrw.bits.c0 = 1;	// Set PLD Serial control interface

		j->pld_scrw.bits.c1 = 0;	// to write to DAA

		break;
	case SCI_Enable_Mixer:
		j->pld_scrw.bits.c0 = 0;	// Set PLD Serial control interface

		j->pld_scrw.bits.c1 = 1;	// to write to mixer 

		break;
	case SCI_Enable_EEPROM:
		j->pld_scrw.bits.c0 = 1;	// Set PLD Serial control interface

		j->pld_scrw.bits.c1 = 1;	// to write to EEPROM 

		break;
	default:
		return 0;
		break;
	}
	outb_p(j->pld_scrw.byte, j->XILINXbase);

	switch (control) {
	case SCI_End:
		return 1;
		break;
	case SCI_Enable_DAA:
	case SCI_Enable_Mixer:
	case SCI_Enable_EEPROM:
		if (!SCI_WaitHighSCI(board))
			return 0;
		break;
	default:
		return 0;
		break;
	}
	return 1;
}

static int SCI_Prepare(int board)
{
	if (!SCI_Control(board, SCI_End))
		return 0;

	if (!SCI_WaitLowSCI(board))
		return 0;

	return 1;
}

static int ixj_mixer(long val, int board)
{
	BYTES bytes;
	IXJ *j = &ixj[board];

	bytes.high = (val & 0xFF00) >> 8;
	bytes.low = val & 0x00FF;

	outb_p(bytes.high & 0x1F, j->XILINXbase + 0x03);	// Load Mixer Address

	outb_p(bytes.low, j->XILINXbase + 0x02);	// Load Mixer Data

	SCI_Control(board, SCI_Enable_Mixer);

	SCI_Control(board, SCI_End);

	return 0;
}

static int daa_load(BYTES * p_bytes, int board)
{
	IXJ *j = &ixj[board];

	outb_p(p_bytes->high, j->XILINXbase + 0x03);
	outb_p(p_bytes->low, j->XILINXbase + 0x02);
	if (!SCI_Control(board, SCI_Enable_DAA))
		return 0;
	else
		return 1;
}

static int ixj_daa_cr4(int board, char reg)
{
	IXJ *j = &ixj[board];
	BYTES bytes;

	switch (j->daa_mode) {
	case SOP_PU_SLEEP:
		bytes.high = 0x14;
		break;
	case SOP_PU_RINGING:
		bytes.high = 0x54;
		break;
	case SOP_PU_CONVERSATION:
		bytes.high = 0x94;
		break;
	case SOP_PU_PULSEDIALING:
		bytes.high = 0xD4;
		break;
	}

	j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = reg;

	switch (j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGX) {
	case 0:
		j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 0;
		break;
	case 1:
		j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 2;
		break;
	case 2:
		j->m_DAAShadowRegs