xllp_ac97acodec.cod
来自「pxa270为硬件平台的wince操作系统XLLP驱动源码」· COD 代码 · 共 1,214 行 · 第 1/3 页
COD
1,214 行
00078 e28d2000 add r2, sp, #0
0007c e28d1030 add r1, sp, #0x30
00080 e1a00004 mov r0, r4
00084 eb000000 bl XllpGpioSetAlternateFn
; 115 :
; 116 : // Set sdata_out, sync, sysclock
; 117 : #ifdef USE_AC97SYSCLK //this is broken, we need to address this in another layer
; 118 : pins[0] = 3; //SPECIFY 3 PIN ITEMS
; 119 : #else
; 120 : pins[0] = 2; //SPECIFY 2 PIN ITEMS
; 121 : #endif
; 122 : pins[1] = XLLP_GPIO_AC97_SDATA_OUT;
; 123 : pins[2] = XLLP_GPIO_AC97_SYNC;
00088 e3a0101f mov r1, #0x1F
; 124 :
; 125 : #ifdef USE_AC97SYSCLK
; 126 : #ifdef MSII //this is broken, we need to address this in another layer
; 127 : pins[3] = XLLP_GPIO_BTRTS; // use GPIO 45 as AC97_SYSCLK
; 128 : #else //ZOAR
; 129 : pins[3] = XLLP_GPIO_KP_MKIN4; // use GPIO 98 as AC97_SYSCLK
; 130 : #endif
; 131 : #endif
; 132 :
; 133 : fn[0] = 3; //SPECIFY 3 FUNCTION ITEMS
0008c e3a00003 mov r0, #3
; 134 : fn[1] = XLLP_GPIO_ALT_FN_2; //SDATA_OUT IS ALT FN 2
; 135 : fn[2] = XLLP_GPIO_ALT_FN_2; //AC97_SYC IS ALT FN 2
; 136 : fn[3] = XLLP_GPIO_ALT_FN_1; ////AC97_SYSCLK IS ALT FN on pin 45 or 98
00090 e58d1038 str r1, [sp, #0x38]
00094 e58d0000 str r0, [sp]
00098 e3a03002 mov r3, #2
0009c e3a0201e mov r2, #0x1E
000a0 e3a0e002 mov lr, #2
000a4 e3a07002 mov r7, #2
000a8 e3a08001 mov r8, #1
; 137 :
; 138 : XllpGpioSetOutputState1((XLLP_GPIO_T *)pGPIO, pins); //INITIAL STATE OF THE GPIO
000ac e28d1030 add r1, sp, #0x30
000b0 e1a00004 mov r0, r4
000b4 e58d3030 str r3, [sp, #0x30]
000b8 e58d2034 str r2, [sp, #0x34]
000bc e58de004 str lr, [sp, #4]
000c0 e58d7008 str r7, [sp, #8]
000c4 e58d800c str r8, [sp, #0xC]
000c8 eb000000 bl XllpGpioSetOutputState1
; 139 : XllpGpioSetDirectionOut((XLLP_GPIO_T *)pGPIO, pins); //SET THEM FOR OUTPUT
000cc e28d1030 add r1, sp, #0x30
000d0 e1a00004 mov r0, r4
000d4 eb000000 bl XllpGpioSetDirectionOut
; 140 : XllpGpioSetAlternateFn((XLLP_GPIO_T *)pGPIO, pins, fn); //ASSIGN ALT FUNC FOR GPIOS
000d8 e28d2000 add r2, sp, #0
000dc e28d1030 add r1, sp, #0x30
000e0 e1a00004 mov r0, r4
000e4 eb000000 bl XllpGpioSetAlternateFn
; 141 :
; 142 : // Set sdata_reset_n
; 143 : pins[0] = 1;
; 144 : pins[1] = XLLP_GPIO_AC97_RESET_n;
; 145 : fn[0] = 1;
000e8 e3a01001 mov r1, #1
; 146 : fn[1] = XLLP_GPIO_ALT_FN_0;
000ec e3a00000 mov r0, #0
000f0 e58d1000 str r1, [sp]
000f4 e58d0004 str r0, [sp, #4]
000f8 e3a03001 mov r3, #1
000fc e3a02071 mov r2, #0x71
; 147 : XllpGpioSetOutput0((XLLP_GPIO_T *)pGPIO, pins);
00100 e28d1030 add r1, sp, #0x30
00104 e1a00004 mov r0, r4
00108 e58d3030 str r3, [sp, #0x30]
0010c e58d2034 str r2, [sp, #0x34]
00110 eb000000 bl XllpGpioSetOutput0
; 148 : XllpGpioSetDirectionOut((XLLP_GPIO_T *)pGPIO, pins);
00114 e28d1030 add r1, sp, #0x30
00118 e1a00004 mov r0, r4
0011c eb000000 bl XllpGpioSetDirectionOut
; 149 : XllpGpioSetAlternateFn((XLLP_GPIO_T *)pGPIO, pins, fn);
00120 e28d2000 add r2, sp, #0
00124 e28d1030 add r1, sp, #0x30
00128 e1a00004 mov r0, r4
0012c eb000000 bl XllpGpioSetAlternateFn
; 150 :
; 151 :
; 152 : // Enable clocking of AC '97 controller device in processor
; 153 : pCLKMGR->cken |= XLLP_CLKEN_AC97;
00130 e5963004 ldr r3, [r6, #4]
; 154 :
; 155 : // Perform the cold reset.
; 156 : // Also enables the codec(s), control unit and the control unit's FIFOs
; 157 : status = XllpAc97ACODECColdReset(pAc97ctxt);
00134 e3a02000 mov r2, #0
00138 e3a01064 mov r1, #0x64
0013c e3833004 orr r3, r3, #4
00140 e5863004 str r3, [r6, #4]
00144 e5958008 ldr r8, [r5, #8]
00148 e5959024 ldr r9, [r5, #0x24]
0014c e5954004 ldr r4, [r5, #4]
00150 e588200c str r2, [r8, #0xC]
00154 e1a00009 mov r0, r9
00158 e3a07000 mov r7, #0
0015c eb000000 bl XllpOstDelayMicroSeconds
00160 e598300c ldr r3, [r8, #0xC]
00164 e3a02001 mov r2, #1
00168 e3a0e071 mov lr, #0x71
0016c e3833002 orr r3, r3, #2
00170 e28d1018 add r1, sp, #0x18
00174 e1a00004 mov r0, r4
00178 e588300c str r3, [r8, #0xC]
0017c e58d2018 str r2, [sp, #0x18]
00180 e58de01c str lr, [sp, #0x1C]
00184 eb000000 bl XllpGpioSetOutputState1
00188 e5953020 ldr r3, [r5, #0x20]
0018c e3a02ffa mov r2, #0xFA, 30
00190 e3a06000 mov r6, #0
00194 e3530000 cmp r3, #0
00198 e595301c ldr r3, [r5, #0x1C]
0019c 03a04001 moveq r4, #1
001a0 13a04000 movne r4, #0
001a4 e0050293 mul r5, r3, r2
001a8 |$L1393|
001a8 e3a01001 mov r1, #1
001ac e1a00009 mov r0, r9
001b0 eb000000 bl XllpOstDelayMicroSeconds
001b4 e598301c ldr r3, [r8, #0x1C]
001b8 e3130c01 tst r3, #1, 24
001bc e598301c ldr r3, [r8, #0x1C]
001c0 13a06001 movne r6, #1
001c4 e3130c02 tst r3, #2, 24
001c8 13a04001 movne r4, #1
001cc e3550000 cmp r5, #0
001d0 e2455001 sub r5, r5, #1
001d4 0a000003 beq |$L1398|
001d8 e3560000 cmp r6, #0
001dc 0afffff1 beq |$L1393|
001e0 e3540000 cmp r4, #0
001e4 0affffef beq |$L1393|
001e8 |$L1398|
001e8 e3560000 cmp r6, #0
001ec 0a000001 beq |$L1400|
001f0 e3540000 cmp r4, #0
001f4 1a000000 bne |$L1399|
001f8 |$L1400|
001f8 e3a07003 mov r7, #3
001fc |$L1399|
; 158 :
; 159 : return (status);
001fc e1a00007 mov r0, r7
; 160 :
; 161 : } // End XllpAc97Init ()
00200 e28dd054 add sp, sp, #0x54
00204 e8bd43f0 ldmia sp!, {r4 - r9, lr}
00208 e12fff1e bx lr
0020c |$M1417|
ENDP ; |XllpAc97ACodecInit|
EXPORT |XllpAc97ACodecDeInit|
IMPORT |XllpGpioClearAlternateFn|
00000 AREA |.text| { |XllpAc97ACodecDeInit| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$XllpAc97ACodecDeInit|, PDATA, SELECTION=5, ASSOC=|.text| { |XllpAc97ACodecDeInit| } ; comdat associative
|$T1451| DCD |$L1450|
DCD 0x40003602
; Function compile flags: /Ogsy
00000 AREA |.text| { |XllpAc97ACodecDeInit| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |XllpAc97ACodecDeInit| PROC
; 188 : {
00000 |$L1450|
00000 e92d47f0 stmdb sp!, {r4 - r10, lr}
00004 e24dd020 sub sp, sp, #0x20
00008 |$M1448|
00008 e1a08000 mov r8, r0
; 189 : XLLP_ACODEC_ERROR_T status ;
; 190 : volatile XLLP_GPIO_T *pGPIO = (volatile XLLP_GPIO_T *) pAc97ctxt->pGpioReg;
; 191 : volatile XLLP_CLKMGR_T *pCLKMGR = (volatile XLLP_CLKMGR_T *) pAc97ctxt->pClockReg;
; 192 : XLLP_UINT32_T pins[8];
; 193 :
; 194 : status = XllpAc97ACODECShutdownAclink((P_XLLP_AC97ACODEC_T)(pAc97ctxt->pPCMReg), pAc97ctxt->pOSTRegs);
0000c e5987008 ldr r7, [r8, #8]
00010 e5985004 ldr r5, [r8, #4]
00014 e598a010 ldr r10, [r8, #0x10]
00018 e597300c ldr r3, [r7, #0xC]
0001c e5989024 ldr r9, [r8, #0x24]
00020 e3a04000 mov r4, #0
00024 e3833008 orr r3, r3, #8
00028 e587300c str r3, [r7, #0xC]
0002c e3a06f7d mov r6, #0x7D, 30
00030 ea000004 b |$L1447|
00034 |$L1427|
00034 e2566001 subs r6, r6, #1
00038 0a000024 beq |$L1434|
0003c e3a01001 mov r1, #1
00040 e1a00009 mov r0, r9
00044 eb000000 bl XllpOstDelayMicroSeconds
00048 |$L1447|
00048 e597301c ldr r3, [r7, #0x1C]
0004c e3130008 tst r3, #8
00050 0afffff7 beq |$L1427|
; 197 : {
; 198 :
; 199 : // Disable clocking of AC '97 controller device in processor
; 200 : pCLKMGR->cken &= ~XLLP_CLKEN_AC97;
00054 e59a3004 ldr r3, [r10, #4]
; 201 :
; 202 : // Set all pins to default general input configuration.
; 203 : pins[0] = 5;
; 204 :
; 205 : #ifdef USE_AC97SYSCLK
; 206 : #ifndef MSII //for zoar
; 207 : pins[0] = 6;
; 208 : pins[6] = XLLP_GPIO_KP_MKIN4; // use this pin as AC97_SYSCLK
; 209 : #endif
; 210 : #endif
; 211 : pins[1] = XLLP_GPIO_AC97BITCLK;
; 212 : pins[2] = XLLP_GPIO_AC97_SDATA_IN_0;
; 213 : pins[3] = XLLP_GPIO_AC97_SDATA_OUT;
; 214 : pins[4] = XLLP_GPIO_AC97_SYNC;
; 215 : pins[5] = XLLP_GPIO_AC97_RESET_n;
; 216 :
; 217 : if (XLLP_TRUE == pAc97ctxt->bUseSecondaryCodec)
00058 e3a0201c mov r2, #0x1C
0005c e3a0101d mov r1, #0x1D
00060 e3c33004 bic r3, r3, #4
00064 e58a3004 str r3, [r10, #4]
00068 e5983020 ldr r3, [r8, #0x20]
0006c e3a0001e mov r0, #0x1E
00070 e3a07005 mov r7, #5
00074 e3530001 cmp r3, #1
00078 e58d2004 str r2, [sp, #4]
; 218 : {
; 219 : pins[0] ++;
0007c 03a03006 moveq r3, #6
; 220 : pins[pins[0]] = XLLP_GPIO_KP_MKIN5; // use this pin as AC97_SDATA_IN_1
00080 03a02063 moveq r2, #0x63
00084 e3a0e01f mov lr, #0x1F
00088 e3a06071 mov r6, #0x71
0008c e58d1008 str r1, [sp, #8]
00090 e58d000c str r0, [sp, #0xC]
00094 e58d7000 str r7, [sp]
; 221 : }
; 222 :
; 223 : XllpGpioSetDirectionIn((XLLP_GPIO_T *)pGPIO, pins);
00098 e28d1000 add r1, sp, #0
0009c e1a00005 mov r0, r5
000a0 058d3000 streq r3, [sp]
000a4 058d2018 streq r2, [sp, #0x18]
000a8 e58de010 str lr, [sp, #0x10]
000ac e58d6014 str r6, [sp, #0x14]
000b0 eb000000 bl XllpGpioSetDirectionIn
; 224 : XllpGpioClearAlternateFn((XLLP_GPIO_T *)pGPIO, pins);
000b4 e28d1000 add r1, sp, #0
000b8 e1a00005 mov r0, r5
000bc eb000000 bl XllpGpioClearAlternateFn
000c0 |$L1170|
; 225 : }
; 226 :
; 227 : return (status);
000c0 e1a00004 mov r0, r4
; 228 : }
000c4 e28dd020 add sp, sp, #0x20
000c8 e8bd47f0 ldmia sp!, {r4 - r10, lr}
000cc e12fff1e bx lr
000d0 |$L1434|
; 189 : XLLP_ACODEC_ERROR_T status ;
; 190 : volatile XLLP_GPIO_T *pGPIO = (volatile XLLP_GPIO_T *) pAc97ctxt->pGpioReg;
; 191 : volatile XLLP_CLKMGR_T *pCLKMGR = (volatile XLLP_CLKMGR_T *) pAc97ctxt->pClockReg;
; 192 : XLLP_UINT32_T pins[8];
; 193 :
; 194 : status = XllpAc97ACODECShutdownAclink((P_XLLP_AC97ACODEC_T)(pAc97ctxt->pPCMReg), pAc97ctxt->pOSTRegs);
000d0 e3a04003 mov r4, #3
; 195 :
; 196 : if (XLLP_ACODEC_SUCCESS == status)
000d4 eafffff9 b |$L1170|
000d8 |$M1449|
ENDP ; |XllpAc97ACodecDeInit|
EXPORT |XllpAc97ACodecWrite|
00000 AREA |.text| { |XllpAc97ACodecWrite| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$XllpAc97ACodecWrite|, PDATA, SELECTION=5, ASSOC=|.text| { |XllpAc97ACodecWrite| } ; comdat associative
|$T1484| DCD |$L1483|
DCD 0x40003e02
; Function compile flags: /Ogsy
00000 AREA |.text| { |XllpAc97ACodecWrite| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |XllpAc97ACodecWrite| PROC
; 245 : {
00000 |$L1483|
00000 e92d4ff0 stmdb sp!, {r4 - r11, lr}
00004 e24dd004 sub sp, sp, #4
00008 |$M1481|
00008 e1a06002 mov r6, r2
; 246 : XLLP_ACODEC_ERROR_T status = XLLP_ACODEC_SUCCESS;
; 247 : XLLP_BOOL_T gotLink;
; 248 : XLLP_UINT32_T timeRemaining;
; 249 : P_XLLP_VUINT32_T pCodecReg;
; 250 : P_XLLP_AC97ACODEC_T pAc97Reg = (P_XLLP_AC97ACODEC_T)(pDevContext->pPCMReg);
; 251 : P_XLLP_OST_T pOstRegs = pDevContext->pOSTRegs;
; 252 : XLLP_UINT32_T maxRWTimeOutUs = (pDevContext->uMaxReadWriteTimeOutMs) * 1000;
0000c e5903018 ldr r3, [r0, #0x18]
00010 e3a02ffa mov r2, #0xFA, 30
00014 e5904008 ldr r4, [r0, #8]
00018 e590b024 ldr r11, [r0, #0x24]
0001c e0090293 mul r9, r3, r2
00020 e3a05000 mov r5, #0
; 253 : XLLP_AC97_ACODEC_SEL_T codecSel = XLLP_AC97_ACODEC_PRIMARY;
; 254 :
; 255 : if((offset == XLLP_AC97_CR_E_MDM_GPIO_PIN_STAT) && (WM_9712_ID == pDevContext->ACodecId))
00024 e3510054 cmp r1, #0x54
00028 1a00000a bne |$L1463|
0002c e5903000 ldr r3, [r0]
00030 e3530003 cmp r3, #3
; 256 : {
; 257 : // This is a work around for the WM9712 GPIO status issue.
; 258 : // Note that the WM9712 can only be used as a primary
; 259 : // AC97 device.
; 260 :
; 261 : XLLP_UINT16_T offsetdata = data << 1;
00034 01a03086 moveq r3, r6, lsl #1
; 262 :
; 263 : pCodecReg = &(pAc97Reg->CodecRegsPrimaryAud[0]);
; 264 :
; 265 : pCodecReg += offset / XLLP_AC97_CODEC_REGS_PER_WORD;
; 266 :
; 267 : // The data will be sent out on slots 1&2 to register 54h.
; 268 : *pCodecReg = (XLLP_UINT32_T)data;
; 269 :
; 270 : pCodecReg = &(pAc97Reg->CodecRegsPrimaryMdm[0]);
; 271 :
; 272 : pCodecReg += offset / XLLP_AC97_CODEC_REGS_PER_WORD;
; 273 :
; 274 : // The data will be sent out on slot 12.
; 275 : *pCodecReg = (XLLP_UINT32_T)offsetdata;
00038 01a03803 moveq r3, r3, lsl #16
0003c 01a03823 moveq r3, r3, lsr #16
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