📄 xllp_cpdvm.lst
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402 00000000 xlli_BIT_8 EQU 0x00000100
403 00000000 xlli_BIT_9 EQU 0x00000200
404 00000000 xlli_BIT_10 EQU 0x00000400
405 00000000 xlli_BIT_11 EQU 0x00000800
406 00000000 xlli_BIT_12 EQU 0x00001000
407 00000000 xlli_BIT_13 EQU 0x00002000
408 00000000 xlli_BIT_14 EQU 0x00004000
409 00000000 xlli_BIT_15 EQU 0x00008000
410 00000000 xlli_BIT_16 EQU 0x00010000
411 00000000 xlli_BIT_17 EQU 0x00020000
412 00000000 xlli_BIT_18 EQU 0x00040000
413 00000000 xlli_BIT_19 EQU 0x00080000
414 00000000 xlli_BIT_20 EQU 0x00100000
415 00000000 xlli_BIT_21 EQU 0x00200000
416 00000000 xlli_BIT_22 EQU 0x00400000
417 00000000 xlli_BIT_23 EQU 0x00800000
418 00000000 xlli_BIT_24 EQU 0x01000000
419 00000000 xlli_BIT_25 EQU 0x02000000
420 00000000 xlli_BIT_26 EQU 0x04000000
421 00000000 xlli_BIT_27 EQU 0x08000000
422 00000000 xlli_BIT_28 EQU 0x10000000
423 00000000 xlli_BIT_29 EQU 0x20000000
424 00000000 xlli_BIT_30 EQU 0x40000000
425 00000000 xlli_BIT_31 EQU 0x80000000
426 00000000 END
33 00000000 EXPORT XllpXSC1EnterTurbo
34 00000000 EXPORT XllpXSC1ExitTurbo
35 00000000 EXPORT XllpXSC1ReadCLKCFG
36 00000000 EXPORT XllpXSC1WriteCLKCFG
37 00000000 EXPORT XllpXSC1ChangeVoltage
38 00000000 EXPORT XllpXSC1FreqChange
39 00000000 EXPORT XSC1GetCPUId
40 00000000 EXPORT XSC1GetCPSR
41 00000000 EXPORT XSC1GetSPSR
42 00000000 EXPORT XSC1GetSPSRIrq
43 00000000
44 AREA |.text|, CODE, READONLY, ALIGN=5 ; Align =5 required for "ALIGN 32" to work
45 00000000
46 00000000 IRQ_MODE EQU 2_10010
47 00000000 SVC_MODE EQU 2_10011
48 00000000
49 00000000 ;
50 00000000 ; XllpXSC1EnterTurbo - Enters Turbo Mode
51 00000000 ;
52 00000000 ; Uses r0 - contains value for writing to PWRMODE coprocessor register
53 00000000 ;
54 00000000 ; Preserve the Fast Bus Mode, B bit.
55 00000000 ;
56 00000000 XllpXSC1EnterTurbo FUNCTION
57 00000000
58 00000000 ee160e10 mrc p14, 0, r0, c6, c0, 0 ; read c6
59 00000004 e200000d and r0, r0, #0xd ; clear F bit
60 00000008 e3800001 orr r0, r0, #1 ; or in Turbo bit
61 0000000c ee060e10 mcr p14, 0, r0, c6, c0, 0 ; enter Turbo mode
62 00000010 IF Interworking :LOR: Thumbing
63 00000010 e12fff1e bx lr
64 00000014 ELSE
66 00000014 ENDIF
67 00000014
68 00000014 ;
69 00000014 ; XllpXSC1ExitTurbo - Exits Turbo Mode
70 00000014 ;
71 00000014 ; Uses r0 - contains value for writing to PWRMODE coprocessor register
72 00000014 ;
73 00000014 ; Preserve the Fast Bus Mode, B bit.
74 00000014 ;
75 00000014 XllpXSC1ExitTurbo FUNCTION
76 00000014
77 00000014 ee160e10 mrc p14, 0, r0, c6, c0, 0 ; read c6
78 00000018 e200000e and r0, r0, #0xe ; clear Turbo bit to
79 0000001c ee060e10 mcr p14, 0, r0, c6, c0, 0 ; exit Turbo mode
80 00000020 IF Interworking :LOR: Thumbing
81 00000020 e12fff1e bx lr
82 00000024 ELSE
84 00000024 ENDIF
85 00000024
86 00000024 ;
87 00000024 ;XllpXSC1ReadCLKCFG - Reads CCLKCFG register
88 00000024 ;
89 00000024 ; Uses r0 - contains return value -> CCLKCFG register contents
90 00000024 ;
91 00000024 XllpXSC1ReadCLKCFG FUNCTION
92 00000024
93 00000024 ee160e10 mrc p14, 0, r0, c6, c0, 0 ; Read CCLKCFG
94 00000028
95 00000028 IF Interworking :LOR: Thumbing
96 00000028 e12fff1e bx lr
97 0000002c ELSE
99 0000002c ENDIF
100 0000002c
101 0000002c
102 0000002c ;----------------------------------------------------------------------------------------
103 0000002c ; XSC1GetCPUId - Get the CPU ID from CP15 R0 Register
104 0000002c ;
105 0000002c ; This routine reads R0 from CoProcesser 15 to get the CPU ID
106 0000002c ;
107 0000002c ; Uses r0 - return value of CPU ID
108 0000002c ;----------------------------------------------------------------------------------------
109 0000002c ; LEAF_ENTRY XSC1GetCPUId
110 0000002c XSC1GetCPUId FUNCTION
111 0000002c
112 0000002c ee100f10 mrc p15, 0, r0, c0, c0, 0
113 00000030
114 00000030 IF Interworking :LOR: Thumbing
115 00000030 e12fff1e bx lr
116 00000034 ELSE
118 00000034 ENDIF
119 00000034
120 00000034 ;----------------------------------------------------------------------------------------
121 00000034 ; XSC1GetCPSR - Returns the Current Program Status Register
122 00000034 ;
123 00000034 ; Uses r0 returns CPSR
124 00000034 ;----------------------------------------------------------------------------------------
125 00000034 XSC1GetCPSR FUNCTION
126 00000034
127 00000034 e10f0000 mrs r0, CPSR
128 00000038
129 00000038 IF Interworking :LOR: Thumbing
130 00000038 e12fff1e bx lr
131 0000003c ELSE
133 0000003c ENDIF
134 0000003c ;----------------------------------------------------------------------------------------
135 0000003c ; XSC1GetSPSR - Returns the Saved Program Status Register
136 0000003c ;
137 0000003c ; This routine is called by the IRQ interrupt handler when
138 0000003c ; PMU is active and capturing data
139 0000003c ;
140 0000003c ; Uses r0 returns SPSR
141 0000003c ;----------------------------------------------------------------------------------------
142 0000003c XSC1GetSPSR FUNCTION
143 0000003c
144 0000003c e14f0000 mrs r0, SPSR
145 00000040 IF Interworking :LOR: Thumbing
146 00000040 e12fff1e bx lr
147 00000044 ELSE
149 00000044 ENDIF
150 00000044
151 00000044 ;----------------------------------------------------------------------------------------
152 00000044 ; XSC1GetSPSRIrq - Returns the Saved Program Status Register
153 00000044 ;
154 00000044 ; This routine is called by the IRQ interrupt handler when
155 00000044 ; PMU is active and capturing data
156 00000044 ;
157 00000044 ; Uses r0 returns SPSR
158 00000044 ;----------------------------------------------------------------------------------------
159 00000044 XSC1GetSPSRIrq FUNCTION
160 00000044
161 00000044 e10f1000 mrs r1, cpsr
162 00000048
163 00000048 ; msr cpsr_c, #IRQ_MODE:OR:0x80:OR:0x40 ; switch to IRQ Mode w/IRQs&FIQs disabled
164 00000048
165 00000048 e3a000d2 mov r0, #IRQ_MODE:OR:0x80:OR:0x40 ; switch to IRQ Mode w/IRQs&FIQs disabled
166 0000004c e121f000 msr cpsr_c, r0
167 00000050
168 00000050 e14f0000 mrs r0, SPSR
169 00000054 e121f001 msr cpsr_c, r1 ; switch back to orginal mode
170 00000058 IF Interworking :LOR: Thumbing
171 00000058 e12fff1e bx lr
172 0000005c ELSE
174 0000005c ENDIF
175 0000005c
176 0000005c
177 0000005c ;
178 0000005c ; XllpXSC1ChangeVoltage - change voltage
179 0000005c ;
180 0000005c ; Uses r0 - contains value for writing to PWRMODE coprocessor register
181 0000005c ;
182 0000005c ;
183 0000005c ;
184 0000005c XllpXSC1ChangeVoltage FUNCTION
185 0000005c
186 0000005c ee170e10 mrc p14, 0, r0, c7, c0, 0 ; read c7
187 00000060 e3800008 orr r0, r0, #0x8 ; Voltage change sequence begins
188 00000064 ee070e10 mcr p14, 0, r0, c7, c0, 0 ; exit Turbo mode
189 00000068 IF Interworking :LOR: Thumbing
190 00000068 e12fff1e bx lr
191 0000006c ELSE
193 0000006c ENDIF
194 0000006c
195 0000006c XllpXSC1FreqChange FUNCTION
196 0000006c ;
197 0000006c ; XSC1FreqChange - Do a Frequency Change
198 0000006c ;
199 0000006c ; Uses
200 0000006c ; r0 - arg1 - mask to set the CLKCFG register
201 0000006c ;
202 0000006c e3800002 orr r0, r0, #2 ; set F=1
203 00000070 ee060e10 mcr p14, 0, r0, c6, c0, 0 ; do Freq Change
204 00000074
205 00000074 FreqRet
206 00000074
207 00000074 IF Interworking :LOR: Thumbing
208 00000074 e12fff1e bx lr
209 00000078 ELSE
211 00000078 ENDIF
212 00000078
213 00000078 ENDFUNC
214 00000078
215 00000078 XllpXSC1WriteCLKCFG FUNCTION
216 00000078 ;
217 00000078 ; XSC1FreqChange - Do a Frequency Change
218 00000078 ;
219 00000078 ; Uses
220 00000078 ; r0 - arg1 - mask to set the CLKCFG register
221 00000078 ;
222 00000078 ee060e10 mcr p14, 0, r0, c6, c0, 0 ; do Freq Change
223 0000007c IF Interworking :LOR: Thumbing
224 0000007c e12fff1e bx lr
225 00000080 ELSE
227 00000080 ENDIF
228 00000080
229 00000080 ENDFUNC
230 00000080
231 00000080 END
Assembly terminated, errors: 0, warnings: 0
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