📄 xllp_usbohci_platform.cod
字号:
00008 e1a04000 mov r4, r0
; 117 :
; 118 : unsigned long ulPinArrayParms[3];
; 119 : unsigned long ulAlternateFunctionParms[3];
; 120 :
; 121 : if (Port == XLLP_USBH_PORT_1)
0000c e3510001 cmp r1, #1
00010 1a000013 bne |$L903|
; 122 : {
; 123 : // Configure GPIO 89 as follows:
; 124 : // Level: Low (enable)
; 125 : // Direction: Output
; 126 : // Alternate function: 2
; 127 :
; 128 : // level, direction & alternate function gpio apis all use the same pin array
; 129 : ulPinArrayParms[0] = 1;
; 130 : ulPinArrayParms[1] = 89;
; 131 :
; 132 : XllpGpioSetOutput0( pUsbhHandle->pGPIORegs, ulPinArrayParms );
00014 e5940004 ldr r0, [r4, #4]
00018 e3a03001 mov r3, #1
0001c e3a02059 mov r2, #0x59
00020 e28d1000 add r1, sp, #0
00024 e58d3000 str r3, [sp]
00028 e58d2004 str r2, [sp, #4]
0002c eb000000 bl XllpGpioSetOutput0
; 133 :
; 134 : XllpGpioSetDirectionOut( pUsbhHandle->pGPIORegs, ulPinArrayParms );
00030 e5940004 ldr r0, [r4, #4]
00034 e28d1000 add r1, sp, #0
00038 eb000000 bl XllpGpioSetDirectionOut
; 135 :
; 136 : ulAlternateFunctionParms[0] = 1;
; 137 : ulAlternateFunctionParms[1] = XLLP_GPIO_ALT_FN_2;
; 138 : XllpGpioSetAlternateFn( pUsbhHandle->pGPIORegs, ulPinArrayParms, ulAlternateFunctionParms );
0003c e5940004 ldr r0, [r4, #4]
00040 e3a0e002 mov lr, #2
00044 e3a03001 mov r3, #1
00048 e28d2010 add r2, sp, #0x10
0004c e28d1000 add r1, sp, #0
00050 e58de014 str lr, [sp, #0x14]
00054 e58d3010 str r3, [sp, #0x10]
00058 eb000000 bl XllpGpioSetAlternateFn
; 139 : return (XLLP_USBH_SUCCESS);
0005c e3a00000 mov r0, #0
00060 ea000000 b |$L904|
00064 |$L903|
; 140 : }
; 141 : else
; 142 : return (XLLP_USBH_FEATURE_NOT_SUPPORTED);
00064 e3a00006 mov r0, #6
00068 |$L904|
; 143 : }
00068 e28dd01c add sp, sp, #0x1C
0006c e8bd4010 ldmia sp!, {r4, lr}
00070 e12fff1e bx lr
00074 |$M995|
ENDP ; |XllpUsbhPortEnablePower|
EXPORT |XllpUsbhInitPlatformSpecificConfig|
00000 AREA |.text| { |XllpUsbhInitPlatformSpecificConfig| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$XllpUsbhInitPlatformSpecificConfig|, PDATA, SELECTION=5, ASSOC=|.text| { |XllpUsbhInitPlatformSpecificConfig| } ; comdat associative
|$T1007| DCD |$L1006|
DCD 0x40001301
; Function compile flags: /Ogsy
00000 AREA |.text| { |XllpUsbhInitPlatformSpecificConfig| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |XllpUsbhInitPlatformSpecificConfig| PROC
; 174 : {
00000 |$L1006|
00000 e52de004 str lr, [sp, #-4]!
00004 |$M1004|
00004 e1a02000 mov r2, r0
; 175 : //These settings are specific for Mainstone platform
; 176 : //And, will change from platform to platform
; 177 : // Setting power sense polarity to active low
; 178 : pUsbhHandle->pPlatformUSBHConfig->usbhpwr_level = XLLP_LO;
00008 e5923014 ldr r3, [r2, #0x14]
0000c e3a01000 mov r1, #0
; 179 : // Setting power control polarity to active low
; 180 : pUsbhHandle->pPlatformUSBHConfig->usbhpen_level = XLLP_LO;
; 181 : // Enable power to the USB single-ended receivers and the USB port 1 power supply
; 182 : pUsbhHandle->pPlatformUSBHConfig->port1_ssep_enable = XLLP_TRUE;
00010 e3a0e001 mov lr, #1
00014 e5831000 str r1, [r3]
00018 e5923014 ldr r3, [r2, #0x14]
; 183 : // Enable power to the USB single-ended receivers and the USB port 2 power supply
; 184 : pUsbhHandle->pPlatformUSBHConfig->port2_ssep_enable = XLLP_TRUE;
; 185 : // Disable power to the USB single-ended receivers and the USB port 3 power supply
; 186 : pUsbhHandle->pPlatformUSBHConfig->port3_ssep_enable = XLLP_FALSE;
; 187 : // Allow above settings to take effect
; 188 : pUsbhHandle->pPlatformUSBHConfig->global_sse_enable = XLLP_TRUE;
; 189 :
; 190 : return (XLLP_USBH_SUCCESS);
0001c e3a00000 mov r0, #0
00020 e5831004 str r1, [r3, #4]
00024 e5923014 ldr r3, [r2, #0x14]
00028 e583e008 str lr, [r3, #8]
0002c e5923014 ldr r3, [r2, #0x14]
00030 e583e00c str lr, [r3, #0xC]
00034 e5923014 ldr r3, [r2, #0x14]
00038 e5831010 str r1, [r3, #0x10]
0003c e5923014 ldr r3, [r2, #0x14]
00040 e583e014 str lr, [r3, #0x14]
; 191 : }
00044 e49de004 ldr lr, [sp], #4
00048 e12fff1e bx lr
0004c |$M1005|
ENDP ; |XllpUsbhInitPlatformSpecificConfig|
EXPORT |XllpUsbhConfigPlatformSpecificUSBHReset|
IMPORT |XllpUsbhPortEnableSleepStandbyEnable|
; File f:\wm520\platform\intel_dbpxa27x\public\csp\arm\intel\pxa27x\xllp\inc\xllp_usbohci.h
00000 AREA |.text| { |XllpUsbhConfigPlatformSpecificUSBHReset| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$XllpUsbhConfigPlatformSpecificUSBHReset|, PDATA, SELECTION=5, ASSOC=|.text| { |XllpUsbhConfigPlatformSpecificUSBHReset| } ; comdat associative
|$T1039| DCD |$L1038|
DCD 0x40002d01
; Function compile flags: /Ogsy
; File f:\wm520\platform\intel_dbpxa27x\public\csp\arm\intel\pxa27x\xllp\source\xllp_usbohci_platform.c
00000 AREA |.text| { |XllpUsbhConfigPlatformSpecificUSBHReset| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |XllpUsbhConfigPlatformSpecificUSBHReset| PROC
; 221 : {
00000 |$L1038|
00000 e92d40f0 stmdb sp!, {r4 - r7, lr}
00004 |$M1036|
00004 e1a04000 mov r4, r0
; 222 : XLLP_LEVEL_T usbhpwr_level = pUsbhHandle->pPlatformUSBHConfig->usbhpwr_level;
; 223 : XLLP_LEVEL_T usbhpen_level = pUsbhHandle->pPlatformUSBHConfig->usbhpen_level;
00008 e5942014 ldr r2, [r4, #0x14]
; 224 : XLLP_BOOL_T port1_ssep_enable = pUsbhHandle->pPlatformUSBHConfig->port1_ssep_enable;
; 225 : XLLP_BOOL_T port2_ssep_enable = pUsbhHandle->pPlatformUSBHConfig->port2_ssep_enable;
; 226 : XLLP_BOOL_T port3_ssep_enable = pUsbhHandle->pPlatformUSBHConfig->port3_ssep_enable;
; 227 : XLLP_BOOL_T global_sse_enable = pUsbhHandle->pPlatformUSBHConfig->global_sse_enable;
; 228 :
; 229 : //Configure platform specific power sense polarity
; 230 : XllpUsbhConfigurePowerSensePolarity(pUsbhHandle, usbhpwr_level) ;
0000c e5923000 ldr r3, [r2]
00010 e5921004 ldr r1, [r2, #4]
00014 e5920008 ldr r0, [r2, #8]
00018 e592500c ldr r5, [r2, #0xC]
0001c e5926010 ldr r6, [r2, #0x10]
00020 e5927014 ldr r7, [r2, #0x14]
00024 e5942000 ldr r2, [r4]
00028 e3530001 cmp r3, #1
0002c e5923064 ldr r3, [r2, #0x64]
00030 03c33040 biceq r3, r3, #0x40
00034 13833040 orrne r3, r3, #0x40
; 231 :
; 232 : //Configure platform specific power control polarity
; 233 : XllpUsbhConfigurePowerControlPolarity(pUsbhHandle, usbhpen_level) ;
00038 e3510001 cmp r1, #1
0003c e5823064 str r3, [r2, #0x64]
00040 05942000 ldreq r2, [r4]
00044 05923064 ldreq r3, [r2, #0x64]
00048 03c33080 biceq r3, r3, #0x80
0004c 05823064 streq r3, [r2, #0x64]
00050 15941000 ldrne r1, [r4]
; 234 :
; 235 : //Enable/disable power to the USB single-ended receivers and the USB port 1 power supply
; 236 : XllpUsbhPortEnableSleepStandbyEnable(pUsbhHandle, XLLP_USBH_PORT_1, port1_ssep_enable);
00054 e1a02000 mov r2, r0
00058 e1a00004 mov r0, r4
0005c 15913064 ldrne r3, [r1, #0x64]
00060 13833080 orrne r3, r3, #0x80
00064 15813064 strne r3, [r1, #0x64]
00068 e3a01001 mov r1, #1
0006c eb000000 bl XllpUsbhPortEnableSleepStandbyEnable
; 237 :
; 238 : //Enable/disable power to the USB single-ended receivers and the USB port 2 power supply
; 239 : XllpUsbhPortEnableSleepStandbyEnable(pUsbhHandle, XLLP_USBH_PORT_2, port2_ssep_enable);
00070 e1a02005 mov r2, r5
00074 e3a01002 mov r1, #2
00078 e1a00004 mov r0, r4
0007c eb000000 bl XllpUsbhPortEnableSleepStandbyEnable
; 240 :
; 241 : //Enable/disable power to the USB single-ended receivers and the USB port 3 power supply
; 242 : XllpUsbhPortEnableSleepStandbyEnable(pUsbhHandle, XLLP_USBH_PORT_3, port3_ssep_enable);
00080 e1a02006 mov r2, r6
00084 e3a01003 mov r1, #3
00088 e1a00004 mov r0, r4
0008c eb000000 bl XllpUsbhPortEnableSleepStandbyEnable
; 243 :
; 244 : //For all downstream ports, enable/disable power to the USB single-ended receivers and
; 245 : //the USB ports power supply
; 246 : XllpUsbhConfigureGlobalSleepStandbyEnable(pUsbhHandle, global_sse_enable);
00090 e5942000 ldr r2, [r4]
00094 e3570001 cmp r7, #1
; 247 :
; 248 : return (XLLP_USBH_SUCCESS);
00098 e3a00000 mov r0, #0
0009c e5923064 ldr r3, [r2, #0x64]
000a0 03c33020 biceq r3, r3, #0x20
000a4 13833020 orrne r3, r3, #0x20
000a8 e5823064 str r3, [r2, #0x64]
; 249 : }
000ac e8bd40f0 ldmia sp!, {r4 - r7, lr}
000b0 e12fff1e bx lr
000b4 |$M1037|
ENDP ; |XllpUsbhConfigPlatformSpecificUSBHReset|
END
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