📄 xllp_lcd.cod
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ENDP ; |XllpLCDSetDisplayPage|
EXPORT |LCDInitController|
EXPORT |??_C@_1EC@LGHIFOED@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAE?$AAn?$AAt?$AAe?$AAr?$AA?5?$AAL?$AAC?$AAD?$AAI?$AAn?$AAi?$AAt?$AAC?$AAo@| [ DATA ] ; `string'
EXPORT |??_C@_1CE@OBJENNOH@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAT?$AAC?$AAO?$AA2?$AA8?$AAS?$AAT?$AAE?$AAA?$AA1?$AA?$AN?$AA?6?$AA?$AA@| [ DATA ] ; `string'
00000 AREA |.text| { |LCDInitController| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$LCDInitController|, PDATA, SELECTION=5, ASSOC=|.text| { |LCDInitController| } ; comdat associative
|$T35540| DCD |$L35539|
DCD 0x4000f201
00000 AREA |.rdata| { |??_C@_1CE@OBJENNOH@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAT?$AAC?$AAO?$AA2?$AA8?$AAS?$AAT?$AAE?$AAA?$AA1?$AA?$AN?$AA?6?$AA?$AA@| }, DATA, READONLY, SELECTION=2 ; comdat any
|??_C@_1CE@OBJENNOH@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAT?$AAC?$AAO?$AA2?$AA8?$AAS?$AAT?$AAE?$AAA?$AA1?$AA?$AN?$AA?6?$AA?$AA@| DCB "Z"
DCB 0x0, "G", 0x0, "B", 0x0, ":", 0x0, " ", 0x0, "T", 0x0, "C"
DCB 0x0, "O", 0x0, "2", 0x0, "8", 0x0, "S", 0x0, "T", 0x0, "E"
DCB 0x0, "A", 0x0, "1", 0x0, 0xd, 0x0, 0xa, 0x0, 0x0, 0x0 ; `string'
00000 AREA |.rdata| { |??_C@_1EC@LGHIFOED@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAE?$AAn?$AAt?$AAe?$AAr?$AA?5?$AAL?$AAC?$AAD?$AAI?$AAn?$AAi?$AAt?$AAC?$AAo@| }, DATA, READONLY, SELECTION=2 ; comdat any
|??_C@_1EC@LGHIFOED@?$AAZ?$AAG?$AAB?$AA?3?$AA?5?$AAE?$AAn?$AAt?$AAe?$AAr?$AA?5?$AAL?$AAC?$AAD?$AAI?$AAn?$AAi?$AAt?$AAC?$AAo@| DCB "Z"
DCB 0x0, "G", 0x0, "B", 0x0, ":", 0x0, " ", 0x0, "E", 0x0, "n"
DCB 0x0, "t", 0x0, "e", 0x0, "r", 0x0, " ", 0x0, "L", 0x0, "C"
DCB 0x0, "D", 0x0, "I", 0x0, "n", 0x0, "i", 0x0, "t", 0x0, "C"
DCB 0x0, "o", 0x0, "n", 0x0, "t", 0x0, "r", 0x0, "o", 0x0, "l"
DCB 0x0, "l", 0x0, "e", 0x0, "r", 0x0, "(", 0x0, ")", 0x0, 0xd
DCB 0x0, 0xa, 0x0, 0x0, 0x0 ; `string'
; Function compile flags: /Ogsy
00000 AREA |.text| { |LCDInitController| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |LCDInitController| PROC
; 194 : {
00000 |$L35539|
00000 e92d43f0 stmdb sp!, {r4 - r9, lr}
00004 |$M35537|
00004 e1a04000 mov r4, r0
; 195 : int i = 0;
; 196 : int BPP = 0;
; 197 : int PCD = 0;
; 198 : unsigned int CCCR_L = 0;
; 199 : //volatile unsigned int APB_Temp;
; 200 : volatile LCDRegs *p_LCDRegs;
; 201 : volatile XLLP_CLKMGR_T *p_CLKRegs;
; 202 : volatile XLLP_SSPREGS_T *p_SSPRegs;
; 203 : volatile XLLP_GPIO_T *p_GPIORegs;
; 204 : XLLP_OST_T *p_OSTRegs;
; 205 :
; 206 : int LCLK = 0;
; 207 :
; 208 : RETAILMSG(ZGB_MSG, (TEXT("ZGB: Enter LCDInitController()\r\n")));
00008 e59f03b4 ldr r0, [pc, #0x3B4]
0000c e3a07000 mov r7, #0
00010 eb000000 bl NKDbgPrintfW
; 209 :
; 210 : p_LCDRegs = (LCDRegs *) pXllpLCD->LCDC;
00014 e5945008 ldr r5, [r4, #8]
; 211 : p_CLKRegs = (XLLP_CLKMGR_T *) pXllpLCD->CLKMan;
00018 e594e004 ldr lr, [r4, #4]
; 212 : p_GPIORegs = (XLLP_GPIO_T *) pXllpLCD->GPIO;
; 213 : p_OSTRegs = (XLLP_OST_T *) pXllpLCD->OST;
; 214 : p_SSPRegs = (XLLP_SSPREGS_T *) pXllpLCD->SSP;
; 215 :
; 216 : p_LCDRegs->LCCR0 = 0;
0001c e3a09000 mov r9, #0
; 217 : p_LCDRegs->LCCR1 = 0;
00020 e1a08005 mov r8, r5
; 218 : p_LCDRegs->LCCR2 = 0;
; 219 : p_LCDRegs->LCCR3 = 0;
; 220 : p_LCDRegs->LCCR4 = 0;
; 221 : p_LCDRegs->LCCR5 = (LCD_SOFM1|LCD_SOFM2|LCD_SOFM3|LCD_SOFM4|LCD_SOFM5|LCD_SOFM6|
; 222 : LCD_EOFM1|//LCD_EOFM2|
; 223 : LCD_EOFM3|LCD_EOFM4|LCD_EOFM5|LCD_EOFM6|
; 224 : LCD_BSM1 |LCD_BSM2 |LCD_BSM3 |LCD_BSM4 |LCD_BSM5 |LCD_BSM6 |
; 225 : LCD_IUM1 |LCD_IUM2 |LCD_IUM3 |LCD_IUM4 |LCD_IUM5 |LCD_IUM6 );
00024 e59f3394 ldr r3, [pc, #0x394]
00028 e5859000 str r9, [r5]
0002c e5a89004 str r9, [r8, #4]!
00030 e5859008 str r9, [r5, #8]
00034 e585900c str r9, [r5, #0xC]
00038 e5859010 str r9, [r5, #0x10]
0003c e5853014 str r3, [r5, #0x14]
; 226 :
; 227 :
; 228 : // Determine the frame buffer size for the DMA transfer length.
; 229 : // Scale the size based on the bpp of the frame buffer to determine
; 230 : // an actual size in bytes
; 231 : pXllpLCD->FrameBufferSize = pXllpLCD->FrameBufferWidth * pXllpLCD->FrameBufferHeight;
00040 e594201c ldr r2, [r4, #0x1C]
00044 e5943018 ldr r3, [r4, #0x18]
; 232 : switch (pXllpLCD->BPP)
00048 e5941028 ldr r1, [r4, #0x28]
0004c e0030392 mul r3, r2, r3
00050 e3510020 cmp r1, #0x20
00054 e5843020 str r3, [r4, #0x20]
00058 8a000019 bhi |$L35524|
0005c 0a000022 beq |$L35236|
00060 e3510001 cmp r1, #1
00064 0a000012 beq |$L35231|
00068 e3510002 cmp r1, #2
0006c 0a00000e beq |$L35232|
00070 e3510004 cmp r1, #4
00074 0a000008 beq |$L35233|
00078 e3510008 cmp r1, #8
0007c 0a000003 beq |$L35234|
00080 e3510010 cmp r1, #0x10
00084 1a00001a bne |$L35228|
; 249 : case BPP_16:
; 250 : pXllpLCD->FrameBufferSize <<= 1;
00088 e1a03083 mov r3, r3, lsl #1
; 251 : break;
0008c ea000017 b |$L35532|
00090 |$L35234|
; 245 : break;
; 246 : case BPP_8:
; 247 : pXllpLCD->PaletteSize = 512;
00090 e3a03c02 mov r3, #2, 24
00094 e5843024 str r3, [r4, #0x24]
; 248 : break;
00098 ea000015 b |$L35228|
0009c |$L35233|
; 242 : case BPP_4:
; 243 : pXllpLCD->FrameBufferSize >>= 1;
; 244 : pXllpLCD->PaletteSize = 32;
0009c e3a02020 mov r2, #0x20
000a0 e5842024 str r2, [r4, #0x24]
000a4 e1a030a3 mov r3, r3, lsr #1
000a8 ea000010 b |$L35532|
000ac |$L35232|
; 238 : case BPP_2:
; 239 : pXllpLCD->FrameBufferSize >>= 2;
000ac e1a03123 mov r3, r3, lsr #2
; 240 : pXllpLCD->PaletteSize = 8;
; 241 : break;
000b0 ea000000 b |$L35533|
000b4 |$L35231|
; 233 : {
; 234 : case BPP_1:
; 235 : pXllpLCD->FrameBufferSize >>= 3;
000b4 e1a031a3 mov r3, r3, lsr #3
000b8 |$L35533|
; 236 : pXllpLCD->PaletteSize = 8;
000b8 e3a02008 mov r2, #8
000bc e5842024 str r2, [r4, #0x24]
; 237 : break;
000c0 ea00000a b |$L35532|
000c4 |$L35524|
; 232 : switch (pXllpLCD->BPP)
000c4 e3510040 cmp r1, #0x40
000c8 0a000007 beq |$L35236|
000cc e3510080 cmp r1, #0x80
000d0 0a000005 beq |$L35236|
000d4 e3510c01 cmp r1, #1, 24
000d8 0a000003 beq |$L35236|
000dc e3510c02 cmp r1, #2, 24
000e0 0a000001 beq |$L35236|
000e4 e3510b01 cmp r1, #1, 22
; 259 : break;
; 260 : default:
; 261 : break;
000e8 1a000001 bne |$L35228|
000ec |$L35236|
; 252 : case BPP_18: /* Fall through */
; 253 : case BPP_18_PACKED:
; 254 : case BPP_19:
; 255 : case BPP_19_PACKED:
; 256 : case BPP_24:
; 257 : case BPP_25:
; 258 : pXllpLCD->FrameBufferSize <<= 2;
000ec e1a03103 mov r3, r3, lsl #2
000f0 |$L35532|
000f0 e5843020 str r3, [r4, #0x20]
000f4 |$L35228|
; 262 : }
; 263 :
; 264 : // Enable the LCD and SRAM clocks
; 265 : //XllpLock(XLLP_RESOURCE_CKEN);
; 266 : p_CLKRegs->cken = (p_CLKRegs->cken & XLLP_CLKEN_MASK) | CLK_LCD | CLK_SRAM;
000f4 e59e2004 ldr r2, [lr, #4]
000f8 e59f32bc ldr r3, [pc, #0x2BC]
; 267 : //XllpUnlock(XLLP_RESOURCE_CKEN);
; 268 :
; 269 : // Configure the general purpose frame descriptors
; 270 : // Set the physical address of the frame descriptor
; 271 : pXllpLCD->frameDescriptorCh0fd1->FDADR = LCD_FDADR(pXllpLCD->_DMA_CHANNEL_0_FRAME_DESCRIPTOR_BASE_PHYSICAL);
; 272 :
; 273 : // Set the physical address of the frame buffer
; 274 : pXllpLCD->frameDescriptorCh0fd1->FSADR = LCD_FSADR(pXllpLCD->_FRAME_BUFFER_BASE_PHYSICAL + pXllpLCD->CurrentPage*pXllpLCD->FrameBufferSize);
000fc e0023003 and r3, r2, r3
00100 e3833811 orr r3, r3, #0x11, 16
00104 e58e3004 str r3, [lr, #4]
00108 e594304c ldr r3, [r4, #0x4C]
0010c e5942068 ldr r2, [r4, #0x68]
; 275 :
; 276 : // Clear the frame ID
; 277 : pXllpLCD->frameDescriptorCh0fd1->FIDR = LCD_FIDR(0);
; 278 :
; 279 : // Set the DMA transfer length to the size of the frame buffer
; 280 : pXllpLCD->frameDescriptorCh0fd1->LDCMD = LCD_Len(pXllpLCD->FrameBufferSize) | LCD_EOFInt;// | LCD_SOFInt;
; 281 :
; 282 : // Store the physical address of this frame descriptor in the frame descriptor
; 283 : pXllpLCD->frameDescriptorCh0fd1->PHYSADDR = pXllpLCD->frameDescriptorCh0fd1->FDADR;
; 284 :
; 285 : // frameDescriptorCh0fd2 is used only if a palette load is performed.
; 286 : // Set the physical address of the frame descriptor
; 287 : pXllpLCD->frameDescriptorCh0fd2->FDADR = LCD_FDADR(pXllpLCD->_DMA_CHANNEL_0_ALT_FRAME_DESCRIPTOR_BASE_PHYSICAL);
00110 e3c3300f bic r3, r3, #0xF
00114 e5823000 str r3, [r2]
00118 e5941030 ldr r1, [r4, #0x30]
0011c e5942020 ldr r2, [r4, #0x20]
00120 e5943034 ldr r3, [r4, #0x34]
00124 e5940068 ldr r0, [r4, #0x68]
; 288 :
; 289 : // Set the physical address of the frame buffer
; 290 : pXllpLCD->frameDescriptorCh0fd2->FSADR = LCD_FSADR(pXllpLCD->_FRAME_BUFFER_BASE_PHYSICAL + pXllpLCD->CurrentPage*pXllpLCD->FrameBufferSize);
00128 e0233291 mla r3, r1, r2, r3
0012c e3c33007 bic r3, r3, #7
; 291 :
; 292 : // Clear the frame ID
; 293 : pXllpLCD->frameDescriptorCh0fd2->FIDR = LCD_FIDR(0);
; 294 :
; 295 : // Set the DMA transfer length to the size of the frame buffer
; 296 : pXllpLCD->frameDescriptorCh0fd2->LDCMD = LCD_Len(pXllpLCD->FrameBufferSize);
; 297 :
; 298 : // Store the physical address of this frame descriptor in the frame descriptor
; 299 : pXllpLCD->frameDescriptorCh0fd2->PHYSADDR = pXllpLCD->frameDescriptorCh0fd2->FDADR;
; 300 :
; 301 : // FBR0 is cleared and is not used.
; 302 : p_LCDRegs->FBR0 = 0;
00130 e5803004 str r3, [r0, #4]
00134 e5943068 ldr r3, [r4, #0x68]
; 303 :
; 304 : // Load the contents of FDADR0 with the physical address of this frame descriptor
; 305 : p_LCDRegs->FDADR0 = LCD_FDADR(pXllpLCD->frameDescriptorCh0fd1->FDADR);
00138 e5839008 str r9, [r3, #8]
0013c e5943020 ldr r3, [r4, #0x20]
00140 e5942068 ldr r2, [r4, #0x68]
00144 e3833602 orr r3, r3, #2, 12
00148 e582300c str r3, [r2, #0xC]
0014c e5942068 ldr r2, [r4, #0x68]
00150 e5923000 ldr r3, [r2]
00154 e5823010 str r3, [r2, #0x10]
00158 e5943054 ldr r3, [r4, #0x54]
0015c e594206c ldr r2, [r4, #0x6C]
00160 e3c3300f bic r3, r3, #0xF
00164 e5823000 str r3, [r2]
00168 e5941030 ldr r1, [r4, #0x30]
0016c e5942020 ldr r2, [r4, #0x20]
00170 e5943034 ldr r3, [r4, #0x34]
00174 e594006c ldr r0, [r4, #0x6C]
00178 e0233291 mla r3, r1, r2, r3
0017c e3c33007 bic r3, r3, #7
00180 e5803004 str r3, [r0, #4]
00184 e594306c ldr r3, [r4, #0x6C]
00188 e5839008 str r9, [r3, #8]
0018c e594206c ldr r2, [r4, #0x6C]
00190 e5943020 ldr r3, [r4, #0x20]
00194 e582300c str r3, [r2, #0xC]
00198 e594206c ldr r2, [r4, #0x6C]
0019c e5923000 ldr r3, [r2]
001a0 e5823010 str r3, [r2, #0x10]
001a4 e5859020 str r9, [r5, #0x20]
001a8 e5943068 ldr r3, [r4, #0x68]
001ac e5933000 ldr r3, [r3]
001b0 e3c3300f bic r3, r3, #0xF
001b4 e5853200 str r3, [r5, #0x200]
; 306 :
; 307 : // Determine the LCLK frequency programmed into the CCCR.
; 308 : // This value will be used to calculate a Pixel Clock Divisor (PCD)
; 309 : // for a given display type.
; 310 : CCCR_L = (p_CLKRegs->cccr & 0x0000001F);
001b8 e59e3000 ldr r3, [lr]
001bc e203201f and r2, r3, #0x1F
; 311 :
; 312 :
; 313 : if (CCCR_L < 8) // L = [2 - 7]
001c0 e3520008 cmp r2, #8
; 314 : LCLK = (13 * CCCR_L) * 100;
001c4 33a03e51 movcc r3, #0x51, 28
001c8 33833004 orrcc r3, r3, #4
001cc 30070392 mulcc r7, r2, r3
001d0 3a00000a bcc |$L35242|
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