dl_uart.h

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#define  UART_CSR_1152K_BPS 0xcc           /* 38,400 bps                    */
#define  UART_CSR_2304K_BPS 0xee         /* 115,200 bps                   */
#define  UART_CSR_4608K_BPS 0xff          /* 115,200 bps                   */
                /* This is really only 57.6 kbps with the clock workaround */


#define  UART_MVR_V        M_REG_VAL
#define  UART_NVR_V        N_REG_VAL
#define  UART_DVR_V        D_REG_VAL
#define  UART_MNDR_V       MND_REG_VAL      

#define MSMU_MVR_DEFAULT     0xC0   /* Default value of M register         */
#define MSMU_NVR_DEFAULT     0xB2   /* Default value of N register         */
#define MSMU_DVR_DEFAULT     0x7D   /* Default value of D register         */
#define MSMU_MNDR_DEFAULT    0x1C   /* Default value of M/N/D LSB register */

#define MSM_CLK_CTL7_WH__UART_CLK_SEL_TCXO4    0
#define MSM_CLK_CTL7_WH__UART_CLK_SEL_TCXO     0x2000

#define UART_CLK_SEL_M                      MSM_CLK_CTL7_WH__UART_CLK_SEL_MASK
#define UART_CLK_SEL_REG                    MSM_CLK_CTL7_WH
#define UART_CLK_SEL_TCXO4                  MSM_CLK_CTL7_WH__UART_CLK_SEL_TCXO4
#define UART_CLK_SEL_TCXO                   MSM_CLK_CTL7_WH__UART_CLK_SEL_TCXO

typedef enum
{
 UART_576K_BPS=0,
 UART_1152K_BPS=1,
 UART_2304K_BPS=2,
 UART_4608K_BPS=4
} baud_rate_type;


/* macro for writes to MSM registers */
#define MSMU_OUT( reg, val) (void)outp( reg, val)
/* macro for 16 bit writes to MSM registers */
#define MSMUW_OUT( reg, val) (void)outpw( reg, val) 


#define MSMU_RXWAT_OUT( val )    MSMU_OUT( UART_RXWAT, val )
#define MSMU_TXWAT_OUT( val )    MSMU_OUT( UART_TXWAT, val )
#define MSMU_MR1_OUT( val )      MSMU_OUT( UART_MR1, val )

/* Setting for TX Watermark.  Set this to 30 rather than 31, because
   of the known bug in the UART. */
#define  UART_TXWAT_VAL    30

#define  SLEEP_CTL_WB                  0x03000600
#define  SLEEP_CTL_WB__WATCH_DOG_MASK  0x1
#define  KICK_WATCHDOG()   /*lint -e717 do ... while(0) */  \
                           do {                             \
   (void)outp(SLEEP_CTL_WB, SLEEP_CTL_WB__WATCH_DOG_MASK);  \
   (void)outp(SLEEP_CTL_WB, 0);                             \
                              }                             \
                           while (0)                        \
                           /*lint +e717 */

/*---------------------------------------------------------------------------

                    MACRO BOOTHW_KICK_WATCHDOG

This macro resets the watchdog timer circuit.
---------------------------------------------------------------------------*/
#define BOOTHW_KICK_WATCHDOG() \
      outp(SLEEP_CTL_WB, SLEEP_CTL_WB__WATCH_DOG_MASK); \
      outp(SLEEP_CTL_WB, 0)    
      

/*===========================================================================

FUNCTION MCLK_REINITIAL

DESCRIPTION
  This function reinitials the system waiting state for flash and ram.


RETURN VALUE
  None.

SIDE EFFECTS
  None.

===========================================================================*/

extern void mclk_reinit(void);

/*===========================================================================

FUNCTION dload_uart_init

DESCRIPTION
  This function initializes the MSM 2.0 UART to 115,200 bps, 8N1, with
  no interrupts enabled but both receiver and transmitter running.

  Actually, at the moment this function implements the clock/2
  workaround for a clocking bug, so it gets 19,200 bps.

DEPENDENCIES
  If the transmit FIFO is not empty, the UART must be initialized enough
  for it to eventually empty itself, or else this routine will wait
  forever.

RETURN VALUE
  None.

SIDE EFFECTS
  The watchdog is reset.

===========================================================================*/

extern void dload_uart_init(word baud_rate);

/*===========================================================================

FUNCTION uart_drain

DESCRIPTION
  This function waits for the last character in the UART's transmit
  FIFO to be transmitted.  This allows the caller to be sure that all
  characters are transmitted.

DEPENDENCIES
  If the transmit FIFO is not empty, the UART must be initialized enough
  for it to eventually empty itself, or else this routine will wait
  forever.

RETURN VALUE
  None.

SIDE EFFECTS
  The watchdog is reset.

===========================================================================*/

extern void uart_drain(void);

/*===========================================================================

FUNCTION uart_receive_byte

DESCRIPTION
  This function receives a single byte from the UART by polling.

DEPENDENCIES
  The UART must be initialized and enabled, or else this routine will
  wait forever.

RETURN VALUE
  If a character is received without error, returns the value of the
  character received.  If an error occurs, returns UART_RX_ERR.

SIDE EFFECTS
  The watchdog is reset.

===========================================================================*/

extern int uart_receive_byte(void);

/*===========================================================================

FUNCTION uart_transmit_byte

DESCRIPTION
  This function transmits a single byte through the UART.

DEPENDENCIES
  The UART transmitter must be initialized and enabled, or this routine
  will wait forever.

RETURN VALUE
  None.

SIDE EFFECTS
  The watchdog may be reset.

===========================================================================*/

extern void uart_transmit_byte (  byte  chr);


#endif