📄 bootsys.s
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;
; S Y S T E M B O O T S E R V I C E S
;
; GENERAL DESCRIPTION
;
; EXTERNALIZED FUNCTIONS
;
; INITIALIZATION AND SEQUENCING REQUIREMENTS
;
; Copyright (c) 1998,1999 by QUALCOMM, Incorporated. All Rights Reserved.
; Copyright (c) 2000,2001 by QUALCOMM, Incorporated. All Rights Reserved.
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;
; EDIT HISTORY FOR FILE
; This section contains comments describing changes made to the module.
; Notice that changes are listed in reverse chronological order.
;
;$PVCSPath: L:/src/asw/MSM6050/vcs/bootsys.s_v 1.5 12 Mar 2002 19:34:30 dlee $
;$Header: //depot/asic/msm6025/drivers/boot/bootsys.s#1 $ $DateTime: 2003/07/02 11:21:46 $ $Author: jackl $
;
;when who what, where, why
;-------- --- ----------------------------------------------------------
;11/15/02 dlb Added comment concerning mis-aligned access not generating
; data abort.
;11/06/02 dlb Do not write to bitmapped LCD on boot error since lcd code
; may not be valid.
;06/03/02 dlb Added FEATURE_BOOT_DATA_ABORT_DEBUG (aka Enhanced Abort)
;03/11/02 kar Enter system mode to set up system
;02/22/02 dlb Placed nop between forced user-mode stmib and following access
; to banked register to remove warning.
;11/30/01 dsb Removed call to boot_mem_ctrl_init.
;08/02/01 dsb Added __use_no_semihosting_swi, which produces a linker
; error if any code is linked into the build which uses
; the semihosted SWI call. This will prevent spurious
; SWIs. Error_Fatal now takes a string as a parameter
; and sends it to the LCD, then enters the downloader.
;05/02/01 dsb Replaced references to MODEL_NUMBER with CUST_MOB_MODEL.
;04/13/01 bkm Added IMPORT of RAM_IRQ_VECTOR & RAM_FIQ_VECTOR
;03/06/01 bkm Added FEATURE_IRAM
;08/24/00 jcw added call to boot_hw_tlmm_init
;08/06/99 jc Added MSM3300 support.
;08/06/99 mk Added MSM3100 support.
;04/28/99 ms/sk Added function to clear sl register.
; Initialized sl properly in boot_error_handler, dload_entry
; and boot_powerdown_entry.
;04/08/99 sk Used _cf with SPSR for ARM 2.5.
;03/25/99 ms Added re-entrancy check in boot_abort_handler.
;03/24/99 ms Fixed the exception vector table with bl instead of
; b for calling boot_default_isr. The link register is used
; for getting to the correct message, so it should be set.
; Defined a new message for re-entrant data abort.
;03/22/99 ms Defined and exported symbol _main.
;03/17/99 ms Incorporated changes for Virtual Boot Block.
;02/19/99 ms Now running in Supervisor mode.
; 'blx' renamed to 'blatox' for ARM SDT 2.5 compatibility.
;01/18/99 ms Incorporated the macros save_exception_frame_ex and
; restore_exception_frame_ex from armasm.h directly into
; boot_abot_handler.
;11/23/98 hcg updated to build standalone bootblock. Added boot_delay.
;11/05/98 mdd Reduced time for boot_ram_test by changing algorithm.
;11/03/98 mdd Checked into SS archive -- no changes. Version numbers
; restart, however.
;11/02/98 jct Removed unneeded reference to bsp
;10/28/98 jkl Changed Supervisor mode to System mode
;09/20/98 hcg Put boot_entry_table back in.
;09/14/98 hcg Ported lite RAM test from 186 builds
;09/12/98 aj Fixed boot_block_ver to spaces
;08/08/98 hcg Exported boot functions for vectoring interrupts
; through RAM.
;07/29/98 hcg Updated to allow stand-alone boot block compilation
;07/26/98 hcg Revised for coding standard, removed unused code
;06/01/98 st Created
;
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;============================================================================
;
; MODULE INCLUDE FILES
;
;============================================================================
#include "bootsys.h"
;#include "armasm.h"
;#include "comdef.h"
;#include "msm6000reg.h"
;============================================================================
;
; MODULE IMPORTS
;
;============================================================================
; Import functions referenced in the boot sequence.
IMPORT boot_hw_powerdown
IMPORT boot_mem_ctrl_init
IMPORT boot_hw_ctrl_init
IMPORT boot_hw_tlmm_init
IMPORT boot_ram_init
IMPORT boot_rom_test
IMPORT boot_downloader
; Import the locations of the system stacks so the stack pointers can
; be initialized.
IMPORT sys_stack
IMPORT svc_stack
IMPORT abort_stack
IMPORT undef_stack
; Import the linker generated symbols that correspond to the base
; addresses and sizes of the boot code data areas in both ROM and RAM.
IMPORT |Load$$BB_RAM$$Base|
IMPORT |Image$$BB_RAM$$Base|
IMPORT |Image$$BB_RAM$$Length|
IMPORT |Image$$BB_RAM$$ZI$$Base|
IMPORT |Image$$BB_RAM$$ZI$$Length|
;============================================================================
;
; MODULE EXPORTS
;
;============================================================================
; Export the renamed linker symbols for use by the other boot modules.
EXPORT Load__BB_RAM__Base
EXPORT Image__BB_RAM__Base
EXPORT Image__BB_RAM__Length
EXPORT Image__BB_RAM__ZI__Base
EXPORT Image__BB_RAM__ZI__Length
EXPORT boot_block_ver
EXPORT boot_powerdown_entry
EXPORT boot_mob_model
EXPORT chk_security_code_ptr
EXPORT stamp_mob_model
EXPORT stamp_md5_hash
;============================================================================
; PROCESSOR INTERRUPT VECTORS
;
; ARM processor interrupt vectors are located beginning at address 00000000H
; which is the reset entry point.
;
; All interrupts except for reset are vectored to the application exception
; handlers. The address of the FIQ interrupt handler is stored in the FIQ
; mode r8 register which allows the FIQ handler to be assigned at runtime
; and reached with a single branch instruction.
;============================================================================
AREA BOOTSYS_IVT, CODE, READONLY
CODE32 ; 32 bit ARM instruction set.
__main
_main
ENTRY ; Entry point for boot image.
b boot_reset_handler ; ARM reset
b boot_error_handler ; ARM undefined instruction interrupt
b boot_error_handler ; ARM software interrupt
b boot_error_handler ; ARM prefetch abort interrupt
b boot_error_handler ; ARM data abort interrupt
b boot_error_handler ; Reserved by ARM Ltd.
b boot_error_handler ; ARM IRQ interrupt
b boot_error_handler ; ARM FIQ interrupt
;============================================================================
; BOOT BLOCK INFORMATIONAL SEGMENT
;
;============================================================================
; This is used by PST to locate this informational block
boot_info_symbol
DCB "QCOM"
;============================================================================
; The family number for this phone
; This number MUST be defined.
;============================================================================
boot_mob_model
DCW CUST_MOB_MODEL
;============================================================================
; Customer Mobile Model Number is held here.
;
; This variable is only a placeholder for a number which the customer can
; use to differentiate various models in the same family of phones.
;
; Important :
; Exactly one DCW must appear in the final code at this location.
; Otherwise, the next symbol, boot_block_ver, will move up in the memory
; map and lead to problems.
;============================================================================
boot_cust_mob_model
DCW CUST_MOB_MODEL
; This tells us what version of the informational block we have got
boot_block_ver
; This is the current version number
DCW 1
; This is the minimum version number for backwards compatability
DCW 1
;=========================================================================
; APPLICATION BOOT CHECK SEGMENT
;
; This segment reserves 32 bytes of space for the check values written in
; after the build has completed. They are initialized to 0xFF so values
; can be written directly into the flash part, like the security code.
;
; This area must be located at the top of application ROM space.
;=========================================================================
stamp_mob_model
DCW CUST_MOB_MODEL ; Space for the mobile model number
stamp_md5_hash
DCW &FFFF
DCD &FFFFFFFF ; and the MD5 hash value which is used
DCD &FFFFFFFF ; as a checksum across the boot image.
DCD &FFFFFFFF
DCW &FFFF
reserved
DCW &FFFF
DCD &FFFFFFFF
chk_security_code_ptr ; Space for the 64 bit security code.
; The label is exported so the security
DCD &FFFFFFFF
DCD &FFFFFFFF ; code can be used for access control
; of the serial link.
AREA BOOTSYS_BOOT_CODE, CODE
CODE32 ; 32 bit ARM instruction set
;============================================================================
;
; BOOT RESET HANDLER
;
; DESCRIPTION
;
; The boot sequence consists of the following steps:
;
; * Initialize the stack pointer to be used by 'C'
; * Latch the hardware power supply contacts if required
; * Initialize the MSM memory and peripheral controller
; * Test the target RAM hardware
; * Verify the target application ROM image
; * Transfer control to the target application if possible, otherwise
; enter the boot kernel.
;
; FORMAL ARGUMENTS
; None
;
; DEPENDENCIES
; None
;
; RETURN VALUE
; None
;
; SIDE EFFECTS
; No RAM is used until the target RAM has been tested.
;
; While performing the boot sequence operations, it is necessary to reset
; the watchdog timer periodically in order to avoid a processor reset.
;
;============================================================================
boot_reset_handler
; Initialize target specific hardware as required (e.g. latch power
; before PWR button is released).
ldr r4, =boot_mem_ctrl_init
blatox r4
ldr r4, =boot_hw_ctrl_init
blatox r4
ldr r4, =boot_hw_tlmm_init
blatox r4
; Verify proper functionality of the target RAM hardware. In the event
; of a failure, the RAM test function will return a non-zero value
; causing execution to transfer to the boot error handler which will
; display an error message on the LCD and then power down.
ldr r4, =boot_ram_test
blatox r4 ; returns error message on failure,
cmp r0, #0 ; or 0x0 if test passed.
bne boot_error_handler
; Set up the system stacks for the ARM processor Supervisor Mode,
; Abort Mode and Undefined Instruction Mode. The FIQ and IRQ
; interrupts are exported to the application which will set up
; the stacks for the corresponding processor modes as part of the
; application initialization.
msr CPSR_c, #PSR_Abort:OR:PSR_Fiq_Mask:OR:PSR_Irq_Mask
ldr r13, =abort_stack+Abort_Stack_Size
msr CPSR_c, #PSR_Undef:OR:PSR_Fiq_Mask:OR:PSR_Irq_Mask
ldr r13,=undef_stack+Undef_Stack_Size
;; Enter System mode and set up the System
msr CPSR_c, #PSR_System:OR:PSR_Fiq_Mask:OR:PSR_Irq_Mask
ldr r13, =sys_stack+Sys_Stack_Size
msr CPSR_c, #PSR_Supervisor:OR:PSR_Irq_Mask:OR:PSR_Fiq_Mask
ldr r13, =svc_stack+SVC_Stack_Size
; Zero out the entire target RAM to satisfy the 'C' language
; requirement that all uninitialized variables be set to zero, and
; then copy the boot image initialized data to target RAM.
ldr r4, =boot_ram_init
blatox r4
; Verify that the target ROM contains a valid application image. In
; the event of a failure, the ROM test function will return a non-zero
; value causing execution to transfer to the boot error handler.
ldr r4, =boot_rom_test
blatox r4 ; Returns pointer to error message,
cmp r0, #0 ; or 0h if test passed.
bne boot_error_handler
; If the system boot sequence is successful, transfer control to the
; application reset handler and never return to this point since the
; target application will re-initialize all memory prior to beginning
; execution. The application may transfer control back to the boot
; code via the boot export table.
; Enter downloader
ldr r4, =dload_entry
blatox r4 ; Does not return
;============================================================================
; BOOT ERROR HANDLER
;
; DESCRIPTION
; The boot error handler will is entered if either an error occurs during
; the system boot sequence. An LCD error message is displayed, followed
; by a jump into the download sequence. Note that pointers to error messages
; will have already been placed in r0, and is sent as a parameter to the
; LCD message driver.
;============================================================================
boot_error_handler
b boot_error_handler
;----------------------------------------------------------------------------
; DLOAD ENTRY
;
; DESCRIPTION
; The boot kernel is entered if an error condition has occurred, or
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