tt.core.s

Spim软件的一些源码。其中有Xspim的

# SPIM S20 MIPS simulator.
# A torture test for the SPIM simulator.
# Core tests for instructions that do not differ on big and little endian systems.
#
# Copyright (C) 1990-2004 James Larus, [e-mail].
# ALL RIGHTS RESERVED.
#
# SPIM is distributed under the following conditions:
#
# You may make copies of SPIM for your own use and modify those copies.
#
# All copies of SPIM must retain my name and copyright notice.
#
# You may not sell SPIM or distributed SPIM in conjunction with a commerical
# product or service without the expressed written consent of James Larus.
#
# THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE.
#

# $Header: $


	.data
saved_ret_pc:	.word 0		# Holds PC to return from main
m3:	.asciiz "The next few lines should contain exception error messages\n"
m4:	.asciiz "Done with exceptions\n\n"
	.text
	.globl main
main:
	sw $31 saved_ret_pc

#
# The first thing to do is to test the exceptions:
#
	li $v0 4	# syscall 4 (print_str)
	la $a0 m3
	syscall

# Exception 1 (INT) -- Not implemented yet
# Exception 4 (ADEL)
	li $t0 0x400000
	lw $3 1($t0)
# Exception 5 (ADES)
	sw $3 1($t0)
# Exception 6 (IBUS) -- Can't test and continue
# Exception 7 (DBUS)
	lw $3 10000000($t0)
# Exception 8 (SYSCALL) -- Not implemented
# Exception 9 (BKPT)
	break 0
# Exception 10 (RI) -- Not implemented (can't enter bad instructions)
# Exception 12 (overflow)
	li $t0 0x7fffffff
	add $t0 $t0 $t0
	li $v0 4	# syscall 4 (print_str)
	la $a0 m4
	syscall

#
# Try modifying R0
#
	add $0, $0, 1
	bnez $0 fail


#
# Test the timer:
#
	.data
timer_:	.asciiz "Testing timer\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 timer_
	syscall

	mtc0 $0 $9	# Clear count register
timer1_:
	mfc0 $9 $9
	bne $9 10 timer1_# Count up to 10


#
# Test .ASCIIZ
#
	.data
asciiz_:.asciiz "Testing .asciiz\n"
str0:	.asciiz ""
str1:	.asciiz "a"
str2:	.asciiz "bb"
str3:	.asciiz "ccc"
str4:	.asciiz "dddd"
str5:	.asciiz "eeeee"
str06:	.asciiz "", "a", "bb", "ccc", "dddd", "eeeee"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 asciiz_
	syscall

	la $a0 str0
	li $a1 6
	jal ck_strings

	la $a0 str06
	li $a1 6
	jal ck_strings

	j over_strlen


ck_strings:
	move $s0 $a0
	move $s1 $ra
	li $s2 0

l_asciiz1:
	move $a0 $s0
	jal strlen

	bne $v0 $s2 fail

	add $s0 $s0 $v0	# skip string
	add $s0 $s0 1	# skip null byte

	add $s2 1
	blt $s2 $a1 l_asciiz1

	move $ra $s1
	jal $ra


strlen:
	li $v0 0	# num chars
	move $t0 $a0	# str pointer

l_strlen1:
	lb $t1 0($t0)
	add $t0 1
	add $v0 1
	bnez $t1 l_strlen1

	sub $v0 $v0 1	# don't count null byte
	jr $31

over_strlen:

#
# Now, test each instruction
#

	.data
add_:	.asciiz "Testing ADD\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 add_
	syscall

	li $2 1
	li $3 -1

	add $4, $0, $0
	bnez $4 fail
	add $4, $0, $2
	bne $4 1 fail
	add $4, $4, $3
	bnez $4 fail


	.data
addi_:	.asciiz "Testing ADDI\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 addi_
	syscall

	addi $4, $0, 0
	bnez $4 fail
	addi $4, $0, 1
	bne $4 1 fail
	addi $4, $4, -1
	bnez $4 fail


	.data
addiu_:	.asciiz "Testing ADDIU\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 addiu_
	syscall

	addiu $4, $0, 0
	bnez $4 fail
	addiu $4, $0, 1
	bne $4 1 fail
	addiu $4, $4, -1
	bnez $4 fail

	li $2 0x7fffffff
	addiu $2 $2 2	# should not trap
	bne $2 0x80000001 fail


	.data
addu_:	.asciiz "Testing ADDU\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 addu_
	syscall

	li $2 1
	li $3 -1

	addu $4, $0, $0
	bnez $4 fail
	addu $4, $0, $2
	bne $4 1 fail
	addu $4, $4, $3
	bnez $4 fail

	li $2 0x7fffffff
	addu $2 $2 $2		# should not trap
	bne $2 -2 fail


	.data
and_:	.asciiz "Testing AND\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 and_
	syscall

	li $2 1
	li $3 -1

	and $4 $0 $0
	bnez $4 fail
	and $4 $2 $2
	beqz $4 fail
	and $4 $2 $3
	bne $4 1 fail


	.data
andi_:	.asciiz "Testing ANDI\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 andi_
	syscall

	li $2 1
	li $3 -1

	andi $4 $0 0
	bnez $4 fail
	and $4 $2 1
	beqz $4 fail
	and $4 $2 -1
	bne $4 1 fail
	and $4 $3 -1
	bne $4 $3 fail


	.data
beq_:	.asciiz "Testing BEQ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 beq_
	syscall

	li $2 -1
	li $3 1

	beq $0 $0 l1
	j fail
l1:	beq $2 $2 l2
	j fail
l2:	beq $3 $2 fail

	beq $2 $2 far_away	# Check long branch
	j fail
come_back:

	li $2 3
l2_1:	sub $2 $2 1
	bnez $2, l2_1


	.data
bgez_:	.asciiz "Testing BGEZ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bgez_
	syscall

	li $2 -1
	li $3 1

	bgez $0 l3
	j fail
l3:	bgez $3 l4
	j fail
l4:	bgez $2 fail


	.data
bgezal_:.asciiz "Testing BGEZAL\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bgezal_
	syscall

	li $2 -1
	li $3 1

	bgezal $0 l5
	j fail
	bgezal $2 fail
l5:	bgezal $3 l6
l55:	j fail
l6:	la $4 l55
	bne $31 $4 fail


	.data
bgtz_:	.asciiz "Testing BGTZ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bgtz_
	syscall

	li $2 -1
	li $3 1

	bgtz $0 fail
l7:	bgtz $3 l8
	j fail
l8:	bgtz $2 fail


	.data
blez_:	.asciiz "Testing BLEZ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 blez_
	syscall

	li $2 -1
	li $3 1

	blez $0 l9
	j fail
l9:	blez $2 l10
	j fail
l10:	blez $3 fail


	.data
bltz_:	.asciiz "Testing BLTZ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bltz_
	syscall

	li $2 -1
	li $3 1

	bltz $0 fail
l11:	bltz $2 l12
	j fail
l12:	bltz $3 fail


	.data
bltzal_:.asciiz "Testing BLTZAL\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bltzal_
	syscall

	li $2 -1
	li $3 1

	bltzal $0 fail
	bltzal $3 fail
l13:	bltzal $2 l15
l14:	j fail
l15:	la $4 l14
	bne $31 $4 fail


	.data
bne_:	.asciiz "Testing BNE\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 bne_
	syscall

	li $2 -1
	li $3 1

	bne $0 $0 fail
	bne $2 $2 fail
	bne $3 $2 l16
l16:


	.data
break_:	.asciiz "Testing BREAK\nExpect a exception message:\n  "
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 break_
	syscall

	break 3


# COPz is not checked


	.data
ccp_:	.asciiz "Testing move to/from coprocessor control 0/1\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 ccp_
	syscall

	li $2 0x7f7f
	ctc0 $2 $3
	cfc0 $4 $3
	bne $2 $4 fail
	li $2 0x7f7f
	ctc1 $2 $3
	cfc1 $4 $3
	bne $2 $4 fail


	.data
clo_:	.asciiz "Testing CLO\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 clo_
	syscall

	li $2 0
	clo $3 $2
	bne $3 0 fail

	li $2 0xffffffff
	clo $3 $2
	bne $3 32 fail

	li $2 0xf0000000
	clo $3 $2
	bne $3 4 fail


	.data
clz_:	.asciiz "Testing CLZ\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 clz_
	syscall

	li $2 0
	clz $3 $2
	bne $3 32 fail

	li $2 0xffffffff
	clz $3 $2
	bne $3 0 fail

	li $2 0x0fff0000
	clz $3 $2
	bne $3 4 fail


	.data
div_:	.asciiz "Testing DIV\n"
div2_:	.asciiz "Expect exception caused by divide by 0:\n  "
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 div_
	syscall

	li $2 4
	li $3 2
	li $4 -2

	div $5 $2 $3
	bne $5 2 fail
	mfhi $5
	bne $5 0 fail

	div $5 $2 $4
	bne $5 -2 fail
	mfhi $5
	bne $5 0 fail

	li $2 0x80000000
	li $4 0xffffffff
	div $5 $2 $4	# Overflows, but should not cause overflow

	li $2 1
	li $4 0xffffffff
	div $5 $2 $4
	bne $5 -1 fail
	mfhi $5
	bne $5 0 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 div2_
	syscall
	div $5 $2 $0


	.data
divu_:	.asciiz "Testing DIVU\n"
divu2_:	.asciiz "Expect exception caused by divide by 0:\n  "
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 divu_
	syscall

	li $2 4
	li $3 2
	li $4 -2

	divu $5 $2 $3
	bne $5 2 fail
	mfhi $5
	bne $5 0 fail

	divu $0 $2 $3
	mflo $5
	bne $5 2 fail
	mfhi $5
	bne $5 0 fail

	divu $5 $2 $4
	bne $5 0 fail
	mfhi $5
	bne $5 4 fail

	li $2 0x80000000
	li $4 0xffffffff
	divu $5 $2 $4	# Overflows, but should not cause overflow

	li $2 1
	li $4 0xffffffff
	divu $5 $2 $4
	bne $5 0 fail
	mfhi $5
	bne $5 1 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 divu2_
	syscall
	divu $5 $2 $0


	.data
j_:	.asciiz "Testing J\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 j_
	syscall

	j l17
	j fail

	.ktext
	nop		# These instructions aren't executed, but
	j l17a		# cause parser errors since high 4 bits
l17a:			# don't match
	j l17b

	.text
l17b:	nop
	j l17a	# Correctly flagged as error here.

l17:


	.data
jal_:	.asciiz "Testing JAL\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 jal_
	syscall

	jal l18
l19:	j l20
l18:	la $4 l19
	bne $31 $4 fail
	jr $31
l20:


	.data
jalr_:	.asciiz "Testing JALR\n"
jalr2_:	.asciiz "Expect an non-word boundary exception:\n  "
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 jalr_
	syscall

	la $2 l21
	jalr $3, $2
l23:	j l22
l21:	la $4 l23
	bne $3 $4 fail
	jr $3

l22:	la $2 l21a
	jalr $2
l23a:	j l22a
l21a:	la $4 l23a
	bne $31 $4 fail
	jr $31

l22a:	li $v0 4	# syscall 4 (print_str)
	la $a0 jalr2_
	syscall
	la $2 l24
	add $2 $2 2
l24:	jalr $3 $2


	.data
jr_:	.asciiz "Testing JR\n"
jr2_:	.asciiz "Expect an non-word boundary exception:\n  "
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 jr_
	syscall

	la $2 l25
	jr $2
	j fail
l25:	li $v0 4	# syscall 4 (print_str)
	la $a0 jr2_
	syscall
	la $2 l27
	add $2 $2 2
l27:	jr $2


	.data
la_:	.asciiz "Testing LA\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 la_
	syscall

	# Simple cases already tested
	li $4 101
	la $5 10($4)
	bne $5 111 fail


# LB is endian-specific


# LBU is endian-specific


	.data
ld_:	.asciiz "Testing LD\n"
ld2_:	.asciiz "Expect four address error exceptions:\n"
ldd_:	.word 1, -1, 0, 0x8000000
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 ld_
	syscall

	la $2 ldd_
	ld $3 0($2)
	bne $3 1 fail
	bne $4 -1 fail
	ld $3 8($2)
	bne $3 0 fail
	bne $4 0x8000000 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 ld2_
	syscall

	li $t5 0x7fffffff
	ld $3 1000($t5)
	ld $3 1001($t5)


# LDC2 not tested

# LWC2 not tested

	.data
lh_:	.asciiz "Testing LH\n"
lh2_:	.asciiz "Expect two address error exceptions:\n"
lhd_:	.half 1, -1, 0, 0x8000
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 lh_
	syscall

	la $2 lhd_
	lh $3 0($2)
	bne $3 1 fail
	lh $3 2($2)
	bne $3 -1 fail
	lh $3 4($2)
	bne $3 0 fail
	lh $3 6($2)
	bne $3 0xffff8000 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 lh2_
	syscall

	li $t5 0x7fffffff
	lh $3 1000($t5)
	lh $3 1001($t5)

	.data
lhu_:	.asciiz "Testing LHU\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 lhu_
	syscall

	la $2 lhd_
	lhu $3 0($2)
	bne $3 1 fail
	lhu $3 2($2)
	bne $3 0xffff fail
	lhu $3 4($2)
	bne $3 0 fail
	lhu $3 6($2)
	bne $3 0x8000 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 lh2_
	syscall

	li $t5 0x7fffffff
	lhu $3 1000($t5)
	lhu $3 1001($t5)


	.data
ll_:	.asciiz "Testing LL\n"
ll1:	.word 10
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 ll_
	syscall

	ll $2 ll1
	bne $2 10 fail
	add $2 $2 1
	sc $2 ll1
	lw $3 ll1
	bne $2 $3 fail

	.data
lui_:	.asciiz "Testing LUI\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 lui_
	syscall

	lui $2 0
	bne $2 $0 fail
	lui $2 1
	srl $2 $2 16
	addiu $2 $2 -1	# Don't do compare directly since it uses LUI
	bne $2 $0 fail
	lui $2 1
	andi $2 $2 0xffff
	bne $2 $0 fail
	lui $2 0xffff
	srl $2 $2 16
	addiu $2 $2 1
	andi $2 $2 0xffff
	bne $2 $0 fail


	.data
lw_:	.asciiz "Testing LW\n"
lwd_:	.word 1, -1, 0, 0x8000000
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 lw_
	syscall

	la $2 lwd_
	lw $3 0($2)
	bne $3 1 fail
	lw $3 4($2)
	bne $3 -1 fail
	lw $3 8($2)
	bne $3 0 fail
	lw $3 12($2)
	bne $3 0x8000000 fail

	li $2, 0
	lw $3 lwd_($2)
	bne $3 1 fail
	addi $2, $2, 4
	lw $3 lwd_($2)
	bne $3 -1 fail
	addi $2, $2, 4
	lw $3 lwd_($2)
	bne $3 0 fail
	addi $2, $2, 4
	lw $3 lwd_($2)
	bne $3 0x8000000 fail

	la $2 lwd_
	add $2 $2 12
	lw $3 -12($2)
	bne $3 1 fail
	lw $3 -8($2)
	bne $3 -1 fail
	lw $3 -4($2)
	bne $3 0 fail
	lw $3 0($2)
	bne $3 0x8000000 fail

	li $v0 4	# syscall 4 (print_str)
	la $a0 lh2_
	syscall

	li $t5 0x7fffffff
	lw $3 1000($t5)
	lw $3 1001($t5)


# LWL is endian-specific


# LWR is endian-specific


	.data
madd_:	.asciiz "Testing MADD\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 madd_
	syscall

	mthi $0
	mtlo $0

	madd $0 $0
	mfhi $3
	bnez $3 fail
	mflo $3
	bnez $3 fail

	li $4, 1
	madd $4 $4
	mfhi $3
	bnez $3 fail
	mflo $3
	bne $3 1 fail

	li $4, -1
	madd $3 $4
	mfhi $3
	bnez $3 fail
	mflo $3
	bnez $3 fail

	li $4, 0x10000
	madd $4 $4
	mfhi $3
	bne $3 1 fail
	mflo $3
	bne $3 0 fail

	li $4, 0x10000
	madd $4 $4
	mfhi $3
	bne $3 2 fail
	mflo $3
	bne $3 0 fail

	.data
maddu_:	.asciiz "Testing MADDU\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 maddu_
	syscall

	mthi $0
	mtlo $0

	maddu $0 $0
	mfhi $3
	bnez $3 fail
	mflo $3
	bnez $3 fail

	li $4, 1
	maddu $4 $4
	mfhi $3
	bnez $3 fail
	mflo $3
	bne $3 1 fail

	li $4, -1
	maddu $4 $4
	mfhi $3
	bne $3 0xfffffffe fail
	mflo $3
	bne $3 2 fail

	.data
mcp_:	.asciiz "Testing move to/from coprocessor z\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 mcp_
	syscall

	li $2 0x7f7f
	mtc0 $2 $3
	mfc0 $4 $3
	bne $2 $4 fail
	li $2 0x7f7f
	mtc1 $2 $3
	mfc1 $4 $f3
	bne $2 $4 fail
	li $2 0x7f7f
	li $3 0xf7f7
	mtc1.d $2 $4
	mfc1.d $6 $4
	bne $2 $6 fail
	bne $3 $7 fail


	.data
hilo_:	.asciiz "Testing move to/from HI/LO\n"
	.text
	li $v0 4	# syscall 4 (print_str)
	la $a0 hilo_
	syscall