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<html><head><title>饮水思源精华区</title><Content-type: text/html; charset=gb2312><link rel=stylesheet type=text/css href="bbsdl.css"></head><table cellspacing=0 class=title width=90%><th class=title align=left width=20%>饮水思源站</th><th class=title align=center width=60%>文章阅读</th><th class=title align=right width=20%>精华区离线浏览</th></tr></table><hr><table align=center cellspacing=1 class=doc><tr><td>发信人: xozhao (XO), 信区: DSP<br>标 题: 谈谈其他DSP(2) Motorola<br>发信站: 饮水思源站 (Sat Jun 19 12:57:51 1999) , 转信<br>DSP56009 <br><br>应用: suitable for digital audio decompression functions, such as Dolby AC-3; Surround, MPEG1 Layer 2, and Digital Theater Systems (DTS), <br><br>特征:<br><br>Digital Signal Processing Core <br>- 40MIPS; 25 ns instruction cycle at 80 MHz <br>- Two 56-bit accumulators including extension byte <br>- Parallel 24 x 24-bit multiply-accumulate in 1 instruction<br> cycle (2 clock cycles) <br>- Double precision 48 x 48-bit multiply with 96-bit result in 6 instruction cycles <br>- 56-bit addition/subtraction in one instruction cycle <br>- Fractional and integer arithmetic with support for multi-precision arithmetic <br>- Hardware support for block-floating point Fast Fourier Transforms (FFT) <br>- Hardware nested DO loops <br>- Zero-overhead fast interrupts (2 instruction cycles) <br>- PLL-based clocking with a wide range of frequency multiplications (1 to 4096) and power saving clock divider <br>- Four 24-bit internal data buses and three 16-bit internal address buses for simultaneous accesses to one program and two data memories <br><br>Memory<br><br>10240 x 24-bit on-chip Program ROM* <br>4608 x 24-bit on-chip X-data RAM and 3072 x 24-bit on-chip X-data ROM* <br>4352 x 24-bit on-chip Y-data RAM and 1792 x 24-bit on-chip Y-data ROM* <br>512 x 24-bit on-chip Program RAM and 64 x 24-bit bootstrap ROM <br>Up to 2304 x 24-bit from X and Y data RAM can be switched to Program RAM giving a total of 2816 x 24-bits of Program RAM <br>Bootstrap loading from Serial Host Interface or External Memory Interface <br><br><br>Peripheral and Support Circuits<br><br>---- Serial Audio Interface (SAI) includes two receivers and three transmitters, master or slave capability, and implementation of I2S, Sony, and Matshushita audio protocols; <br>---- two sets of SAI interrupt vectors <br>Serial Host Interface (SHI) features single master capability, 10-word receive FIFO, and support for 8-, 16- and 24-bit words <br>---- External Memory Interface (EMI), implemented as a peripheral supporting <br>---- Four dedicated, independent, programmable General Purpose I/O (GPIO) lines <br><br>80-pin plastic Quad Flat Pack surface-mount package; 14 x 14 x 2.45 mm; 0.65 mm lead pitch <br> <br><br> <br>--<br>※ 来源:·饮水思源站 bbs.sjtu.edu.cn·[FROM: www-post@bbs]<br></tr></table><br><caption align=bottom><hr><table align=center cellspacing=1 class=foot><tr><td class=foot><a href="a-2.htm">返回</tr></table><p class=copyr align=center>Copyright © 2001 <a class=copyr href="http://bbs.sjtu.edu.cn">SJTUBBS</a>, All Rights Reserved.<br><br>版权所有<a class=copyr href="telnet://bbs.sjtu.edu.cn">上海交大BBS饮水思源站</a></caption></body></html>
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