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📄 main.s

📁 avr 基于i2c接口的电源管理协议。包括主机发送主机接受从机发送接收。
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	.module main.c
	.area text(rom, con, rel)
	.dbfile D:\myavrproject\icc\twi\main.c
	.dbfunc e watchdog_init _watchdog_init fV
	.even
_watchdog_init::
	.dbline -1
	.dbline 20
; //ICC-AVR application builder : 2007-1-8 15:26:42
; // Target : M8
; // Crystal: 8.0000Mhz
; 
; #include <iom8v.h>
; #include <macros.h>
; #include <stdio.h>
; 
; #include "uart.h"
; #include "function.h"
; #include "port.h"
; #include "twi.h"
; 
; //
; 
; 
; //Watchdog initialize
; // prescale: 2048K
; void watchdog_init(void)
; {
	.dbline 21
;  WDR(); //this prevents a timout on enabling
	wdr
	.dbline 22
;  WDTCR = 0x0f; //WATCHDOG ENABLED - dont forget to issue WDRs
	ldi R24,15
	out 0x21,R24
	.dbline 26
; 
;  //close watch dog
;  //set WDCE and WDE 
;  WDTCR |= (1<<WDCE) | (1<<WDE);
	in R24,0x21
	ori R24,24
	out 0x21,R24
	.dbline 28
;  //close WDT
;  WDTCR = 0x00;
	clr R2
	out 0x21,R2
	.dbline -2
L1:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e init_devices _init_devices fV
	.even
_init_devices::
	.dbline -1
	.dbline 33
; 
; }
; //call this routine to initialize all peripherals
; void init_devices(void)
; {
	.dbline 35
;  //stop errant interrupts until set up
;  CLI(); //disable all interrupts
	cli
	.dbline 36
;  port_init();
	rcall _port_init
	.dbline 37
;  watchdog_init();
	rcall _watchdog_init
	.dbline 38
;  twi_init();
	rcall _twi_init
	.dbline 39
;  uart0_init();
	rcall _uart0_init
	.dbline 42
; 
; 
;  MCUCR = 0x00;
	clr R2
	out 0x35,R2
	.dbline 43
;  GICR  = 0x00;
	out 0x3b,R2
	.dbline 44
;  TIMSK = 0x00; //timer interrupt sources
	out 0x39,R2
	.dbline 45
;  SEI(); //re-enable interrupts
	sei
	.dbline -2
L2:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e main _main fV
	.even
_main::
	sbiw R28,1
	.dbline -1
	.dbline 50
;  //all peripherals are now initialized
; }
; //
; void main(void)
; {
	.dbline 52
;  //initial device
;  init_devices();
	rcall _init_devices
	rjmp L5
L4:
	.dbline 56
;  //insert your functional code here...
; 
;  while(1)
;  {
	.dbline 58
; 
;   strTWI.STATUS=TW_OK;
	ldi R24,1
	sts _strTWI,R24
	.dbline 59
;   putchar(TWI_RW(0x30+TW_WRITE,&ORGDATA[0],8));
	ldi R24,8
	std y+0,R24
	ldi R18,<_ORGDATA
	ldi R19,>_ORGDATA
	ldi R16,48
	rcall _TWI_RW
	rcall _putchar
	.dbline 61
;  // while(strTWI.STATUS==TW_BUSY);//wait 
;   if (strTWI.STATUS==TW_FAIL)
	lds R24,_strTWI
	cpi R24,2
	brne L7
	.dbline 62
;     {
	.dbline 64
;         //operate faile
; 		putchar(0xff);
	ldi R16,255
	rcall _putchar
	.dbline 65
;     }
L7:
	.dbline 66
	ldi R16,16
	rcall _delay_100ms
	.dbline 70
L5:
	.dbline 55
	rjmp L4
X0:
	.dbline -2
L3:
	adiw R28,1
	.dbline 0 ; func end
	ret
	.dbend

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