arbprogram_syn.h

这是一个开放源代码的与WINNT/WIN2K/WIN2003兼容的操作系统

"vp_statement_1\n"
" vp_instruction .emit INSTRUCTION .emit $ .and semicolon;\n"
"vp_statement_2\n"
" vp_namingStatement .emit DECLARATION .and semicolon;\n"
"fp_instruction\n"
" ALUInstruction .emit OP_ALU_INST .or\n"
" TexInstruction .emit OP_TEX_INST;\n"
"vp_instruction\n"
" ARL_instruction .emit OP_ALU_ARL .or\n"
" vp_VECTORop_instruction .emit OP_ALU_VECTOR .or\n"
" vp_SCALARop_instruction .emit OP_ALU_SCALAR .or\n"
" vp_BINSCop_instruction .emit OP_ALU_BINSC .or\n"
" vp_BINop_instruction .emit OP_ALU_BIN .or\n"
" vp_TRIop_instruction .emit OP_ALU_TRI .or\n"
" vp_SWZ_instruction .emit OP_ALU_SWZ;\n"
"ALUInstruction\n"
" fp_VECTORop_instruction .emit OP_ALU_VECTOR .or\n"
" fp_SCALARop_instruction .emit OP_ALU_SCALAR .or\n"
" fp_BINSCop_instruction .emit OP_ALU_BINSC .or\n"
" fp_BINop_instruction .emit OP_ALU_BIN .or\n"
" fp_TRIop_instruction .emit OP_ALU_TRI .or\n"
" fp_SWZ_instruction .emit OP_ALU_SWZ;\n"
"TexInstruction\n"
" SAMPLE_instruction .emit OP_TEX_SAMPLE .or\n"
" KIL_instruction .emit OP_TEX_KIL;\n"
"ARL_instruction\n"
" \"ARL\" .emit OP_ARL .and space_dst .and maskedAddrReg .and comma .and vp_scalarSrcReg;\n"
"fp_VECTORop_instruction\n"
" fp_VECTORop .and space_dst .and fp_maskedDstReg .and comma .and vectorSrcReg;\n"
"vp_VECTORop_instruction\n"
" vp_VECTORop .and space_dst .and vp_maskedDstReg .and comma .and swizzleSrcReg;\n"
"fp_VECTORop\n"
" \"ABS\" .emit OP_ABS .or \"ABS_SAT\" .emit OP_ABS_SAT .or\n"
" \"FLR\" .emit OP_FLR .or \"FLR_SAT\" .emit OP_FLR_SAT .or\n"
" \"FRC\" .emit OP_FRC .or \"FRC_SAT\" .emit OP_FRC_SAT .or\n"
" \"LIT\" .emit OP_LIT .or \"LIT_SAT\" .emit OP_LIT_SAT .or\n"
" \"MOV\" .emit OP_MOV .or \"MOV_SAT\" .emit OP_MOV_SAT;\n"
"vp_VECTORop\n"
" \"ABS\" .emit OP_ABS .or\n"
" \"FLR\" .emit OP_FLR .or\n"
" \"FRC\" .emit OP_FRC .or\n"
" \"LIT\" .emit OP_LIT .or\n"
" \"MOV\" .emit OP_MOV;\n"
"fp_SCALARop_instruction\n"
" fp_SCALARop .and space_dst .and fp_maskedDstReg .and comma .and fp_scalarSrcReg;\n"
"vp_SCALARop_instruction\n"
" vp_SCALARop .and space_dst .and vp_maskedDstReg .and comma .and vp_scalarSrcReg;\n"
"fp_SCALARop\n"
" \"COS\" .emit OP_COS .or \"COS_SAT\" .emit OP_COS_SAT .or\n"
" \"EX2\" .emit OP_EX2 .or \"EX2_SAT\" .emit OP_EX2_SAT .or\n"
" \"LG2\" .emit OP_LG2 .or \"LG2_SAT\" .emit OP_LG2_SAT .or\n"
" \"RCP\" .emit OP_RCP .or \"RCP_SAT\" .emit OP_RCP_SAT .or\n"
" \"RSQ\" .emit OP_RSQ .or \"RSQ_SAT\" .emit OP_RSQ_SAT .or\n"
" \"SIN\" .emit OP_SIN .or \"SIN_SAT\" .emit OP_SIN_SAT .or\n"
" \"SCS\" .emit OP_SCS .or \"SCS_SAT\" .emit OP_SCS_SAT;\n"
"vp_SCALARop\n"
" \"EX2\" .emit OP_EX2 .or\n"
" \"EXP\" .emit OP_EXP .or\n"
" \"LG2\" .emit OP_LG2 .or\n"
" \"LOG\" .emit OP_LOG .or\n"
" \"RCP\" .emit OP_RCP .or\n"
" \"RSQ\" .emit OP_RSQ;\n"
"fp_BINSCop_instruction\n"
" fp_BINSCop .and space_dst .and fp_maskedDstReg .and comma .and fp_scalarSrcReg .and comma .and\n"
" fp_scalarSrcReg;\n"
"vp_BINSCop_instruction\n"
" vp_BINSCop .and space_dst .and vp_maskedDstReg .and comma .and vp_scalarSrcReg .and comma .and\n"
" vp_scalarSrcReg;\n"
"fp_BINSCop\n"
" \"POW\" .emit OP_POW .or \"POW_SAT\" .emit OP_POW_SAT;\n"
"vp_BINSCop\n"
" \"POW\" .emit OP_POW;\n"
"fp_BINop_instruction\n"
" fp_BINop .and space_dst .and fp_maskedDstReg .and comma .and vectorSrcReg .and comma .and\n"
" vectorSrcReg;\n"
"vp_BINop_instruction\n"
" vp_BINop .and space_dst .and vp_maskedDstReg .and comma .and swizzleSrcReg .and comma .and\n"
" swizzleSrcReg;\n"
"fp_BINop\n"
" \"ADD\" .emit OP_ADD .or \"ADD_SAT\" .emit OP_ADD_SAT .or\n"
" \"DP3\" .emit OP_DP3 .or \"DP3_SAT\" .emit OP_DP3_SAT .or\n"
" \"DP4\" .emit OP_DP4 .or \"DP4_SAT\" .emit OP_DP4_SAT .or\n"
" \"DPH\" .emit OP_DPH .or \"DPH_SAT\" .emit OP_DPH_SAT .or\n"
" \"DST\" .emit OP_DST .or \"DST_SAT\" .emit OP_DST_SAT .or\n"
" \"MAX\" .emit OP_MAX .or \"MAX_SAT\" .emit OP_MAX_SAT .or\n"
" \"MIN\" .emit OP_MIN .or \"MIN_SAT\" .emit OP_MIN_SAT .or\n"
" \"MUL\" .emit OP_MUL .or \"MUL_SAT\" .emit OP_MUL_SAT .or\n"
" \"SGE\" .emit OP_SGE .or \"SGE_SAT\" .emit OP_SGE_SAT .or\n"
" \"SLT\" .emit OP_SLT .or \"SLT_SAT\" .emit OP_SLT_SAT .or\n"
" \"SUB\" .emit OP_SUB .or \"SUB_SAT\" .emit OP_SUB_SAT .or\n"
" \"XPD\" .emit OP_XPD .or \"XPD_SAT\" .emit OP_XPD_SAT;\n"
"vp_BINop\n"
" \"ADD\" .emit OP_ADD .or\n"
" \"DP3\" .emit OP_DP3 .or\n"
" \"DP4\" .emit OP_DP4 .or\n"
" \"DPH\" .emit OP_DPH .or\n"
" \"DST\" .emit OP_DST .or\n"
" \"MAX\" .emit OP_MAX .or\n"
" \"MIN\" .emit OP_MIN .or\n"
" \"MUL\" .emit OP_MUL .or\n"
" \"SGE\" .emit OP_SGE .or\n"
" \"SLT\" .emit OP_SLT .or\n"
" \"SUB\" .emit OP_SUB .or\n"
" \"XPD\" .emit OP_XPD;\n"
"fp_TRIop_instruction\n"
" fp_TRIop .and space_dst .and fp_maskedDstReg .and comma .and vectorSrcReg .and comma .and\n"
" vectorSrcReg .and comma .and vectorSrcReg;\n"
"vp_TRIop_instruction\n"
" vp_TRIop .and space_dst .and vp_maskedDstReg .and comma .and swizzleSrcReg .and comma .and\n"
" swizzleSrcReg .and comma .and swizzleSrcReg;\n"
"fp_TRIop\n"
" \"CMP\" .emit OP_CMP .or \"CMP_SAT\" .emit OP_CMP_SAT .or\n"
" \"LRP\" .emit OP_LRP .or \"LRP_SAT\" .emit OP_LRP_SAT .or\n"
" \"MAD\" .emit OP_MAD .or \"MAD_SAT\" .emit OP_MAD_SAT;\n"
"vp_TRIop\n"
" \"MAD\" .emit OP_MAD;\n"
"fp_SWZ_instruction\n"
" SWZop .and space_dst .and fp_maskedDstReg .and comma .and fp_srcReg .and comma .and\n"
" fp_extendedSwizzle .error EXT_SWIZ_COMP_EXPECTED;\n"
"vp_SWZ_instruction\n"
" \"SWZ\" .emit OP_SWZ .and space_dst .and vp_maskedDstReg .and comma .and vp_srcReg .and comma .and\n"
" vp_extendedSwizzle .error EXT_SWIZ_COMP_EXPECTED;\n"
"SWZop\n"
" \"SWZ\" .emit OP_SWZ .or \"SWZ_SAT\" .emit OP_SWZ_SAT;\n"
"SAMPLE_instruction\n"
" SAMPLEop .and space_dst .and fp_maskedDstReg .and comma .and vectorSrcReg .and comma .and\n"
" texImageUnit .and comma .and texTarget .error TEX_TARGET_EXPECTED;\n"
"SAMPLEop\n"
" \"TEX\" .emit OP_TEX .or \"TEX_SAT\" .emit OP_TEX_SAT .or\n"
" \"TXB\" .emit OP_TXB .or \"TXB_SAT\" .emit OP_TXB_SAT .or\n"
" \"TXP\" .emit OP_TXP .or \"TXP_SAT\" .emit OP_TXP_SAT;\n"
"KIL_instruction\n"
" \"KIL\" .emit OP_KIL .and space_src .and vectorSrcReg;\n"
"texImageUnit\n"
" \"texture\" .error TEXTURE_EXPECTED .and optTexImageUnitNum;\n"
"texTarget\n"
" \"1D\" .emit TEXTARGET_1D .or\n"
" \"2D\" .emit TEXTARGET_2D .or\n"
" \"3D\" .emit TEXTARGET_3D .or\n"
" .if (texture_rectangle != 0x00) \"RECT\" .emit TEXTARGET_RECT .or\n"
" \"CUBE\" .emit TEXTARGET_CUBE .or\n"
" .if (ARB_fragment_program_shadow != 0x00) shadowTarget;\n"
"shadowTarget\n"
" \"SHADOW1D\" .emit TEXTARGET_SHADOW1D .or\n"
" \"SHADOW2D\" .emit TEXTARGET_SHADOW2D .or\n"
" .if (texture_rectangle != 0x00) \"SHADOWRECT\" .emit TEXTARGET_SHADOWRECT;\n"
"optTexImageUnitNum\n"
" optTexImageUnitNum_1 .or .true .emit 0x00;\n"
"optTexImageUnitNum_1\n"
" lbracket_ne .and texImageUnitNum .and rbracket;\n"
"texImageUnitNum\n"
" integer;\n"
"fp_scalarSrcReg\n"
" optionalSign .and fp_srcReg .and fp_scalarSuffix;\n"
"vp_scalarSrcReg\n"
" optionalSign .and vp_srcReg .and vp_scalarSuffix;\n"
"swizzleSrcReg\n"
" optionalSign .and vp_srcReg .and swizzleSuffix;\n"
"vectorSrcReg\n"
" optionalSign .and fp_srcReg .and optionalSuffix;\n"
"fp_maskedDstReg\n"
" fp_dstReg .and fp_optionalMask;\n"
"vp_maskedDstReg\n"
" vp_dstReg .and vp_optionalMask;\n"
"maskedAddrReg\n"
" addrReg .error ADDRESS_REGISTER_EXPECTED .and addrWriteMask;\n"
"fp_extendedSwizzle\n"
" rgbaExtendedSwizzle .or xyzwExtendedSwizzle;\n"
"vp_extendedSwizzle\n"
" extSwizComp .and comma .and\n"
" extSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" extSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" extSwizComp .error EXT_SWIZ_COMP_EXPECTED;\n"
"xyzwExtendedSwizzle\n"
" xyzwExtSwizComp .and comma .and\n"
" xyzwExtSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" xyzwExtSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" xyzwExtSwizComp .error EXT_SWIZ_COMP_EXPECTED;\n"
"rgbaExtendedSwizzle\n"
" rgbaExtendedSwizzle_1 .or rgbaExtendedSwizzle_2 .or rgbaExtendedSwizzle_3 .or\n"
" rgbaExtendedSwizzle_4;\n"
"rgbaExtendedSwizzle_1\n"
" rgbaExtSwizComp_digit .and comma .and rgbaExtSwizComp_digit .and comma .and\n"
" rgbaExtSwizComp_digit .and comma .and rgbaExtSwizComp;\n"
"rgbaExtendedSwizzle_2\n"
" rgbaExtSwizComp_digit .and comma .and rgbaExtSwizComp_digit .and comma .and\n"
" rgbaExtSwizComp_alpha .and comma .and rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED;\n"
"rgbaExtendedSwizzle_3\n"
" rgbaExtSwizComp_digit .and comma .and rgbaExtSwizComp_alpha .and comma .and\n"
" rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED;\n"
"rgbaExtendedSwizzle_4\n"
" rgbaExtSwizComp_alpha .and comma .and \n"
"rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED .and comma .and\n"
" rgbaExtSwizComp .error EXT_SWIZ_COMP_EXPECTED;\n"
"xyzwExtSwizComp\n"
" optionalSign .and xyzwExtSwizSel;\n"
"rgbaExtSwizComp\n"
" optionalSign .and rgbaExtSwizSel;\n"
"rgbaExtSwizComp_digit\n"
" optionalSign .and rgbaExtSwizSel_digit;\n"
"rgbaExtSwizComp_alpha\n"
" optionalSign .and rgbaExtSwizSel_alpha;\n"
"extSwizComp\n"
" optionalSign .and extSwizSel;\n"
"xyzwExtSwizSel\n"
" \"0\" .emit COMPONENT_0 .or \"1\" .emit COMPONENT_1 .or xyzwComponent_single;\n"
"rgbaExtSwizSel\n"
" rgbaExtSwizSel_digit .or rgbaExtSwizSel_alpha;\n"
"rgbaExtSwizSel_digit\n"
" \"0\" .emit COMPONENT_0 .or \"1\" .emit COMPONENT_1;\n"
"rgbaExtSwizSel_alpha\n"
" rgbaComponent_single;\n"
"extSwizSel\n"
" \"0\" .emit COMPONENT_0 .or \"1\" .emit COMPONENT_1 .or vp_component_single;\n"
"fp_srcReg\n"
" fp_srcReg_1 .error SOURCE_REGISTER_EXPECTED;\n"
"vp_srcReg\n"
" vp_srcReg_1 .error SOURCE_REGISTER_EXPECTED;\n"
"fp_srcReg_1\n"
" fragmentAttribReg .emit REGISTER_ATTRIB .or\n"
" fp_progParamReg .emit REGISTER_PARAM .or\n"
" fp_temporaryReg .emit REGISTER_ESTABLISHED_NAME;\n"
"vp_srcReg_1\n"
" vertexAttribReg .emit REGISTER_ATTRIB .or\n"
" vp_progParamReg .emit REGISTER_PARAM .or\n"
" vp_temporaryReg .emit REGISTER_ESTABLISHED_NAME;\n"
"fp_dstReg\n"
" fp_dstReg_1 .error DESTINATION_REGISTER_EXPECTED;\n"
"vp_dstReg\n"
" vp_dstReg_1 .error DESTINATION_REGISTER_EXPECTED;\n"
"fp_dstReg_1\n"
" fragmentResultReg .emit REGISTER_RESULT .or\n"
" fp_temporaryReg .emit REGISTER_ESTABLISHED_NAME;\n"
"vp_dstReg_1\n"
" vertexResultReg .emit REGISTER_RESULT .or\n"
" vp_temporaryReg .emit REGISTER_ESTABLISHED_NAME;\n"
"fragmentAttribReg\n"
" fragAttribBinding;\n"
"vertexAttribReg\n"
" vtxAttribBinding;\n"
"fp_temporaryReg\n"
" fp_establishedName_no_error_on_identifier;\n"
"vp_temporaryReg\n"
" vp_establishedName_no_error_on_identifier;\n"
"fp_progParamReg\n"
" fp_paramSingleItemUse .or fp_progParamReg_1 .or fp_progParamSingle;\n"
"vp_progParamReg\n"
" vp_paramSingleItemUse .or vp_progParamReg_1 .or vp_progParamSingle;\n"
"fp_progParamReg_1\n"
" fp_progParamArray .emit PARAM_ARRAY_ELEMENT .and lbracket_ne .and progParamArrayAbs .and\n"
" rbracket;\n"
"vp_progParamReg_1\n"
" vp_progParamArray .emit PARAM_ARRAY_ELEMENT .and lbracket_ne .and progParamArrayMem .and\n"
" rbracket;\n"
"fp_progParamSingle\n"
" .false;\n"
"vp_progParamSingle\n"
" .false;\n"
"fp_progParamArray\n"
" fp_establishedName_no_error_on_identifier;\n"
"vp_progParamArray\n"
" vp_establishedName_no_error_on_identifier;\n"
"progParamArrayMem\n"
" progParamArrayAbs .or progParamArrayRel;\n"
"progParamArrayAbs\n"
" integer_ne .emit ARRAY_INDEX_ABSOLUTE;\n"
"progParamArrayRel\n"
" addrReg .error ADDRESS_REGISTER_OR_INTEGER_EXPECTED .emit ARRAY_INDEX_RELATIVE .and\n"
" addrComponent .and addrRegRelOffset;\n"
"addrRegRelOffset\n"
" addrRegRelOffset_1 .or addrRegRelOffset_2 .or .true .emit 0x00;\n"
"addrRegRelOffset_1\n"
" plus_ne .and addrRegPosOffset;\n"
"addrRegRelOffset_2\n"
" minus_ne .and addrRegNegOffset;\n"
"addrRegPosOffset\n"
" integer_0_63;\n"
"addrRegNegOffset\n"
" integer_0_64;\n"
"fragmentResultReg\n"
" fp_resultBinding;\n"
"vertexResultReg\n"
" vp_resultBinding;\n"
"addrReg\n"
" vp_establishedName_no_error_on_identifier;\n"
"addrComponent\n"
" dot .and \"x\" .error INVALID_ADDRESS_COMPONENT .emit COMPONENT_X .emit COMPONENT_X\n"
" .emit COMPONENT_X .emit COMPONENT_X;\n"
"addrWriteMask\n"
" dot .and \"x\" .error INVALID_ADDRESS_WRITEMASK .emit 0x08;\n"
"fp_scalarSuffix\n"
" dot .and fp_component_single .error INVALID_COMPONENT;\n"
"vp_scalarSuffix\n"
" dot .and vp_component_single .error INVALID_COMPONENT;\n"
"swizzleSuffix\n"
" swizzleSuffix_1 .or\n"
" .true .emit COMPONENT_X .emit COMPONENT_Y .emit COMPONENT_Z .emit COMPONENT_W;\n"
"swizzleSuffix_1\n"
" dot_ne .and swizzleSuffix_2 .error INVALID_SUFFIX;\n"
"swizzleSuffix_2\n"
" swizzleSuffix_3 .or swizzleSuffix_4;\n"
"swizzleSuffix_3\n"
" vp_component_multi .and vp_component_multi .and vp_component_multi .error INVALID_COMPONENT .and\n"
" vp_component_multi .error INVALID_COMPONENT;\n"
"swizzleSuffix_4\n"
" \"x\" .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .or\n"
" \"y\" .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .or\n"
" \"z\" .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .or\n"
" \"w\" .emit COMPONENT_W .emit COMPONENT_W .emit COMPONENT_W .emit COMPONENT_W;\n"
"optionalSuffix\n"
" optionalSuffix_1 .or\n"
" .true .emit COMPONENT_X .emit COMPONENT_Y .emit COMPONENT_Z .emit COMPONENT_W;\n"
"optionalSuffix_1\n"
" dot_ne .and optionalSuffix_2 .error INVALID_SUFFIX;\n"
"optionalSuffix_2\n"
" optionalSuffix_3 .or optionalSuffix_4 .or optionalSuffix_5;\n"
"optionalSuffix_3\n"
" xyzwComponent_multi .and xyzwComponent_multi .and\n"
" xyzwComponent_multi .error INVALID_COMPONENT .and xyzwComponent_multi .error INVALID_COMPONENT;\n"
"optionalSuffix_4\n"
" rgbaComponent_multi .and rgbaComponent_multi .and\n"
" rgbaComponent_multi .error INVALID_COMPONENT .and rgbaComponent_multi .error INVALID_COMPONENT;\n"
"optionalSuffix_5\n"
" \"x\" .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .or\n"
" \"y\" .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .or\n"
" \"z\" .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .or\n"
" \"w\" .emit COMPONENT_W .emit COMPONENT_W .emit COMPONENT_W .emit COMPONENT_W .or\n"
" \"r\" .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .emit COMPONENT_X .or\n"
" \"g\" .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .emit COMPONENT_Y .or\n"
" \"b\" .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .emit COMPONENT_Z .or\n"