📄 dec6713_sdram.c
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/********************************************************************************\
\* DEC6713_SDRAM.c V2.00 *\
\* Copyright 2004 by SEED Electronic Technology LTD. *\
\* All rights reserved. SEED Electronic Technology LTD. *\
\* Restricted rights to use, duplicate or disclose this code are *\
\* granted through contract. *\
\* Designed by: Hongshuai.Li *\
\* Discription: Erase, write and read the whole chip! *\
\* Data: Modified 05.10.2005 *\
\********************************************************************************/
/********************************************************************************\
\* The example writes some data in one space of SDRAM. Then copy these data to
another space of SDRAM. At last read these data into data buffer. You can
observe these data in the related address space, and observe me0ssage in the
watch window for running process of the routine. *\
\********************************************************************************/
#include <csl.h>
#include <csl_irq.h>
#include <csl_cache.h>
#include <csl_emif.h>
#include <DEC6713.h>
#include <stdio.h>
#include <std.h>
#include <csl_edma.h>
#include <csl_edmahal.h>
/********************************************************************************/
/* definitions */
#define MEM_SRC 0x80000000 /* Source address for transfer */
#define MEM_DST 0x00008000 /* Destination address for transfer */
#define MEM_DST_1 0x00010000
#define MEM_SRC_1 0x80030000
#define EL_COUNT 9000 /* Element count for transfer */
//#define FR_COUNT 16
/* prototypes */
void cfg_data(void);
Uint32 *Src_ping=(Uint32 *)MEM_SRC;
Uint32 *Src_pong=(Uint32 *)MEM_SRC_1;
Uint32 *Dst_ping=(Uint32 *)MEM_DST;
Uint32 *Dst_pong=(Uint32 *)MEM_DST_1;
Int32 cfg_edma4(EDMA_Handle *hEdma_ch4);
Int32 cfg_edma5(EDMA_Handle *hEdma_ch5);
void wait4(EDMA_Handle *hEdma_ch4);
void wait5(EDMA_Handle *hEdma_ch5);
Int32 check_data(void);
/************************************cfg_data************************************/
/* Store a data ramp in the source memory space. This data will be transferred */
/* by the EDMA. */
/********************************************************************************/
void
cfg_data()
{
Uint32 *val;
Uint16 i = 0;
val = (Uint32 *)MEM_SRC;
/* Set up transfer data */
for (i = 0; i < EL_COUNT; i++){
*val++ = i;
} /* end for */
} /* end cfg_data */
/********************************************************************************\
\********************************************************************************/
/*************************************cfg_edma***********************************/
/* Program EDMA channels 4 to service an external AFE. The channel will submit */
/* a transfer request to read a frame of data from the external AFE to inter- */
/* nal L2 memory for every EXT_INT4 event received. */
/********************************************************************************/
Int32
cfg_edma4_ping(EDMA_Handle *hEdma_ch4)
{
Uint32 link_address;
EDMA_Config config;
EDMA_Handle hEdma_NULL;
if (!EDMA_allocTableEx(1, &hEdma_NULL)) return(-1);
EDMA_reset(hEdma_NULL);
link_address = EDMA_getTableAddress(hEdma_NULL);
*hEdma_ch4 = EDMA_open(4, EDMA_OPEN_RESET);
/* Configure channel (4) */
config.opt = (Uint32)0x41340003; /* 0x21200001 */
config.src = (Uint32)MEM_SRC; /* 0x80000000 */
config.cnt = (Uint32)0x0000| /* 0x0000 */
0x2328; /* 0x2328 */
config.dst = (Uint32)MEM_DST; /* 0x00003000 */
config.idx = (Uint32)0; /* 0x00000000 */
config.rld = (Uint32)link_address & 0xffff; /* &NULL */
EDMA_config(*hEdma_ch4, &config);
return(0);
} /* end cfg_edma */
Int32
cfg_edma4_pong(EDMA_Handle *hEdma_ch4)
{
Uint32 link_address;
EDMA_Config config;
EDMA_Handle hEdma_NULL;
if (!EDMA_allocTableEx(1, &hEdma_NULL)) return(-1);
EDMA_reset(hEdma_NULL);
link_address = EDMA_getTableAddress(hEdma_NULL);
*hEdma_ch4 = EDMA_open(4, EDMA_OPEN_RESET);
/* Configure channel (4) */
config.opt = (Uint32)0x41340003; /* 0x21200001 */
config.src = (Uint32)MEM_SRC; /* 0x80000000 */
config.cnt = (Uint32)0x0000| /* 0x0000 */
0x2328; /* 0x2328 */
config.dst = (Uint32)MEM_DST_1; /* 0x00003000 */
config.idx = (Uint32)0; /* 0x00000000 */
config.rld = (Uint32)link_address & 0xffff; /* &NULL */
EDMA_config(*hEdma_ch4, &config);
return(0);
} /* end cfg_edma */
/* Program EDMA channels 5 to service an external AFE. The channel will submit */
/* a transfer request to read a frame of data from the internal L2 memory to exter- */
/* nal AFE for every EXT_INT5 event received. */
/********************************************************************************/
Int32
cfg_edma5_ping(EDMA_Handle *hEdma_ch5)
{
Uint32 link_address;
EDMA_Config config;
EDMA_Handle hEdma_NULL;
if (!EDMA_allocTableEx(1, &hEdma_NULL)) return(-1);
EDMA_reset(hEdma_NULL);
link_address = EDMA_getTableAddress(hEdma_NULL);
*hEdma_ch5 = EDMA_open(5, EDMA_OPEN_RESET);
/* Configure channel (5) */
config.opt = (Uint32)0x41350003; /* 0x21200001 */
config.src = (Uint32)MEM_DST; /* 0x00003000 */
config.cnt = (Uint32)0x0000| /* 0x0000 */
0x2328; /* 0x2328 */
config.dst = (Uint32)MEM_SRC_1; /* 0x80003000 */
config.idx = (Uint32)0; /* 0x00000000 */
config.rld = (Uint32)link_address & 0xffff; /* &NULL */
EDMA_config(*hEdma_ch5, &config);
return(0);
} /* end cfg_edma */
Int32
cfg_edma5_pong(EDMA_Handle *hEdma_ch5)
{
Uint32 link_address;
EDMA_Config config;
EDMA_Handle hEdma_NULL;
if (!EDMA_allocTableEx(1, &hEdma_NULL)) return(-1);
EDMA_reset(hEdma_NULL);
link_address = EDMA_getTableAddress(hEdma_NULL);
*hEdma_ch5 = EDMA_open(5, EDMA_OPEN_RESET);
/* Configure channel (5) */
config.opt = (Uint32)0x41350003; /* 0x21200001 */
config.src = (Uint32)MEM_DST_1; /* 0x00003000 */
config.cnt = (Uint32)0x0000| /* 0x0000 */
0x2328; /* 0x2328 */
config.dst = (Uint32)MEM_SRC_1; /* 0x80003000 */
config.idx = (Uint32)0; /* 0x00000000 */
config.rld = (Uint32)link_address & 0xffff; /* &NULL */
EDMA_config(*hEdma_ch5, &config);
return(0);
} /* end cfg_edma */
/**************************************wait**************************************/
/* Wait until the transfer completes, as indicated by bit 12 of the Channel */
/* Interrupt Pending Register (CIPR). */
/********************************************************************************/
void
wait4(EDMA_Handle *hEdma_ch4)
{
//Uint16 i;
EDMA_setChannel(*hEdma_ch4);
while (!(EDMA_getPriQStatus() & EDMA_OPT_PRI_LOW));
while (!((Uint32)EDMA_RGET(CIPR) & (1 << 4))); /*等待通道4EDMA传输结束*/
} /* end wait */
/**************************************wait**************************************/
/* Wait until the transfer completes, as indicated by bit 12 of the Channel */
/* Interrupt Pending Register (CIPR). */
/********************************************************************************/
void
wait5(EDMA_Handle *hEdma_ch5)
{
//Uint16 i;
EDMA_setChannel(*hEdma_ch5);
while (!(EDMA_getPriQStatus() & EDMA_OPT_PRI_LOW));
while (!((Uint32)EDMA_RGET(CIPR) & (1 << 5))); /*等待通道5EDMA传输结束*/
} /* end wait */
main()
{
Uint16 i;
Uint16 j=1;
Int32 error = 1;
EDMA_Handle hEdma_ch4;
EDMA_Handle hEdma_ch5;
Uint16 a=2; /*目标幅度*/
float b=0.5; /*修正系数*/
/* Initialize csl. */
CSL_init();
/* Initialize DSK6713 board. */
DEC6713_init();
/* 给源地址单元赋值*/
cfg_data();
error = cfg_edma4_ping(&hEdma_ch4);
if (!error)
{
EDMA_enableChannel(hEdma_ch4);
wait4(&hEdma_ch4);
EDMA_close(hEdma_ch4);
} /* end if !error */
/* 计算MEM_DST中的值,同时启动EDMA5,将数据存入内部缓存2中 */
while(j)
{
error = cfg_edma4_pong(&hEdma_ch4);
if (!error)
{
EDMA_enableChannel(hEdma_ch4);
EDMA_setChannel(hEdma_ch4); /*启动EDMA4*/
}
for(i=0;i<EL_COUNT;i++)
{
if (4475 < i && i < 4525)
*(Dst_ping + i) = (*(Dst_ping + i) + a) * b;
else
*(Dst_ping+ i) = *(Dst_ping + i) * b;
}
j=j-1;
if((Uint32)EDMA_RGET(CIPR) & (1 << 4))
EDMA_close(hEdma_ch4);
}
}
/********************************************************************************\
\* End of DEC6713_SDRAM.c *\
\********************************************************************************/
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