📄 useful_functions.asm
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;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.36 *
;* Date/Time created: Tue May 31 23:06:44 2005 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C671x *
;* Optimization : Enabled at level 3 *
;* Optimizing for : Speed 1st, size 2nd *
;* Based on options: -o3, -ms1 *
;* Endian : Little *
;* Interrupt Thrshld : Disabled *
;* Memory Model : Large *
;* Calls to RTS : Far *
;* Pipelining : Limited *
;* Speculative Load : Disabled *
;* Memory Aliases : Presume are aliases (pessimistic) *
;* Debug Info : COFF Debug *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
.file "useful_functions.c"
; c:\ti\c6000\cgtools\bin\opt6x.exe -i0 -v6710 -q -O3 -Z1 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI3056_2 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI3056_5 -w F:/black05/DSP/receiverPIC2/Debug
.sect ".text"
.global _square_absolute
.sym _square_absolute,_square_absolute, 32, 2, 0
.func 41
;******************************************************************************
;* FUNCTION NAME: _square_absolute *
;* *
;* Regs Modified : A0,A1,A2,A3,B4,B5,B6 *
;* Regs Used : A0,A1,A2,A3,A4,A6,B3,B4,B5,B6,DP,SP *
;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_square_absolute:
;** --------------------------------------------------------------------------*
.line 2
.sym _x,4, 22, 17, 32
.sym _y,20, 22, 17, 32
.sym _count,6, 4, 17, 32
.sym _x,3, 22, 4, 32
.sym _y,20, 22, 4, 32
.sym _count,6, 4, 4, 32
MV .D1 A4,A3 ; |42|
.line 5
CMPGT .L1 A6,0,A2 ; |45|
[!A2] B .S1 L4 ; |45|
NOP 5
; BRANCH OCCURS ; |45|
;** --------------------------------------------------------------------------*
.line 7
MVC .S2 CSR,B6
AND .S2 -2,B6,B5
MV .D1 A6,A1
|| MVC .S2 B5,CSR ; interrupts off
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 45
;* Loop opening brace source line : 46
;* Loop closing brace source line : 49
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 14
;* Unpartitioned Resource Bound : 2
;* Partitioned Resource Bound(*) : 2
;* Resource Partition:
;* A-side B-side
;* .L units 0 1
;* .S units 1 0
;* .D units 2* 1
;* .M units 1 1
;* .X cross paths 0 1
;* .T address paths 1 2*
;* Long read paths 0 1
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 0 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 1
;* Bound(.L .S .D .LS .LSD) 2* 1
;*
;* Searching for software pipeline schedule at ...
;* ii = 14 Did not find schedule
;* ii = 15 Schedule found with 1 iterations in parallel
;* Done
;*
;* Collapsed epilog stages : 0
;* Collapsed prolog stages : 0
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
L1: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L2: ; PIPED LOOP KERNEL
LDW .D1T2 *+A3(4),B5 ; |47| <0,0> ^
LDW .D1T1 *A3++(8),A0 ; |47| <0,1> ^
NOP 3
MPYSP .M2 B5,B5,B5 ; |47| <0,5> ^
MPYSP .M1 A0,A0,A0 ; |47| <0,6> ^
NOP 1
[ A1] SUB .D1 A1,1,A1 ; |49| <0,8>
[ A1] B .S1 L2 ; |49| <0,9>
ADDSP .L2X B5,A0,B5 ; |47| <0,10> ^
NOP 3
STW .D2T2 B5,*B4++ ; |47| <0,14> ^
;** --------------------------------------------------------------------------*
L3: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVC .S2 B6,CSR ; interrupts on
;** --------------------------------------------------------------------------*
L4:
.line 10
RET .S2 B3 ; |50|
NOP 5
; BRANCH OCCURS ; |50|
.endfunc 50,000000000h,0
.sect ".text"
.global _prod_element_conj
.sym _prod_element_conj,_prod_element_conj, 32, 2, 0
.func 26
;******************************************************************************
;* FUNCTION NAME: _prod_element_conj *
;* *
;* Regs Modified : A0,A3,A4,A5,A6,B0,B4,B5,B6,B7,B8 *
;* Regs Used : A0,A3,A4,A5,A6,B0,B3,B4,B5,B6,B7,B8,DP,SP *
;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_prod_element_conj:
;** --------------------------------------------------------------------------*
.line 2
.sym _x,4, 22, 17, 32
.sym _y,20, 22, 17, 32
.sym _z,6, 22, 17, 32
.sym _count,22, 4, 17, 32
.sym _b,0, 6, 4, 32
.sym _a,0, 6, 4, 32
.sym _count,22, 4, 4, 32
.sym _x,4, 22, 4, 32
.sym _y,20, 22, 4, 32
.sym _z,21, 22, 4, 32
MV .S2X A6,B5 ; |27|
.line 5
CMPLT .L2 B6,2,B0 ; |30|
[ B0] B .S1 L8 ; |30|
[!B0] SUB .D2 B5,8,B5
[!B0] SUB .S2 B4,8,B4
[!B0] SUB .D1 A4,8,A0
NOP 2
; BRANCH OCCURS ; |30|
;** --------------------------------------------------------------------------*
.line 7
MVC .S2 CSR,B8
SHR .S2 B6,1,B0 ; |32|
|| AND .L2 -2,B8,B6
ADD .D2 4,B5,B5
|| MV .S1X B5,A5
|| MVC .S2 B6,CSR ; interrupts off
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 30
;* Loop opening brace source line : 31
;* Loop closing brace source line : 36
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 29
;* Unpartitioned Resource Bound : 4
;* Partitioned Resource Bound(*) : 4
;* Resource Partition:
;* A-side B-side
;* .L units 1 1
;* .S units 0 1
;* .D units 4* 4*
;* .M units 3 1
;* .X cross paths 3 2
;* .T address paths 4* 4*
;* Long read paths 1 1
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 0 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 1
;* Bound(.L .S .D .LS .LSD) 2 3
;*
;* Searching for software pipeline schedule at ...
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