📄 flash_nand_msm.h
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#ifndef __FLASH_NAND_MSM_H__#define __FLASH_NAND_MSM_H__/********************************************************************** * flash_nand_msm.h * * MSM specific interfaces for NAND support. * * This file implements MSM specific macros. Every MSM will have its own version * customized for that particular target. * * Copyright (C) 2005-2006 Qualcomm, Inc. All Rights Reserved. * **********************************************************************//*=========================================================================== EDIT HISTORY FOR MODULE This section contains comments describing changes made to the module. Notice that changes are listed in reverse chronological order. $Header: //depot/asic/msm6260/drivers/flash/MSM_FLASH.01.04/flash_nand_msm.h#2 $ $DateTime: 2006/05/29 10:56:50 $ $Author: dhamimp $when who what, where, why-------- --- ----------------------------------------------------------2006-05-17 dp Made OneNAND CS CFG init for tools alone2006-05-04 dp Adding controller abstraction layer2006-02-28 rt Add feature to enable backward compatible 2K NAND support.2006-02-15 rt Add support for 2K page NAND device.2005-09-26 yug Added some known good default values for cfg registers.2005-07-30 drh Created from MSM6275===========================================================================*/#ifndef FS_UNIT_TEST#include "msm.h"#endif#include "flash_nand.h"#include "flash_nand_samsung.h"#include "flash_nand_toshiba.h"/* Indicate that this MSM supports external partition tables */#define FLASH_NAND_XTRN_PARTI_TBL/* define this, when the values set by the boot chain * or tools, init-msm script doesn't work. */#undef FLASH_IGNORE_PBL_NANDC_CONFIG/**************************************************************** * Defines ***************************************************************//* If EFS_PAGE_SIZE page is defined, use that to set number of bytes in a page. * Use the default value otherwise */#define FLASH_NAND_PAGE_NUM_BYTES_DEFAULT 2048#ifdef EFS_PAGE_SIZE #define FLASH_NAND_PAGE_NUM_BYTES EFS_PAGE_SIZE#else #define FLASH_NAND_PAGE_NUM_BYTES FLASH_NAND_PAGE_NUM_BYTES_DEFAULT#endif/* Spare byte size = (page size / 32) */#define FLASH_NAND_SPARE_NUM_BYTES (FLASH_NAND_PAGE_NUM_BYTES >> 5)#define FLASH_NAND_TOTAL_PAGE_NUM_BYTES (FLASH_NAND_PAGE_NUM_BYTES + \ FLASH_NAND_SPARE_NUM_BYTES) #define FLASH_NAND_GOOD_BLOCK_FLAG_16 0xFFFF#define FLASH_NAND_GOOD_BLOCK_FLAG_8 0xFF#define FLASH_NAND_PAGE_SIZE_512 512 #define FLASH_NAND_PAGE_SIZE_2048 2048/**************************************************************** * MSM specific NAND register access macros ***************************************************************//* Bit definitions for NAND Interrupt Status register */#define FLASH_NAND_INT_OP_DONE 0x0002#define FLASH_NAND_INT_WR_ERR_DONE 0x0001#define FLASH_NAND_INT_CLR_OP_BIT FLASH_NAND_INT_OP_DONE#define FLASH_NAND_INT_CLR_WR_ERR_BIT FLASH_NAND_INT_WR_ERR_DONE#define FLASH_NAND_INT_CLR_BOTH_BITS (FLASH_NAND_INT_WR_ERR_DONE | \ FLASH_NAND_INT_OP_DONE) #define FLASH_NAND_INT_CLR_BOTH HWIO_OUT (NAND_INT_CLR_REG, \ FLASH_NAND_INT_CLR_BOTH_BITS) #define FLASH_NAND_INT_CLR_OP_ONLY HWIO_OUT (NAND_INT_CLR_REG, \ FLASH_NAND_INT_CLR_OP_BIT)#define FLASH_NAND_INT_CLR_WR_ERR_ONLY HWIO_OUT (NAND_INT_CLR_REG, \ FLASH_NAND_INT_CLR_WR_ERR_BIT)/**************************************************************** * N O T E : These values are the same for both the * 8 / 16configurations. These will be changed * once the target team figures out the correct * values. These values seems to be working values * for now. ***************************************************************/#define FLASH_NAND_COMMON_CFG_BASE_16 0x000D#define FLASH_NAND_CFG1_BASE_16 0x028A#define FLASH_NAND_CFG2_BASE_16 0x410C63 #define FLASH_NAND_COMMON_CFG_BASE_8 0x000D#define FLASH_NAND_CFG1_BASE_8 0x020A#define FLASH_NAND_CFG2_BASE_8 0x410C63 #if !defined(BUILD_JNAND) && !defined(BOOT_LOADER) && !defined(BUILD_NANDPRG)#define FLASH_NAND_RESET_FLASH_BAILOUT_TIME 1000#define FLASH_NAND_OPERATION_BAILOUT_TIME 7000#define FLASH_NAND_POLL_TIME 1#else#define FLASH_NAND_RESET_FLASH_BAILOUT_TIME 1000#define FLASH_NAND_OPERATION_BAILOUT_TIME 7000#define FLASH_NAND_POLL_TIME 1#endif/***************************************************************************************//* ONENAND specific defines *//***************************************************************************************//* Configure the OneNAND: Asynch mode, 4 latency cycles, continuous * burst, ECC ON, Ready signal high, Int signal high, Int/Ready * I/O buffers enabled, boot buffer write-protect locked. */#define ONENAND_SYS_CONFIG_1_VALUE \ (4 << MASK_TO_SHFT(ONENAND_SYS_CONFIG_1_BRWL_MASK) | \ 1 << MASK_TO_SHFT(ONENAND_SYS_CONFIG_1_RDY_POL_MASK) | \ 1 << MASK_TO_SHFT(ONENAND_SYS_CONFIG_1_INT_POL_MASK) | \ 1 << MASK_TO_SHFT(ONENAND_SYS_CONFIG_1_IOBE_MASK))/* These defaults are used only by tools - JNAND and HOSTDL */#define ONENAND_DEFAULT_CFG0_VALUE 0x02100506 #define ONENAND_DEFAULT_CFG1_VALUE 0x0 /**************************************************************** * External function and data declarations ***************************************************************/extern uint32 flash_nand_msm_init(void);extern uint32 flash_onenand_msm_init(uint32 *baseaddr_ptr);extern uint32 flash_nand_get_NAND_wait_states(int width);extern struct flash_ctlr_probers nand_ctlr_probers_array[];extern struct flash_probers nand_probers_array[];extern struct flash_probers onenand_probers_array[];extern int flash_nand_ctlr_a_device_probe (struct fsi_device_data *self, int whichflash);extern int flash_onenand_ctlr_a_device_probe (struct fsi_device_data *self, int whichflash);extern int flash_nand_ctlr_a_is_busy (void);extern int flash_onenand_ctlr_a_is_busy (void);#endif /* End of __FLASH_NAND_MSM_H__ */
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