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📄 st72321.c

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/***************************************************************************
Project  :  RDS Car Radio System
Compiler :  ST7 Metrowerks C 
Module   :  st72321.c
Version  :  V 1.0
Created  :  October 08, 2002
Author   :  Florent COSTE
Description
         -  This file contains the symbolic definitions for
            all the ST72321 internal peripheral registers.
            This file needs a specific Linker Configuration
            file ! ( "+" option in xxx.prm )
***************************************************************************/


/*--------------------------------------------------------------------------
        ST72321 I/O Port Registers
---------------------------------------------------------------------------*/
#include "st72321.h"

#pragma DATA_SEG SHORT ST7_PA
volatile unsigned char PA_DR;           /* port A data register            */
         unsigned char PA_DDR;          /*        data direction register  */
         unsigned char PA_OR;           /*        option register          */

#pragma DATA_SEG SHORT ST7_PB
volatile unsigned char PB_DR;           /* port B data register            */
         unsigned char PB_DDR;          /*        data direction regiater  */
         unsigned char PB_OR;           /*        option register          */

#pragma DATA_SEG SHORT ST7_PC
volatile unsigned char PC_DR;           /* port C data register            */
         unsigned char PC_DDR;          /*        data direction option    */
         unsigned char PC_OR;           /*        option register          */
                                                                 
#pragma DATA_SEG SHORT ST7_PD
volatile unsigned char PD_DR;           /* port D data register            */
         unsigned char PD_DDR;          /*        data direction register  */
         unsigned char PD_OR;           /*        option register          */

#pragma DATA_SEG SHORT ST7_PE
volatile unsigned char PE_DR;           /* port E data register            */
         unsigned char PE_DDR;          /*        data direction register  */
         unsigned char PE_OR;           /*        option register          */

#pragma DATA_SEG SHORT ST7_PF
volatile unsigned char PF_DR;           /* port F data register            */
         unsigned char PF_DDR;          /*        data direction register  */
         unsigned char PF_OR;           /*        option register          */
                                                                 
/*--------------------------------------------------------------------------
        ST72321 I2C Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_I2C
volatile unsigned char I2CCR;           // Control Register
volatile unsigned char I2CSR1;          // Status Register 1
volatile unsigned char I2CSR2;          // Status Register 2
volatile unsigned char I2CCCR;          // Clock Control Register
volatile unsigned char I2COAR1;         // Own Address Register 1 
volatile unsigned char I2COAR2;         // Own Address Register 2 
volatile unsigned char I2CDR;           // I2C Data Register


/*--------------------------------------------------------------------------
        ST72321 SPI Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_SPI
volatile unsigned char SPI1_DR;         /* data register                   */
volatile unsigned char SPI1_CR;         /* control register                */
volatile unsigned char SPI1_SR;         /* status register                 */
                                                                    
/*--------------------------------------------------------------------------
        ST72321 ITC Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_ITC
volatile unsigned char ISPR0;          /* interrupt software priority reg0*/
volatile unsigned char ISPR1;          /* interrupt software priority reg1*/
volatile unsigned char ISPR2;          /* interrupt software priority reg2*/
volatile unsigned char ISPR3;          /* interrupt software priority reg3*/
volatile unsigned char EICR;            // External Interrupt Control Register

/*--------------------------------------------------------------------------
        ST72321 Flash control/status reg
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_FLASH
volatile unsigned char FCSR;            // Flash Control status reg     


/*--------------------------------------------------------------------------
        ST72321 WATCHDOG reg
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_WDG
volatile unsigned char WDGCR;          /* WatchDog Control Register         */
volatile unsigned char SICSR;          // System Integrity Control/Status  Register  


/*--------------------------------------------------------------------------
        ST72321 Main Clock control/status reg
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_MCC
volatile unsigned char MCCSR;          // Main clock control/status reg     
volatile unsigned char MCCBCR;         // Main clock cntrl/beep control reg     

/*--------------------------------------------------------------------------
        ST72321 Timer A Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_TIMA
volatile unsigned char TIM1_CR2;        /* control register 2              */
volatile unsigned char TIM1_CR1;        /* control register 1              */
volatile unsigned char TIM1_SR;         /* status register                 */
volatile unsigned char TIM1_IC1H;       /* input capture 1 high            */
volatile unsigned char TIM1_IC1L;       /* input capture 1 low             */
volatile unsigned char TIM1_OC1H;       /* output compare 1 high           */
volatile unsigned char TIM1_OC1L;       /* output compare 1 low            */
volatile unsigned char TIM1_CNT;        /* counter high                    */
volatile unsigned char TIM1_CNTL;       /* counter low                     */
volatile unsigned char TIM1_ACH;        /* alternate counter high          */
volatile unsigned char TIM1_ACL;        /* alternate counter low           */
volatile unsigned char TIM1_IC2H;       /* input capture 2 high            */
volatile unsigned char TIM1_IC2L;       /* input capture 2 low             */
volatile unsigned char TIM1_OC2H;       /* output compare 2 high           */
volatile unsigned char TIM1_OC2L;       /* output compare 2 low            */


/*--------------------------------------------------------------------------
        ST72321 Timer B Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_TIMB
volatile unsigned char TIM2_CR2;        /* control register 2              */
volatile unsigned char TIM2_CR1;        /* control register 1              */
volatile unsigned char TIM2_SR;         /* status register                 */
volatile unsigned char TIM2_IC1H;       /* input capture 1 high            */
volatile unsigned char TIM2_IC1L;       /* input capture 1 low             */
volatile unsigned char TIM2_OC1H;       /* output compare 1 high           */
volatile unsigned char TIM2_OC1L;       /* output compare 1 low            */
volatile unsigned char TIM2_CNT;        /* counter high                    */
volatile unsigned char TIM2_CNTL;       /* counter low                     */
volatile unsigned char TIM2_ACH;        /* alternate counter high          */
volatile unsigned char TIM2_ACL;        /* alternate counter low           */
volatile unsigned char TIM2_IC2H;       /* input capture 2 high            */
volatile unsigned char TIM2_IC2L;       /* input capture 2 low             */
volatile unsigned char TIM2_OC2H;       /* output compare 2 high           */
volatile unsigned char TIM2_OC2L;       /* output compare 2 low            */

/*--------------------------------------------------------------------------
        ST72321 SCI Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_SCI
volatile unsigned char SCI_SCSR;        /* status register                 */     
volatile unsigned char SCI_SCDR;        /* data register                   */
volatile unsigned char SCI_SCBRR;       /* baud rate register              */
volatile unsigned char SCI_SCCR1;       /* control register 1              */
volatile unsigned char SCI_SCCR2;       /* control register 2              */
volatile unsigned char SCI_PSCBRR;      /* receive baud rate register      */
volatile unsigned char SCI_PRETEST;     /* reserved                        */
volatile unsigned char SCI_PSCBRT;      /* transmit baud rate register     */


/*--------------------------------------------------------------------------
        ST72321 ADC Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_ADC
volatile unsigned char ADC_CR;          /* control/status register         */
//volatile unsigned char ADCCSR;          // control/status register        
volatile unsigned char ADC_DR;          /* data register                   */
//volatile unsigned char ADCDRH;          // data high register        
volatile unsigned char ADCDRL;          // data low register        
                                                    
                                                    
/*--------------------------------------------------------------------------
        ST72321 PWM ART Internal Registers
---------------------------------------------------------------------------*/
#pragma DATA_SEG SHORT ST7_PWMART
volatile unsigned char PWMDCR3;         // PWM AR duty cycle register 3    
volatile unsigned char PWMDCR2;         // PWM AR duty cycle register 2    
volatile unsigned char PWMDCR1;         // PWM AR duty cycle register 1    
volatile unsigned char PWMDCR0;         // PWM AR duty cycle register 0    
volatile unsigned char PWMCR;           // PWM AR timer cntrl register     
volatile unsigned char ARTCSR;          // autoreload timer cntrl status reg
volatile unsigned char ARTCAR;          // autoreload timer counter access reg
volatile unsigned char ARTARR;          // autoreload timer autoreload reg 
volatile unsigned char ARTICCSR;        // AR timer input capture control/status reg 
volatile unsigned char ARTICR1;         // AR timer input capture reg 1
volatile unsigned char ARTICR2;         // AR timer input capture reg 2 


/******************************* end of file *******************************/

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