📄 main.lst
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1 .file "main.c"
2 .arch at90s2313
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
11 .text
12 .Ltext0:
53 .global __vector_5
55 __vector_5:
1:main.c **** /*
2:main.c **** * ----------------------------------------------------------------------------
3:main.c **** * "THE BEER-WARE LICENSE" (Revision 42):
4:main.c **** * <joerg@FreeBSD.ORG> wrote this file. As long as you retain this notice you
5:main.c **** * can do whatever you want with this stuff. If we meet some day, and you think
6:main.c **** * this stuff is worth it, you can buy me a beer in return. Joerg Wunsch
7:main.c **** * ----------------------------------------------------------------------------
8:main.c **** *
9:main.c **** * Simple AVR demonstration. Controls a LED that can be directly
10:main.c **** * connected from OC1/OC1A to GND. The brightness of the LED is
11:main.c **** * controlled with the PWM. After each period of the PWM, the PWM
12:main.c **** * value is either incremented or decremented, that’s all.
13:main.c **** *
14:main.c **** * $Id: simple-demo.c,v 1.3 2002/02/11 19:51:51 j Exp $
15:main.c **** */
16:main.c **** #include <avr/io.h>
17:main.c **** #include <avr/interrupt.h>
18:main.c **** #include <sig-avr.h>
19:main.c **** #if defined(__AVR_AT90S2313__)
20:main.c **** # define OC1 PB3
21:main.c **** # define OCR OCR1L
22:main.c **** # define DDROC DDRB
23:main.c **** #elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__)
24:main.c **** # define OC1 PB1
25:main.c **** # define DDROC DDRB
26:main.c **** # define OCR OCR1L
27:main.c **** #elif defined(__AVR_AT90S4414__) || defined(__AVR_AT90S8515__) || \
28:main.c **** defined(__AVR_AT90S4434__) || defined(__AVR_AT90S8535__) || \
29:main.c **** defined(__AVR_ATmega163__)
30:main.c **** # define OC1 PD5
31:main.c **** # define DDROC DDRD
32:main.c **** # define OCR OCR1AL
33:main.c **** #else
34:main.c **** # error "Don’t know what kind of MCU you are compiling for"
35:main.c **** #endif
36:main.c ****
37:main.c **** volatile uint16_t pwm;
38:main.c **** volatile enum
39:main.c **** {
40:main.c **** UP, DOWN
41:main.c **** } direction;
42:main.c ****
43:main.c **** SIGNAL(SIG_OVERFLOW1)
44:main.c **** {
57 .LM1:
58 /* prologue: frame size=0 */
59 0000 1F92 push __zero_reg__
60 0002 0F92 push __tmp_reg__
61 0004 0FB6 in __tmp_reg__,__SREG__
62 0006 0F92 push __tmp_reg__
63 0008 1124 clr __zero_reg__
64 000a 2F93 push r18
65 000c 8F93 push r24
66 000e 9F93 push r25
67 /* prologue end (size=8) */
45:main.c **** switch (direction)
69 .LM2:
70 0010 8091 0000 lds r24,direction
71 0014 9927 clr r25
72 0016 0097 sbiw r24,0
73 0018 19F0 breq .L3
75 .LM3:
76 001a 0197 sbiw r24,1
77 001c A9F0 breq .L5
78 001e 25C0 rjmp .L2
79 .L3:
46:main.c **** {
47:main.c **** case UP:
48:main.c **** if (++pwm == 1023) direction = DOWN;
81 .LM4:
82 0020 8091 0000 lds r24,pwm
83 0024 9091 0000 lds r25,(pwm)+1
84 0028 0196 adiw r24,1
85 002a 9093 0000 sts (pwm)+1,r25
86 002e 8093 0000 sts pwm,r24
87 0032 8091 0000 lds r24,pwm
88 0036 9091 0000 lds r25,(pwm)+1
89 003a 8F5F subi r24,lo8(1023)
90 003c 9340 sbci r25,hi8(1023)
91 003e A9F4 brne .L2
92 0040 81E0 ldi r24,lo8(1)
93 0042 8093 0000 sts direction,r24
49:main.c **** break;
95 .LM5:
96 0046 11C0 rjmp .L2
97 .L5:
50:main.c **** case DOWN:
51:main.c **** if (--pwm == 0) direction = UP;
99 .LM6:
100 0048 8091 0000 lds r24,pwm
101 004c 9091 0000 lds r25,(pwm)+1
102 0050 0197 sbiw r24,1
103 0052 9093 0000 sts (pwm)+1,r25
104 0056 8093 0000 sts pwm,r24
105 005a 8091 0000 lds r24,pwm
106 005e 9091 0000 lds r25,(pwm)+1
107 0062 892B or r24,r25
108 0064 11F4 brne .L2
109 0066 1092 0000 sts direction,__zero_reg__
110 .L2:
52:main.c **** break;
53:main.c **** }
54:main.c **** outw(OCR, pwm);
112 .LM7:
113 006a 8091 0000 lds r24,pwm
114 006e 9091 0000 lds r25,(pwm)+1
115 0072 9BBD out (74)+1-0x20,r25
116 0074 8ABD out 74-0x20,r24
117 /* epilogue: frame size=0 */
118 0076 9F91 pop r25
119 0078 8F91 pop r24
120 007a 2F91 pop r18
121 007c 0F90 pop __tmp_reg__
122 007e 0FBE out __SREG__,__tmp_reg__
123 0080 0F90 pop __tmp_reg__
124 0082 1F90 pop __zero_reg__
125 0084 1895 reti
126 /* epilogue end (size=8) */
127 /* function __vector_5 size 69 (53) */
130 .global ioinit
132 ioinit:
55:main.c **** }
56:main.c ****
57:main.c **** void ioinit(void)
58:main.c **** {
134 .LM8:
135 /* prologue: frame size=0 */
136 /* prologue end (size=0) */
59:main.c **** #if defined(COM11)
60:main.c **** outp(BV(PWM10)|BV(PWM11)|BV(COM11), TCCR1A); /* tmr1 is 10-bit PWM */
61:main.c **** #elif defined(COM1A1)
62:main.c **** outp(BV(PWM10)|BV(PWM11)|BV(COM1A1), TCCR1A); /* tmr1 is 10-bit PWM */
138 .LM9:
139 0086 83E8 ldi r24,lo8(-125)
140 0088 8FBD out 79-0x20,r24
63:main.c **** #else
64:main.c **** # error "need either COM1A1 or COM11"
65:main.c **** #endif
66:main.c **** outp(BV(CS10), TCCR1B); /* tmr1 running on full MCU clock */
142 .LM10:
143 008a 81E0 ldi r24,lo8(1)
144 008c 8EBD out 78-0x20,r24
67:main.c **** outw(OCR, 0); /* set PWM value to 0 */
146 .LM11:
147 008e 1BBC out (74)+1-0x20,__zero_reg__
148 0090 1ABC out 74-0x20,__zero_reg__
68:main.c **** outp(BV(OC1), DDROC); /* enable OC1 and PB2 as output */
150 .LM12:
151 0092 88E0 ldi r24,lo8(8)
152 0094 87BB out 55-0x20,r24
153 .LBB2:
154 .LBB3:
156 .Ltext1:
1:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** /* Copyright (c) 2002, Marek Michalkiewicz
2:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** All rights reserved.
3:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h ****
4:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** Redistribution and use in source and binary forms, with or without
5:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** modification, are permitted provided that the following conditions are met:
6:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h ****
7:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** * Redistributions of source code must retain the above copyright
8:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** notice, this list of conditions and the following disclaimer.
9:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** * Redistributions in binary form must reproduce the above copyright
10:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** notice, this list of conditions and the following disclaimer in
11:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** the documentation and/or other materials provided with the
12:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** distribution.
13:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h ****
14:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15:C:/WinAVR/bin/../lib/gcc/avr/3.4.1/../../../../avr/include/avr/interrupt.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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