📄 adcdac.c
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/****************************************************************************
**
** 文件名: ADCDAC.c
** 功能: C8051Fxxx的A/D、D/A驱动;
** 创建时间:2005.08.05
** 修改时间:2005.12.01
** 修改说明:
** 作者: 李立学
** 版权申明:可以拷贝,可以修改,但必须保留修改时间和作者信息
**
****************************************************************************/
#include "LZK.H"
/****************************************************************************
** 函数名称: InVref_Init()
** 功能描述: C8051F040内部基准使能和初始化.
** 入口参数: Ref_EN:内部基准使能.
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
void InVref_Init(bit Ref_EN)
{
SFRPAGE = LEGACY_PAGE;
if( Ref_EN == 1 )
REF0CN = 0x07; // 0000 0111: Enable REF
else
REF0CN = 0x00; // 0000 0000: Disable REF
// REF0CN(00000000): Reference Control Register
// Bits7-5: UNUSED. Read = 000b; Write = don’t care.
// Bit4: AD0VRS: ADC0 Voltage Reference Select
// 0/1: ADC0 voltage reference from VREF0 / DAC0 output.
// Bit3: AD2VRS: ADC2 Voltage Reference Select
// 0/1: ADC2 voltage reference from VREF2 / AV+.
// Bit2: TEMPE: Temperature Sensor Enable Bit.
// 0/1: Internal Temperature Sensor Off / On.
// Bit1: BIASE: ADC/DAC Bias Generator Enable Bit.
// 0/1: Internal BiasGenerat or Off / ON.
// Bit0: REFBE: Internal Reference Buffer Enable Bit.
// 0/1: Internal Reference Buffer Off / On.
SFRPAGE = 0x00;
}
/****************************************************************************
** 函数名称: ADC0_Init()
** 功能描述: 初始化CAN控制器定时、波特率,使能CAN控制器
** 入口参数: ADC0_EN: 0,ADC0 Disabled; 1,ADC0 Enabled;
ADC0_Mode: 0,AD0BUSY; 1,T3; 2,CNVSTR; 3,T2
ADC0_ChNum: The Channal to ADC
ADC0_GAIN: GAIN of ADC0: 000,1; 001,2; 010,4; 011,8; 10x,16; 11x,0.5
HVA_EN: 0/1, HVA Channal Disabled/Enabled.
HVA_GAIN: HVA GAIN, 00~11 <====> 0.5~14.
ADC0_LJST: ADC0 DATA Format,Left/Right Justified.
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
void ADC0_Init(bit ADC0_EN,unsigned char ADC0_Mode,unsigned char ADC0_ChNum,unsigned char ADC0_GAIN,bit HVA_EN,unsigned char HVA_GAIN,bit ADC0_LJST)
{
unsigned char ucTMP;
SFRPAGE = ADC0_PAGE; // Switch to adc0 page
AMX0CF = 0x00; // All Channals are Single-Ended input
// AMUX0CF(00000000): AMUX0 Configuration Register
// Bits7-4: UNUSED. Read = 0000b; Write = don’t care.
// Bit3: PORT3IC: Port 3 even/odd Pin Input Pair Configuration Bit.
// 0/1: Port 3 even and odd input channels are Single-Ended / Difference input pair
// Bit2: HVDA2C: HVDA 2's Compliment Bit.
// 0/1: HVDA output is single-ended / Result for 2’s compliment value
// Bit1: AIN23IC: AIN0.2, AIN0.3 Input Pair Configuration Bit
// 0/1: AIN0.2 and AIN0.3 are single-ended / difference input.
// Bit0: AIN01IC: AIN0.0, AIN0.1 Input Pair Configuration Bit
// 0/1: AIN0.0 and AIN0.1 are single-ended / difference input.
AMX0SL = ADC0_ChNum;
// AMX0SL(00000000): AMUX0 Channel Select Register
// Bits7-4: UNUSED. Read = 0000b; Write = don’t care
// Bits3-0: AMX0AD3-0: AMX0 Address Bits
AMX0PRT = 0x00;
// AMX0PRT(00000000): Port 3 Pin Selection Register
// BitN: PAIN7EN: Pin N Analog Input Enable Bit (N = 7..0)
// 0/1: P3.N is Not Selected / Selected as an analog input to the AMUX.
if( HVA_EN )
ucTMP = 0x80;
ucTMP = ucTMP | HVA_GAIN;
HVA0CN = ucTMP; // 1000 0100: Av = 0.25
// HVA0CN(00000000): High Voltage Difference Amplifier Control Register
// Bit7: HVDAEN: High Voltage Difference Amplifier (HVDA) Enable Bit.
// 0/1: The HVDA is Disabled Enabled.
// Bits6-3: Reserved.
// Bits2-0: HVGAIN3-HVGAIN0: HVDA Gain Control Bits.
// Gain: 0.05~14.
ADC0CF = 0x58 | ADC0_GAIN; // 01011 000, Use the 2.0M SAR CLOCK ( <=100k SPS )
// ADC0CF(00000000): ADC0 Configuration Register
// Bits7-3: AD0SC4-0: ADC0 SAR Conversion Clock Period Bits
// AD0SC[4..0] = (SYSCLK/ADC0_SAR_CLK)-1. SYSCLK: 24.000MHz
// Bits2-0: AMP0GN2-0: ADC0 Internal Amplifier Gain (PGA)
// 000 001 010 011 10x 11x
// GAIN: 1 2 4 8 16 0.5
if( ADC0_EN == 1 )
ADC0CN = 0xC0; // ADC0 Enabled,Right-justified.
else
ADC0CN = 0x40; // ADC0 Disabled,Right-justified.
if( ADC0_LJST == 1 )
ADC0CN = ADC0CN | 0x01; // ADC0 Left-justified.
ucTMP = ADC0_Mode;
ucTMP = (ucTMP << 2) & 0x0C; // Only Bit[3..2](Periours Bit[1..0]) is Valid.
ADC0CN = ADC0CN | ucTMP; // 1100 | ucTMP[4..0].
// ADC0CN: ADC0 Control Register
// Bit7: AD0EN: ADC0 Enable Bit.
// 0/1: ADC0 Disabled / Enabled.
// Bit6: AD0TM: ADC Track Mode Bit
// 0/1: ADC Tracking is continuous / Tracking Defined by ADSTM1-0 bits.
// Bit5: AD0INT: ADC0 Conversion Complete Interrupt Flag,and Cleared by software.
// 0/1: ADC0 has not completed / completed a data conversion.
// Bit4: AD0BUSY: ADC0 Busy Bit.
// Read: 0/1: ADC0 Conversion is complete / ADC0 Conversion is in progress.
// Write:0/1: No Effect / Initiates ADC0 Conversion if AD0STM1-0 = 00b.
// Bit3-2: AD0CM1-0: ADC0 Start of Conversion Mode Select,
// If AD0TM = 0:
// 00: ADC0 conversion initiated on every write of ‘1’ to AD0BUSY.
// 01: ADC0 conversion initiated on overflow of Timer 3.
// 10: ADC0 conversion initiated on rising edge of external CNVSTR.
// 11: ADC0 conversion initiated on overflow of Timer 2.
// If AD0TM = 1:
// 00: Tracking starts with the write of ‘1’ to AD0BUSY.
// 01: Tracking started by the overflow of Timer 3.
// 10: ADC0 tracks only when CNVSTR '0'; Starts on rising CNVSTR edge.
// 11: Tracking started by the overflow of Timer 2.
// Bit1: AD0WINT: ADC0 Window Compare Interrupt Flag;and Cleared by software.
// 0/1: ADC0 Window Comparison Data match has Not Occurred / Occurred.
// Bit0: AD0LJST: ADC0 Left Justify Select.
// 0/1: Data in ADC0H:ADC0L registers are Right/Left-justified.
// ADC0H/ADC0L: ADC0 Data Word MSB/LSB Register.
// ADC0GTH/ADC0GTL: ADC0 Greater-Than Data High/Low Byte Register.
// ADC0LTH/ADC0LTL: ADC0 Less-Than Data High/Low Byte Register.
}
/****************************************************************************
** 函数名称: ADC0_CH_Setting()
** 功能描述: ADC0采样通道设置.
** 入口参数: ADC0_ChNum:要采样的通道.
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
void ADC0_CH_Setting(unsigned char ADC0_ChNum)
{
SFRPAGE = ADC0_PAGE; // Switch to ADC0 page.
AMX0SL = ADC0_ChNum; // The ChNum'th Channal to ADC
}
/****************************************************************************
** 函数名称: ADC0_Mode_Setting()
** 功能描述: ADC0采样模式设置.
** 入口参数: ADC0_Mode: 0,AD0BUSY; 1,T3; 2,CNVSTR; 3,T2.
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
void ADC0_Mode_Setting(unsigned char ADC0_Mode)
{
unsigned char ucTMP;
SFRPAGE = ADC0_PAGE; // Switch to ADC0 page.
ucTMP = ADC0_Mode; // ADC0_Mode: 0,AD0BUSY; 1,T3; 2,CNVSTR; 3,T2
ucTMP = (ucTMP << 2) & 0x0C; // Only Bit[3..2](Periours Bit[1..0]) is Valid.
ADC0CN = 0xC0 | ucTMP; // 1100 | ucTMP[4..0].
}
/****************************************************************************
** 函数名称: ADC0_GAIN_Setting()
** 功能描述: ADC0输入PGA放大倍数设置.
** 入口参数: ADC0_GAIN:000,1; 001,2; 010,4; 011,8; 10x,16; 11x,0.5
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
void ADC0_GAIN_Setting(unsigned char ADC0_GAIN)
{
unsigned char ucTMP;
SFRPAGE = ADC0_PAGE; // Switch to ADC0 page.
ucTMP = ADC0CF & 0xf8;
ADC0CF = ucTMP | ADC0_GAIN; // .
}
/****************************************************************************
** 函数名称: ADC0_Cal()
** 功能描述: ADC0自校准,除去直流偏移.
** 入口参数: 无
** 出口参数: 无
** 全局变量: 无
** 调用模块: 无
** 说明:
****************************************************************************/
unsigned char ADC0_Cal(void) // ADC0 Offset Calibration.
{
unsigned char i;
unsigned int uiTMP;
ADC0_Mode_Setting(0x00); // ADC0_Mode: 0,AD0BUSY.
ADC0_CH_Setting(0x05); // AMUX0 Connect with AGND.
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