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word-break:break-all'><span style='font-size:9.0pt;line-height:150%'>作者：黄盈鑫
文章来源：本站原创 点击数：<span lang=EN-US>979 </span>更新时间：<span lang=EN-US>2006-03-16
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<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>/*<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span style='font-size:
9.0pt;line-height:150%'>如果需要详细设计资料请发邮件联系，<span lang=EN-US>senxin79@163.com<o:p></o:p></span></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>*/<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>/* wireless.c
================================================================================================<br>
* <br>
* This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTYT; without even the<br>
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE.<br>
*<br>
* Author(s): Ole Saether<br>
*<br>
* NOTES:<br>
*<br>
* A frame is the time between each transmission of a packet.<br>
* A frame is divided into NSLOTS time-slots. The duration of a
time-slot is 1/fs, where fs is the ADC<br>
* sampling frequency.<br>
*<br>
* The NOSYNC variable is used by the slave to keep track of how many
frames have gone since it received a<br>
* valid packet. It is incremented once each frame in the TIMER2 irq
handler and cleared each time a packet is<br>
* received. If the variable reaches the constant NSYNC (see below)
the slave enters continuous receive mode.<br>
*<br>
* The pin P0.2 is used to select slave (P0.2 = 1) or master (P0.2 =
0).<br>
*<br>
* $Date: 8.10.03 12:02 $<br>
* $Revision: 1 $<br>
*<br>
*=============================================================================================================<br>
*/<br>
#include <Nordic\reg24e1.h><o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>#define ADDR_INDEX
8
// Index to address bytes in RFConfig.buf <br>
#define ADDR_COUNT
4
// Number of address bytes<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>#define
FSZ
32
// Buffer size<br>
#define FMASK FSZ-1<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>struct RFConfig<br>
{<br>
unsigned char n;<br>
unsigned char buf[15];<br>
};<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>typedef struct RFConfig RFConfig;<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>#define
NSLOTS
24
// Number of samples in one packet<br>
#define NSYNC
10
// #frames wo/packets before the slave enters receive mode<br>
#define RXSLOT
14
// Wait from slot 14 to..<br>
#define WTSLOT
21
// ..slot 21 for reception of a packet<br>
#define SYNCSLOT
20
// When the slave receives a valid packet set the slot counter to this
number<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'><br>
volatile unsigned char idata RxBuf[FSZ];<br>
volatile unsigned char idata TxBuf[FSZ];<br>
volatile unsigned char TxWrp, TxRdp, TxNum;<br>
volatile unsigned char RxWrp, RxRdp, RxNum;<br>
volatile unsigned char rec, slotn, nosync, slave, prevsample;<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>const RFConfig RxTxConf =<br>
{<br>
15,<br>
0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,<br>
0xaa, 0xbb, 0x12, 0x34, 0x83, 0x6f, 0x04<br>
};<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>void InitBuffers(void)<br>
{<br>
RxWrp = RxRdp = RxRdp = RxNum = 0;<br>
TxWrp = TxRdp = TxRdp = TxNum = 0;<br>
}<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>void Delay100us(volatile unsigned
char n)<br>
{<br>
unsigned char i;<br>
while(n--)<br>
for(i=0;i<35;i++)<br>
;<br>
}<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>unsigned char
SpiReadWrite(unsigned char b)<br>
{<br>
EXIF &=
~0x20;
// Clear SPI interrupt<br>
SPI_DATA =
b;
// Move byte to send to SPI data register<br>
while((EXIF & 0x20) ==
0x00) //
Wait until SPI hs finished transmitting<br>
;<br>
return SPI_DATA;<br>
}<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'>void Init(void)<br>
{<br>
unsigned char i;<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'> P0_DIR =
0x04;
// P0.2 is input, the rest output<br>
P0 =
0x02;
// P0.1 = 1 for the master/slave selection<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'> slotn = nosync
= 0;<br>
InitBuffers();<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'> if ((P0 &
0x04) == 0x04)<br>
slave = 1;<br>
else<br>
slave = 0;<o:p></o:p></span></p>
<p style='line-height:150%;word-break:break-all'><span lang=EN-US
style='font-size:9.0pt;line-height:150%'> // TIMER2:<br>
TR2 =
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