⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 zdhw.c

📁 该代码为linux下通过usb驱动实现的无线网络驱动程序,在2.6.18的内核下调试通过
💻 C
📖 第 1 页 / 共 5 页
字号:
    0x03f7a0, 0x033331, 0x00000d,                 //;Ch 5
    0x03f7a0, 0x0b3331, 0x00000d,                 //;Ch 6
    0x03e7a0, 0x033331, 0x00000d,                 //;Ch 7
    0x03e7a0, 0x0b3331, 0x00000d,                 //;Ch 8
    0x03f7b0, 0x033331, 0x00000d,                 //;Ch 9
    0x03f7b0, 0x0b3331, 0x00000d,                 //;Ch 10
    0x03E7b0, 0x033331, 0x00000d,                 //;Ch 11
    0x03e7b0, 0x0b3331, 0x00000d,                 //;Ch 12
    0x03f7c0, 0x033331, 0x00000d,                 //;Ch 13
    0x03e7c0, 0x066661, 0x00000d                  //;Ch 14
};

U32 AL2230TB_1211[] = {
    0x03f790, 0x033331, 0x00000d,   //;Null 
    0x03f790, 0x033331, 0x00000d,   //;Ch 1
    0x03f790, 0x0b3331, 0x00000d,  //;Ch 2
    0x03e790, 0x033331, 0x00000d,  //;Ch 3
    0x03e790, 0x0b3331, 0x00000d,  //;Ch 4
    0x03f7a0, 0x033331, 0x00000d,  //;Ch 5
    0x03f7a0, 0x0b3331, 0x00000d,  //;Ch 6
    0x03e7a0, 0x033331, 0x00000d,  //;Ch 7
    0x03e7a0, 0x0b3331, 0x00000d,  //;Ch 8
    0x03f7b0, 0x033331, 0x00000d,  //;Ch 9
    0x03f7b0, 0x0b3331, 0x00000d,  //;Ch 10
    0x03E7b0, 0x033331, 0x00000d,  //;Ch 11
    0x03e7b0, 0x0b3331, 0x00000d,  //;Ch 12
    0x03f7c0, 0x033331, 0x00000d,  //;Ch 13
    0x03e7c0, 0x066661, 0x00000d   //;Ch 14
};

U32 AL2230TB[] = {
        0x09efc0, 0x8cccc0, 0xb00000,  //;Null 
        0x09efc0, 0x8cccc0, 0xb00000,  //;Ch 1
        0x09efc0, 0x8cccd0, 0xb00000,  //;Ch 2
        0x09e7c0, 0x8cccc0, 0xb00000,  //;Ch 3
        0x09e7c0, 0x8cccd0, 0xb00000,  //;Ch 4
        0x05efc0, 0x8cccc0, 0xb00000,  //;Ch 5
        0x05efc0, 0x8cccd0, 0xb00000,  //;Ch 6
        0x05e7c0, 0x8cccc0, 0xb00000,  //;Ch 7
        0x05e7c0, 0x8cccd0, 0xb00000,  //;Ch 8
        0x0defc0, 0x8cccc0, 0xb00000,  //;Ch 9
        0x0defc0, 0x8cccd0, 0xb00000,  //;Ch 10
        0x0de7c0, 0x8cccc0, 0xb00000,  //;Ch 11
        0x0de7c0, 0x8cccd0, 0xb00000,  //;Ch 12
        0x03efc0, 0x8cccc0, 0xb00000,  //;Ch 13
        0x03e7c0, 0x866660, 0xb00000   //;Ch 14
};
U32 AL7230BTB[] = {
		0x09ec04, 0x8cccc8,   //;Null 
		0x09ec00, 0x8cccc8,   //;Ch 1
		0x09ec00, 0x8cccd8,   //;Ch 2
		0x09ec00, 0x8cccc0,   //;Ch 3
		0x09ec00, 0x8cccd0,   //;Ch 4
		0x05ec00, 0x8cccc8,   //;Ch 5
		0x05ec00, 0x8cccd8,   //;Ch 6
		0x05ec00, 0x8cccc0,   //;Ch 7
		0x05ec00, 0x8cccd0,   //;Ch 8
		0x0dec00, 0x8cccc8,   //;Ch 9
		0x0dec00, 0x8cccd8,   //;Ch 10
		0x0dec00, 0x8cccc0,   //;Ch 11
		0x0dec00, 0x8cccd0,   //;Ch 12
		0x03ec00, 0x8cccc8,   //;Ch 13
		0x03ec00, 0x866660    //;Ch 14
};

U32 AL7230BTB_a[] = {
		0x06aff4, 0x855550, 0x47f8a2, 0x21ebfe,   //;Null
		0x02aff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;CH 8 , 5040MHz
		0x02aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;CH 12, 5060MHz
		0x0aaff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;CH 16, 5080MHz
		0x06aff0, 0x8aaaa0, 0x47f8a2, 0x21ebfe,   //;CH 34, 5170MHz
		0x06aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 36, 5180MHz
		0x0eaff0, 0x800008, 0x47f8a2, 0x21ebfe,   //;Ch 38, 5190MHz
		0x0eaff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 40, 5200MHz
		0x0eaff0, 0x855558, 0x47f8a2, 0x21ebfe,   //;Ch 42, 5210MHz
		0x0eaff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 44, 5220MHz, current support
		0x0eaff0, 0x8aaaa0, 0x47f8a2, 0x21ebfe,   //;Ch 46, 5230MHz
		0x0eaff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 48, 5240MHz
		0x01aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 52, 5260MHz
		0x01aff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 56, 5280MHz, current support
		0x01aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 60, 5300MHz
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 64, 5320MHz
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 68, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 72, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 76, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 80, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 84, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 88, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 92, 5320MHz,dummy
		0x09aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 96, 5320MHz,dummy
		0x03aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 100, 5500MHz
		0x03aff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 104, 5520MHz
		0x03aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 108, 5540MHz
		0x0baff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 112, 5560MHz
		0x0baff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 116, 5580MHz
		0x0baff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 120, 5600MHz
		0x07aff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 124, 5620MHz
		0x07aff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 128, 5640MHz
		0x07aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 132, 5660MHz
		0x0faff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 136, 5680MHz
		0x0faff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 140, 5700MHz
		0x0faff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 144, 5700MHz, dummy
		0x006ff0, 0x800018, 0x47f8a2, 0x21ebfe,   //;Ch 149, 5745MHz
		0x006ff0, 0x855540, 0x47f8a2, 0x21ebfe,   //;Ch 153, 5765MHz
		0x006ff0, 0x8aaab0, 0x47f8a2, 0x21ebfe,   //;Ch 157, 5785MHz
		0x086ff0, 0x800018, 0x47f8a2, 0x21ebfe,   //;Ch 161, 5805MHz
		0x086ff0, 0x855540, 0x47f8a2, 0x21ebfe,   //;Ch 165, 5825MHz
		0x086ff0, 0x8d5540, 0x47f8a2, 0x21ebfe,   //;Ch 168, 5825MHz,dummy
		0x086ff0, 0x8d5540, 0x47f8a2, 0x21ebfe,   //;Ch 172, 5825MHz,dummy
		0x086ff0, 0x8d5540, 0x47f8a2, 0x21ebfe,   //;Ch 176, 5825MHz,dummy
		0x086ff0, 0x8d5540, 0x47f8a2, 0x21ebfe,   //;Ch 180, 5825MHz,dummy
		0x04aff0, 0x800000, 0x47f8a2, 0x21ebf6,   //;Ch 184, 4920MHz
		0x04aff0, 0x855550, 0x47f8a2, 0x21ebfe,   //;Ch 188, 4940MHz
		0x0caff0, 0x8aaaa8, 0x47f8a2, 0x21ebfe,   //;Ch 192, 4960MHz
		0x0caff0, 0x800000, 0x47f8a2, 0x21ebf6     //;Ch 196, 4980MHz
};

U32 RFMD2958t[] = {
    0x1422BD,   //Null 
    0x185D17,   //Null 
    0x181979,   //Ch 1
    0x1e6666,   //Ch 1
    0x181989,   //Ch 2
    0x1e6666,   //Ch 2
    0x181999,   //Ch 3
    0x1e6666,   //Ch 3
    0x1819a9,   //Ch 4
    0x1e6666,   //Ch 4
    0x1819b9,   //Ch 5
    0x1e6666,   //Ch 5
    0x1819c9,   //Ch 6
    0x1e6666,   //Ch 6
    0x1819d9,   //Ch 7
    0x1e6666,   //Ch 7
    0x1819e9,   //Ch 8
    0x1e6666,   //Ch 8
    0x1819f9,   //Ch 9
    0x1e6666,   //Ch 9
    0x181a09,   //Ch 10
    0x1e6666,   //Ch 10
    0x181a19,   //Ch 11
    0x1e6666,   //Ch 11
    0x181a29,   //Ch 12
    0x1e6666,   //Ch 12
    0x181a39,   //Ch 13
    0x1e6666,   //Ch 13
    0x181a60,   //Ch 14
    0x1c0000    //Ch 14
};


ZDTYPE_UWTxGain ZD_UWTxGain[] =
{
	{0x12,0x73FFFF},
	{0x11,0x73FB3F},
	{0x10,0x73FF33},
	{0x0F,0x73FF8B},
	{0x0E,0x737FBF},
	{0x0D,0x7361D7},
	{0x0C,0x71FFFF},
	{0x0B,0x71FF3F},
	{0x0A,0x71E6DB},
	{0x09,0x71F35B},
	{0x08,0x71F393},
	{0x07,0x71F693},
	{0x06,0x71F493},
	{0x05,0x71F093},
	{0x04,0x70EA93},
	{0x03,0x70F893},
	{0x02,0x70E093},
	{0x01,0x70FB13},
	{0x00,0x70E313},
};

#define SET_IF_SYNTHESIZER(macp, InputValue)       \
{                                                     \
	mFILL_WRITE_REGISTER( ZD_CR244, (U8) ((InputValue & 0xff0000)>>16));               \
	mFILL_WRITE_REGISTER( ZD_CR243, (U8) ((InputValue & 0xff00) >> 8));      \
	mFILL_WRITE_REGISTER( ZD_CR242, (U8) ((InputValue & 0xff)));   \
}             
#define mFILL_WRITE_REGISTER(addr0, value0) \
{                                           \
    WriteAddr[WriteIndex] = addr0;          \
    WriteData[WriteIndex ++] = value0;      \
}

/*
#ifndef HOST_IF_USB
void
HW_Set_IF_Synthesizer(zd_80211Obj_t *pObj, U32 InputValue)
{
	U32	S_bit_cnt;
	U32 tmpvalue;
	void *reg = pObj->reg;
	int i;

	
	S_bit_cnt = pObj->S_bit_cnt;

	InputValue = InputValue << (31 - S_bit_cnt);
	
#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )	
	pObj->SetReg(reg, ZD_LE2, 0);
	pObj->SetReg(reg, ZD_RF_IF_CLK, 0);
	
	while(S_bit_cnt){
		InputValue = InputValue << 1;
		if (InputValue & 0x80000000){
			pObj->SetReg(reg, ZD_RF_IF_DATA, 1);
		}
		else{
			pObj->SetReg(reg, ZD_RF_IF_DATA, 0);
		}
		pObj->SetReg(reg, ZD_RF_IF_CLK, 1);
		//pObj->DelayUs(50);
		pObj->SetReg(reg, ZD_RF_IF_CLK, 0);

		//pObj->DelayUs(50);
		S_bit_cnt --;
	}
	
	pObj->SetReg(reg, ZD_LE2, 1);
	
	if (pObj->S_bit_cnt == 20){			//Is it Intersil's chipset
		pObj->SetReg(reg, ZD_LE2, 0);
	}
	return;
#else
	LockPhyReg(pObj);
	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue &= ~BIT_1;
	pObj->SetReg(reg, ZD_CR203, tmpvalue);

	tmpvalue = pObj->GetReg(reg, ZD_CR240);
	tmpvalue = 0x80;
	if (tmpvalue & BIT_7){		// Configure RF by Software
		tmpvalue = pObj->GetReg(reg, ZD_CR203);
		tmpvalue &= ~BIT_2;
		pObj->SetReg(reg, ZD_CR203, tmpvalue);


		while(S_bit_cnt){
			InputValue = InputValue << 1;
			if (InputValue & 0x80000000){
				tmpvalue = pObj->GetReg(reg, ZD_CR203);
				tmpvalue |= BIT_3;
				pObj->SetReg(reg, ZD_CR203, tmpvalue);
			}
			else{
				tmpvalue = pObj->GetReg(reg, ZD_CR203);
				tmpvalue &= ~BIT_3;
				pObj->SetReg(reg, ZD_CR203, tmpvalue);
			}

			tmpvalue = pObj->GetReg(reg, ZD_CR203);
			tmpvalue |= BIT_2;
			pObj->SetReg(reg, ZD_CR203, tmpvalue);

			tmpvalue = pObj->GetReg(reg, ZD_CR203);

			tmpvalue &= ~BIT_2;
			pObj->SetReg(reg, ZD_CR203, tmpvalue);
			S_bit_cnt --;
		}
	}
	else{		// Configure RF by Hardware
		// Make Bit-reverse to meet hardware requirement.
		tmpvalue = 0;
		for (i=0; i<S_bit_cnt; i++){
			InputValue = InputValue << 1;
			if (InputValue & 0x80000000){
				tmpvalue |= (0x1 << i);
			}
		}
		InputValue = tmpvalue;

		// Setup Command-Length
		// wait until command-queue is available
		tmpvalue = pObj->GetReg(reg, ZD_CR241);
		while(tmpvalue & BIT_0){
			pObj->DelayUs(1);
			FPRINT("Command-Queue busy...");
		}

		// write command (from high-byte to low-byte)
		pObj->SetReg(reg, ZD_CR245, InputValue >> 24);
		pObj->SetReg(reg, ZD_CR244, InputValue >> 16);
		pObj->SetReg(reg, ZD_CR243, InputValue >> 8);
		pObj->SetReg(reg, ZD_CR242, InputValue);
	}
	

	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue |= BIT_1;
	pObj->SetReg(reg, ZD_CR203, tmpvalue);

	if (pObj->S_bit_cnt == 20){			//Is it Intersil's chipset
		tmpvalue = pObj->GetReg(reg, ZD_CR203);
		tmpvalue &= ~BIT_1;
		pObj->SetReg(reg, ZD_CR203, tmpvalue);
	}
	
	UnLockPhyReg(pObj);
	return;	
#endif	
}
#endif
*/

void
LockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet

	void *reg = pObj->reg;
	U32	tmpvalue;
	
	tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
	tmpvalue &= ~0x80;
	pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif	
}


void
UnLockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet	
	void *reg = pObj->reg;
	U32	tmpvalue;

	tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
	tmpvalue |= 0x80;
	pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif	
}
void PHY_UWTxPower(zd_80211Obj_t *pObj, U8 TxLevel)
{
    int     i;
    for(i=0;i<19;i++)
    {
        if(TxLevel == ZD_UWTxGain[i].UWTxGainLevel)
            break;
    }
    if(i<19)
    {
        HW_Set_IF_Synthesizer(pObj, ZD_UWTxGain[i].UWTxGainValue);
        pObj->UWCurrentTxLevel = ZD_UWTxGain[i].UWTxGainLevel;
    }
}

/*
void
HW_Set_Maxim_New_Chips(zd_80211Obj_t *pObj, U32 ChannelNo, U8 InitChOnly)
{
	void *reg = pObj->reg;
	U32 tmpvalue;
	
	LockPhyReg(pObj);
	
#ifdef HOST_IF_USB
	pObj->SetReg(reg, ZD_CR23, 0x40);
	pObj->SetReg(reg, ZD_CR15, 0x20);
	pObj->SetReg(reg, ZD_CR28, 0x3e);
	pObj->SetReg(reg, ZD_CR29, 0x00);
	pObj->SetReg(reg, ZD_CR26, 0x11);
	pObj->SetReg(reg, ZD_CR44, 0x33);
	pObj->SetReg(reg, ZD_CR106, 0x2a);
	pObj->SetReg(reg, ZD_CR107, 0x1a);

	pObj->SetReg(reg, ZD_CR109, 0x2b);
	pObj->SetReg(reg, ZD_CR110, 0x2b);
	pObj->SetReg(reg, ZD_CR111, 0x2b);
	pObj->SetReg(reg, ZD_CR112, 0x2b);
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR17, 0x20);
	pObj->SetReg(reg, ZD_CR26, 0x93);

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -