📄 at91sam9263_tfbga324.bsd
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"e0_ncs1_sdcs : A4," &
"e0_nrd_noe : E6," &
"e0_ras : B4," &
"e0_sda10 : E8," &
"e0_sdcke : A2," &
"e0_sdwe : C4," &
"e1_a0_nbs0 : U6," &
"e1_a10 : U8," &
"e1_a11 : N8," &
"e1_a12 : T8," &
"e1_a13 : R8," &
"e1_a14 : R7," &
"e1_a15 : V8," &
"e1_a16_ba0 : U9," &
"e1_a17_ba1 : R9," &
"e1_a18 : T9," &
"e1_a19 : P9," &
"e1_a2 : R6," &
"e1_a20 : V9," &
"e1_a21 : M9," &
"e1_a22 : N9," &
"e1_a3 : V6," &
"e1_a4 : P8," &
"e1_a5 : U7," &
"e1_a6 : N7," &
"e1_a7 : T7," &
"e1_a8 : P7," &
"e1_a9 : V7," &
"e1_ncs0 : P10," &
"e1_nrd_noe : U10," &
"osc32k_xout : R1," &
"osc9m_xout : R18," &
"rtck : U15," &
"shdw : P2," &
"switch : N2," &
"tdo : N18," &
"pps : G9," &
"nsel_sam9263 : A17," &
"vext_por_vddbu : N4," &
"vext_por_vddcore : D3";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of tck : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_RESET of ntrst: signal is true;
-- Specifies the compliance enable patterns for the design.
-- It lists a set of design ports and the values that they
-- should be set to, in order to enable compliance to IEEE
-- Std 1149.1
attribute COMPLIANCE_PATTERNS of AT91SAM9263: entity is
"(jtagsel) (1)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of AT91SAM9263: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of AT91SAM9263: entity is
"BYPASS (111, 100, 110)," &
"EXTEST (000, 011)," &
"SAMPLE (001)," &
"IDCODE (010)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of AT91SAM9263: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of AT91SAM9263: entity is
"0000" & -- 4-bit version number
"0101101100001100" & -- 16-bit part number
"00000011111" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of AT91SAM9263: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of AT91SAM9263: entity is 664;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of AT91SAM9263: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"663 (BC_1, pa19, input, " &
"X), " &
"662 (BC_1, pa19, output3, X, 661, 1, " &
"Z), " &
"661 (BC_1, *, controlr, " &
"1), " &
"660 (BC_1, pa20, input, " &
"X), " &
"659 (BC_1, pa20, output3, X, 658, 1, " &
"Z), " &
"658 (BC_1, *, controlr, " &
"1), " &
"657 (BC_1, pa21, input, " &
"X), " &
"656 (BC_1, pa21, output3, X, 655, 1, " &
"Z), " &
"655 (BC_1, *, controlr, " &
"1), " &
"654 (BC_1, pa22, input, " &
"X), " &
"653 (BC_1, pa22, output3, X, 652, 1, " &
"Z), " &
"652 (BC_1, *, controlr, " &
"1), " &
"651 (BC_1, pa23, input, " &
"X), " &
"650 (BC_1, pa23, output3, X, 649, 1, " &
"Z), " &
"649 (BC_1, *, controlr, " &
"1), " &
"648 (BC_1, pa24, input, " &
"X), " &
"647 (BC_1, pa24, output3, X, 646, 1, " &
"Z), " &
"646 (BC_1, *, controlr, " &
"1), " &
"645 (BC_1, pa25, input, " &
"X), " &
"644 (BC_1, pa25, output3, X, 643, 1, " &
"Z), " &
"643 (BC_1, *, controlr, " &
"1), " &
"642 (BC_1, pa26, input, " &
"X), " &
"641 (BC_1, pa26, output3, X, 640, 1, " &
"Z), " &
"640 (BC_1, *, controlr, " &
"1), " &
"639 (BC_1, pa27, input, " &
"X), " &
"638 (BC_1, pa27, output3, X, 637, 1, " &
"Z), " &
"637 (BC_1, *, controlr, " &
"1), " &
"636 (BC_1, pa28, input, " &
"X), " &
"635 (BC_1, pa28, output3, X, 634, 1, " &
"Z), " &
"634 (BC_1, *, controlr, " &
"1), " &
"633 (BC_1, pa29, input, " &
"X), " &
"632 (BC_1, pa29, output3, X, 631, 1, " &
"Z), " &
"631 (BC_1, *, controlr, " &
"1), " &
"630 (BC_1, pa30, input, " &
"X), " &
"629 (BC_1, pa30, output3, X, 628, 1, " &
"Z), " &
"628 (BC_1, *, controlr, " &
"1), " &
"627 (BC_1, pa31, input, " &
"X), " &
"626 (BC_1, pa31, output3, X, 625, 1, " &
"Z), " &
"625 (BC_1, *, controlr, " &
"1), " &
"624 (BC_1, e1_a0_nbs0, output3, X, 623, 1, " &
"Z), " &
"623 (BC_1, *, controlr, " &
"1), " &
"622 (BC_1, e1_a1_nwe2, input, " &
"X), " &
"621 (BC_1, e1_a1_nwe2, output3, X, 623, 1, " &
"Z), " &
"620 (BC_1, e1_a2, output3, X, 623, 1, " &
"Z), " &
"619 (BC_1, e1_a3, output3, X, 623, 1, " &
"Z), " &
"618 (BC_1, e1_a4, output3, X, 623, 1, " &
"Z), " &
"617 (BC_1, e1_a5, output3, X, 623, 1, " &
"Z), " &
"616 (BC_1, e1_a6, output3, X, 623, 1, " &
"Z), " &
"615 (BC_1, e1_a7, output3, X, 623, 1, " &
"Z), " &
"614 (BC_1, e1_a8, output3, X, 613, 1, " &
"Z), " &
"613 (BC_1, *, controlr, " &
"1), " &
"612 (BC_1, e1_a9, output3, X, 613, 1, " &
"Z), " &
"611 (BC_1, e1_a10, output3, X, 613, 1, " &
"Z), " &
"610 (BC_1, e1_a11, output3, X, 613, 1, " &
"Z), " &
"609 (BC_1, e1_a12, output3, X, 613, 1, " &
"Z), " &
"608 (BC_1, e1_a13, output3, X, 613, 1, " &
"Z), " &
"607 (BC_1, e1_a14, output3, X, 613, 1, " &
"Z), " &
"606 (BC_1, e1_a15, output3, X, 613, 1, " &
"Z), " &
"605 (BC_1, e1_a16_ba0, output3, X, 604, 1, " &
"Z), " &
"604 (BC_1, *, controlr, " &
"1), " &
"603 (BC_1, e1_a17_ba1, output3, X, 604, 1, " &
"Z), " &
"602 (BC_1, e1_a18, output3, X, 604, 1, " &
"Z), " &
"601 (BC_1, e1_a19, output3, X, 604, 1, " &
"Z), " &
"600 (BC_1, e1_a20, output3, X, 604, 1, " &
"Z), " &
"599 (BC_1, e1_a21, output3, X, 604, 1, " &
"Z), " &
"598 (BC_1, e1_a22, output3, X, 604, 1, " &
"Z), " &
"597 (BC_1, e1_ncs0, output3, X, 596, 1, " &
"Z), " &
"596 (BC_1, *, controlr, " &
"1), " &
"595 (BC_1, e1_nrd_noe, output3, X, 596, 1, " &
"Z), " &
"594 (BC_1, e1_nwe_nwe0, input, " &
"X), " &
"593 (BC_1, e1_nwe_nwe0, output3, X, 596, 1, " &
"Z), " &
"592 (BC_1, e1_nbs1_nwe1, input, " &
"X), " &
"591 (BC_1, e1_nbs1_nwe1, output3, X, 596, 1, " &
"Z), " &
"590 (BC_1, e1_d0, input, " &
"X), " &
"589 (BC_1, e1_d0, output3, X, 588, 1, " &
"Z), " &
"588 (BC_1, *, controlr, " &
"1), " &
"587 (BC_1, e1_d1, input, " &
"X), " &
"586 (BC_1, e1_d1, output3, X, 585, 1, " &
"Z), " &
"585 (BC_1, *, controlr, " &
"1), " &
"584 (BC_1, e1_d2, input, " &
"X), " &
"583 (BC_1, e1_d2, output3, X, 582, 1, " &
"Z), " &
"582 (BC_1, *, controlr, " &
"1), " &
"581 (BC_1, e1_d3, input, " &
"X), " &
"580 (BC_1, e1_d3, output3, X, 579, 1, " &
"Z), " &
"579 (BC_1, *, controlr, " &
"1), " &
"578 (BC_1, e1_d4, input, " &
"X), " &
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