📄 dsp28_device.h
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Uint16 rsvd1[7]; //0x740A-10
union COMCONA_REG COMCONA; //0x7411
Uint16 rsvd2; //0x7412
union ACTRA_REG ACTR; //0x7413
Uint16 rsvd3; //0x7414
union DBTCON_REG DBTCONA; //0x7415
Uint16 rsvd4; //0x7416
Uint16 CMPR1; //0x7417
Uint16 CMPR2; //0x7418
Uint16 CMPR3; //0x7419
Uint16 rsvd5[6]; //0x741A-F
union CAPCONA_REG CAPCON; //0x7420
Uint16 rsvd6; //0x7421
union CAPFIFOA_REG CAPFIFO; //0x7422
Uint16 CAP1FIFO; //0x7423
Uint16 CAP2FIFO; //0x7424
Uint16 CAP3FIFO; //0x7425
Uint16 rsvd7; //0x7426
Uint16 CAP1FBOT; //0x7427
Uint16 CAP2FBOT; //0x7428
Uint16 CAP3FBOT; //0x7429
Uint16 rsvd8[2]; //0x742A-B
union EVAIMRA_REG EVAIMRA; //0x742C
union EVAIMRB_REG EVAIMRB; //0x742D
union EVAIMRC_REG EVAIMRC; //0x742E
union EVAIFRA_REG EVAIFRA; //0x742F
union EVAIFRB_REG EVAIFRB; //0x7430
union EVAIFRC_REG EVAIFRC; //0x7431
};
/* EVB Register File */
struct EVB_REGS {
union GPTCONB_REG GPTCONB; //0x7500
Uint16 T3CNT; //0x7501
Uint16 T3CMPR; //0x7502
Uint16 T3PR; //0x7503
union TCONB_REG T3CON; //0x7504
Uint16 T4CNT; //0x7505
Uint16 T4CMPR; //0x7506
Uint16 T4PR; //0x7507
union TCONB_REG T4CON; //0x7508
union EXTCONB_REG EXTCONB; //0x7509
Uint16 rsvd1[7]; //0x750A-10
union COMCONB_REG COMCONB; //0x7511
Uint16 rsvd2; //0x7512
union ACTRB_REG ACTRB; //0x7513
Uint16 rsvd3; //0x7514
union DBTCON_REG DBTCONB; //0x7515
Uint16 rsvd4; //0x7516
Uint16 CMPR4; //0x7517
Uint16 CMPR5; //0x7518
Uint16 CMPR6; //0x7519
Uint16 rsvd5[6]; //0x751A-F
union CAPCONB_REG CAPCONB; //0x7520
Uint16 rsvd6; //0x7521
union CAPFIFOB_REG CAPFIFOB; //0x7522
Uint16 CAP4FIFO; //0x7523
Uint16 CAP5FIFO; //0x7524
Uint16 CAP6FIFO; //0x7525
Uint16 rsvd7; //0x7526
Uint16 CAP4FBOT; //0x7527
Uint16 CAP5FBOT; //0x7528
Uint16 CAP6FBOT; //0x7529
Uint16 rsvd8[2]; //0x752A-B
union EVBIMRA_REG EVBIMRA; //0x752C
union EVBIMRB_REG EVBIMRB; //0x752D
union EVBIMRC_REG EVBIMRC; //0x752E
union EVBIFRA_REG EVBIFRA; //0x752F
union EVBIFRB_REG EVBIFRB; //0x7530
union EVBIFRC_REG EVBIFRC; //0x7531
};
//---------------------------------------------------------------------------
// Function prototypes and external definitions:
//
extern volatile struct EVA_REGS EvaRegs;
extern volatile struct EVB_REGS EvbRegs;
#endif // end of DSP28_EV.H definition
#ifndef DSP28_GPIO_H
#define DSP28_GPIO_H
//----------------------------------------------------
// General purpose I/O (GPIO) Register Bit Definitions
//----------------------------------------------------
// GPIO A mux control register bit definitions */
//
//
struct GPAMUX_BITS { // bits description
Uint16 PWM1_GPIOA0:1; // 0
Uint16 PWM2_GPIOA1:1; // 1
Uint16 PWM3_GPIOA2:1; // 2
Uint16 PWM4_GPIOA3:1; // 3
Uint16 PWM5_GPIOA4:1; // 4
Uint16 PWM6_GPIOA5:1; // 5
Uint16 T1PWM_GPIOA6:1; // 6
Uint16 T2PWM_GPIOA7:1; // 7
Uint16 CAP1Q1_GPIOA8:1; // 8
Uint16 CAP2Q2_GPIOA9:1; // 9
Uint16 CAP3QI1_GPIOA10:1; // 10
Uint16 TDIRA_GPIOA11:1; // 11
Uint16 TCLKINA_GPIOA12:1; // 12
Uint16 C1TRIP_GPIOA13:1; // 13
Uint16 C2TRIP_GPIOA14:1; // 14
Uint16 C3TRIP_GPIOA15:1; // 15
};
union GPAMUX_REG {
Uint16 all;
struct GPAMUX_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO A Direction control register bit definitions
//
//
struct GPADIR_BITS { // bits description
Uint16 GPIOA0:1; // 0
Uint16 GPIOA1:1; // 1
Uint16 GPIOA2:1; // 2
Uint16 GPIOA3:1; // 3
Uint16 GPIOA4:1; // 4
Uint16 GPIOA5:1; // 5
Uint16 GPIOA6:1; // 6
Uint16 GPIOA7:1; // 7
Uint16 GPIOA8:1; // 8
Uint16 GPIOA9:1; // 9
Uint16 GPIOA10:1; // 10
Uint16 GPIOA11:1; // 11
Uint16 GPIOA12:1; // 12
Uint16 GPIOA13:1; // 13
Uint16 GPIOA14:1; // 14
Uint16 GPIOA15:1; // 15
};
union GPADIR_REG {
Uint16 all;
struct GPADIR_BITS bit;
};
//----------------------------------
// GPA Qualregister bit definitions
//
//
struct GPAQUAL_BITS { // bits description
Uint16 QUALPRD:8; // 0:7 Qualification Sampling Period
Uint16 rsvd1:8; // 15:8 reserved
};
union GPAQUAL_REG {
Uint16 all;
struct GPAQUAL_BITS BIT;
};
//---------------------------------------------------------------------------------------
// GPIO A Data register bit definitions
//
//
struct GPADAT_BITS { // bits description
Uint16 GPIOA0:1; // 0
Uint16 GPIOA1:1; // 1
Uint16 GPIOA2:1; // 2
Uint16 GPIOA3:1; // 3
Uint16 GPIOA4:1; // 4
Uint16 GPIOA5:1; // 5
Uint16 GPIOA6:1; // 6
Uint16 GPIOA7:1; // 7
Uint16 GPIOA8:1; // 8
Uint16 GPIOA9:1; // 9
Uint16 GPIOA10:1; // 10
Uint16 GPIOA11:1; // 11
Uint16 GPIOA12:1; // 12
Uint16 GPIOA13:1; // 13
Uint16 GPIOA14:1; // 14
Uint16 GPIOA15:1; // 15
};
union GPADAT_REG {
Uint16 all;
struct GPADAT_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO A Data set bit definitions
//
//
struct GPASET_BITS { // bits description
Uint16 GPIOA0:1; // 0
Uint16 GPIOA1:1; // 1
Uint16 GPIOA2:1; // 2
Uint16 GPIOA3:1; // 3
Uint16 GPIOA4:1; // 4
Uint16 GPIOA5:1; // 5
Uint16 GPIOA6:1; // 6
Uint16 GPIOA7:1; // 7
Uint16 GPIOA8:1; // 8
Uint16 GPIOA9:1; // 9
Uint16 GPIOA10:1; // 10
Uint16 GPIOA11:1; // 11
Uint16 GPIOA12:1; // 12
Uint16 GPIOA13:1; // 13
Uint16 GPIOA14:1; // 14
Uint16 GPIOA15:1; // 15
};
union GPASET_REG {
Uint16 all;
struct GPASET_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO A Data clear register bit definitions
//
//
struct GPACLEAR_BITS { // bits description
Uint16 GPIOA0:1; // 0
Uint16 GPIOA1:1; // 1
Uint16 GPIOA2:1; // 2
Uint16 GPIOA3:1; // 3
Uint16 GPIOA4:1; // 4
Uint16 GPIOA5:1; // 5
Uint16 GPIOA6:1; // 6
Uint16 GPIOA7:1; // 7
Uint16 GPIOA8:1; // 8
Uint16 GPIOA9:1; // 9
Uint16 GPIOA10:1; // 10
Uint16 GPIOA11:1; // 11
Uint16 GPIOA12:1; // 12
Uint16 GPIOA13:1; // 13
Uint16 GPIOA14:1; // 14
Uint16 GPIOA15:1; // 15
};
union GPACLEAR_REG {
Uint16 all;
struct GPACLEAR_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO A Data toggle register bit definitions
//
//
struct GPATOGGLE_BITS { // bits description
Uint16 GPIOA0:1; // 0
Uint16 GPIOA1:1; // 1
Uint16 GPIOA2:1; // 2
Uint16 GPIOA3:1; // 3
Uint16 GPIOA4:1; // 4
Uint16 GPIOA5:1; // 5
Uint16 GPIOA6:1; // 6
Uint16 GPIOA7:1; // 7
Uint16 GPIOA8:1; // 8
Uint16 GPIOA9:1; // 9
Uint16 GPIOA10:1; // 10
Uint16 GPIOA11:1; // 11
Uint16 GPIOA12:1; // 12
Uint16 GPIOA13:1; // 13
Uint16 GPIOA14:1; // 14
Uint16 GPIOA15:1; // 15
};
union GPATOGGLE_REG {
Uint16 all;
struct GPATOGGLE_BITS bit;
};
//---------------------------------------------------------------------------------
// GPIO B mux control register bit definitions
//
//
struct GPBMUX_BITS { // bits description
Uint16 PWM7_GPIOB0:1; // 0
Uint16 PWM8_GPIOB1:1; // 1
Uint16 PWM9_GPIOB2:1; // 2
Uint16 PWM10_GPIOB3:1; // 3
Uint16 PWM11_GPIOB4:1; // 4
Uint16 PWM12_GPIOB5:1; // 5
Uint16 T3PWM_GPIOB6:1; // 6
Uint16 T4PWM_GPIOB7:1; // 7
Uint16 CAP4Q1_GPIOB8:1; // 8
Uint16 CAP5Q2_GPIOB9:1; // 9
Uint16 CAP6QI2_GPIOB10:1; // 10
Uint16 TDIRB_GPIOB11:1; // 11
Uint16 TCLKINB_GPIOB12:1; // 12
Uint16 C4TRIP_GPIOB13:1; // 13
Uint16 C5TRIP_GPIOB14:1; // 14
Uint16 C6TRIP_GPIOB15:1; // 15
};
union GPBMUX_REG {
Uint16 all;
struct GPBMUX_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO B Direction control register bit definitions
//
//
struct GPBDIR_BITS { // bits description
Uint16 GPIOB0:1; // 0
Uint16 GPIOB1:1; // 1
Uint16 GPIOB2:1; // 2
Uint16 GPIOB3:1; // 3
Uint16 GPIOB4:1; // 4
Uint16 GPIOB5:1; // 5
Uint16 GPIOB6:1; // 6
Uint16 GPIOB7:1; // 7
Uint16 GPIOB8:1; // 8
Uint16 GPIOB9:1; // 9
Uint16 GPIOB10:1; // 10
Uint16 GPIOB11:1; // 11
Uint16 GPIOB12:1; // 12
Uint16 GPIOB13:1; // 13
Uint16 GPIOB14:1; // 14
Uint16 GPIOB15:1; // 15
};
union GPBDIR_REG {
Uint16 all;
struct GPBDIR_BITS bit;
};
//-----------------------------------
// GPB Qualregister bit definitions
//
//
struct GPBQUAL_BITS { // bits description
Uint16 QUALPRD:8; // 0:7 Qualification Sampling Period
Uint16 rsvd1:8; // 15:8 reserved
};
union GPBQUAL_REG {
Uint16 all;
struct GPBQUAL_BITS BIT;
};
//---------------------------------------------------------------------------------------
// GPIO B data register bit definitions
//
//
struct GPBDAT_BITS { // bits description
Uint16 GPIOB0:1; // 0
Uint16 GPIOB1:1; // 1
Uint16 GPIOB2:1; // 2
Uint16 GPIOB3:1; // 3
Uint16 GPIOB4:1; // 4
Uint16 GPIOB5:1; // 5
Uint16 GPIOB6:1; // 6
Uint16 GPIOB7:1; // 7
Uint16 GPIOB8:1; // 8
Uint16 GPIOB9:1; // 9
Uint16 GPIOB10:1; // 10
Uint16 GPIOB11:1; // 11
Uint16 GPIOB12:1; // 12
Uint16 GPIOB13:1; // 13
Uint16 GPIOB14:1; // 14
Uint16 GPIOB15:1; // 15
};
union GPBDAT_REG {
Uint16 all;
struct GPBDAT_BITS bit;
};
//---------------------------------------------------------------------------------------
// GPIO B data set register bit definitions
//
//
struct GPBSET_BITS { // bits description
Uint16 GPIOB0:1; // 0
Uint16 GPIOB1:1; // 1
Uint16 GPIOB2:1; // 2
Uint16 GPIOB3:1; // 3
Uint16 GPIOB4:1; // 4
Uint16 GPIOB5:1; // 5
Uint16 GPIOB6:1; // 6
Uint16 GPIOB7:1; // 7
Uint16 GPIOB8:1; // 8
Uint16 GPIOB9:1; // 9
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