📄 uart_dv.c.bak
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/*-------------------------------------------------------------------------
UART_DV.C
The UART service routine for debug.
Copyright 2004 Macronix International Co., Ltd.
-------------------------------------------------------------------------*/
#define _UART_DV_
#include "..\inc\public2.h"
//============== UART Memory Define ================================
xdata BYTE Rx_Buf[2][24] _at_ 0x0880;
xdata BYTE Tx_Buf[24] _at_ 0x08B0;
xdata BYTE ReTx_Buf[24] _at_ 0x08C8;
xdata BYTE UART_RxInUse=0;
xdata BYTE Rx_Index = 0;
xdata BYTE Tx_Index = 0;
xdata BYTE Parse_Length = 0;
xdata BYTE Tx_Length = 0;
xdata BYTE ReTx_Length = 0;
xdata BYTE *ExtMemPtr;
xdata BYTE UARTFlag = 0;
// xdata BYTE UART_Count = 0;
extern BYTE DEV_Inf[16];
extern void Read_OSDReg(BYTE *, BYTE, BYTE, BYTE);
extern void Write_OSDReg(BYTE *, BYTE, BYTE, BYTE);
extern BYTE CVD1_ReadWrite(BYTE, BYTE, BYTE);
/**--------------------------------------------------------------------------
* Name void UART1(void) interrupt 4 using 1
*
* Description IRQ function,INT no.4 (Serial PORT) using BANK 1
* When INT. set flagx,and clear RI/TI
*
* Return
*
* DATE Author Description
* ===========================================================================
* 2004/05/12 Eson W. Just test RI,OK!!
*
**/
void UART1(void) interrupt 4 using 1
{
// UART_Count++;
// if (UART_Count & 0x08)
// ;//LED_R ^= 1;
if(RI==1)
{
UART_RxByte();
RI=0;
}
if(TI==1)
{
UART_TxByte();
TI=0;
}
TF1=0; // TF2
}
/**--------------------------------------------------------------------------
* Name void UART_RxByte(void);
*
* Description RX one byte from COM port.
*
* Flow Chart P Read data from COM port
* |
* X---+ SYN1 flag set?
* | |
* | P Yes, SYN1 set, Put Rx data to RX buf
* | |
* | X---+ End of Pack?
* | | P Yes, set PARSE flag and reset SYN1 flag.
* | X No, Check is Command length
* |
* X---+ NO, SYN1 not set, is SYN1 byte?
* |
* P Yes, is SYN1 byte put it to RX buffer
* No, ignore the noise byte
*
* Return None
*
* DATE Author Description
* ===========================================================================
* 2003-01-20 KM Ho This is first time implement
* 2004-05-14 Eson W. Modify for 8051 component
**/
void UART_RxByte()
{
BYTE rx_data, i ;
static struct UART_PACK *rx_pack;
rx_data = SBUF; //RX data from UART Buffer
if (UARTFlag & RX_SYN1) //check SYN1 flag is set
{ //Next byte RX --- put to RX buf and check is EOP
Rx_Buf[UART_RxInUse][Rx_Index++] = rx_data;
if ( Rx_Index >= UART_PACK_SIZE) //Is over Min. length?
{
if ( Rx_Index == UART_PACK_SIZE )
{
rx_pack = (struct UART_PACK *)Rx_Buf[UART_RxInUse];
Parse_Length = rx_pack->length + UART_PACK_SIZE; //length of parse
}
i = Rx_Index-Parse_Length;
if ( i == 0 ) //End Of Pack
{
UART_RxInUse ^= 1; //Ping-pong the buf index
UARTFlag |= RX_PARSE; //Set flag
UARTFlag &= (RX_SYN1 ^ CLEAN_UARTFlag); //Clear RX_SYNC1 Flag
}
else if (Rx_Index >= 24) //Is over Max. length?
{
UARTFlag &= (RX_SYN1 ^ CLEAN_UARTFlag);
}
}
}
else
{ //First byte RX --- is pack begin byte SYN1(0x66)?
Rx_Index = 0;
if (rx_data == SYN_BYTE)
{
UARTFlag |= RX_SYN1; //set SYN1 flag
Rx_Buf[UART_RxInUse][Rx_Index++] = rx_data;
} //ignore not pack begin byte
}
}
/**--------------------------------------------------------------------------
* Name void UART_TxByte(void);
*
* Description TX one byte to UART, Sneding data only from Tx_Buf
*
* Flow Chart X Tx flag Set?
* |
* X---+ Is send complete
* | |
* | P Yes, Send complete so clean TX flag
* | and disable TX interrupt request, return
* P No, continue send put data to THR
*
* Return
*
* DATE Author Description
* ===========================================================================
* 2003-01-20 KM Ho This is first time implement
* 2004-05-14 Eson W. Modify for 8051 component
**/
void UART_TxByte()
{
if (UARTFlag & TX_FLAG) //check is TX flag setting
{
SBUF = Tx_Buf[Tx_Index++];
if (Tx_Index >= Tx_Length) //close the TX (send complete)
{
UARTFlag &= (TX_FLAG ^ CLEAN_UARTFlag); //clean TX flag
if (Tx_Buf[1] != SACK)
UARTFlag |= TX_WAITACK; //set wait ACK flag **
}
}
}
/**--------------------------------------------------------------------------
* Name void UART_SendOut(char cmd_length);
* char *sendbuf sending buffer
* char cmd_length length of command
*
* Description The Routine will
* 1. wait last time send complete,
* 2. Send First byte
* 3. Set flag.
*
* Flow Chart
*
* Return
*
* DATE Author Description
* ===========================================================================
* 2003-01-16 K.M. Ho This is first time implement
* 2004-05-14 Eson W. Modify for 8051 component
*/
void UART_SendOut(BYTE *sendbuf, BYTE send_length)
{
BYTE i;
BYTE send_times;
send_times = 0;
while(1)
{
if (UARTFlag & (TX_FLAG|TX_WAITACK))
{ //UART is busy for last TX
for (i=0; i<120; i++);
++send_times;
if (send_times>120) //send out fail times > 3
return;
}
else
{ //Ready to send out first byte
UARTFlag |= TX_FLAG; //set flag for send
for (i=0; i<send_length; i++) //copy send data to TX buffer
// Tx_Buf[i] = ReTx_Buf[i] = sendbuf[i];
Tx_Buf[i] = sendbuf[i];
// Tx_Length = ReTx_Length = send_length; //copy sending data length
Tx_Length = send_length; //copy sending data length
Tx_Index = 1; //Trigger UART TX INT
SBUF=Tx_Buf[0]; //put first data to THR
return;
}
}
}
/**--------------------------------------------------------------------------
* Name void PrepareSendBuf(char buf_index, int addr, char data_length,
* char cmd_type);
* char *sendbuf sending buffer (MAX. 24bytes)
* int addr address of Read/Write/Fill
* char data_length data length
* char cmd_type type of command
*
* Description prepare the sending buffer
*
* Flow Chart
*
* Return None
*
* DATE Author Description
* ===========================================================================
* 2004-04-15 K.M. Ho This is first time implement
*/
void PrepareSendBuf(BYTE *sendbuf, int addr, BYTE data_length, BYTE cmd_type)
{
struct UART_PACK *tx_pack;
BYTE crc_byte;
BYTE i;
tx_pack = (struct UART_PACK *)sendbuf; //TX struct pointer to sending buffer
tx_pack->syn1 = SYN_BYTE; //SYN
tx_pack->cmd = cmd_type; //command
tx_pack->length = data_length; //data length
tx_pack->reserve=0x00; //reserve is always 0
// tx_pack->addr = addr;
sendbuf[4] = (BYTE) (addr &0x00ff); //addr low byte
sendbuf[5] = (BYTE)((addr>>8)&0x00ff); //addr high byte
tx_pack->crc = 0x00; //clean CRC
tx_pack->syn2 = SYN_BYTE; //put SYN to send buffe
crc_byte = 0; //clean CRC check byte
for (i=0; i<data_length+UART_PACK_SIZE; i++)
crc_byte ^= sendbuf[i]; //make CRC check byte
tx_pack->crc = crc_byte; //put in CRC byte
}
/**--------------------------------------------------------------------------
* Name void UART_ParseFun(void);
*
* Description Parse the recive buf when the PARSE flag is setting
* There are
* ACK device RX is OK
* NACK device RX in not OK, request resend
* MSGSHOW device request show message on PC screen
* DEVICEINF device respond information
* MEMRESPOND device respond memory content of address
* REGRESPOND register
*
* Flow Chart 1. copy RX buffer data to tmp and make CRC check byte
* 2. clean PARSE flag
* 3. is CRC right? No, send NACK command
* 4. parse COMMAND
* 5. send ACK command if need.
*
* Return
*
* DATE Author Description
* ===========================================================================
* 2003-01-22 KM Ho This is first time implement
* 2003-03-27 KM Ho Modify RX ACK command process
* 2004-05-19 Eson W.
* 2004-11-17 KMHo Add EEPROM Read/Write Command
**/
void UART_ParseFun()
{
struct UART_PACK *rx_pack;
BYTE crc_byte;
BYTE buf_index;
BYTE i, send_length;
BYTE sendtemp[32];
if ( ! (UARTFlag & RX_PARSE) )
return;
UARTFlag &= (RX_PARSE^CLEAN_UARTFlag); //clean parse flag
buf_index = UART_RxInUse ^ 1; //chang to Rx complete buffer
//RX buf is double buffer
rx_pack = (struct UART_PACK *)Rx_Buf[buf_index];
crc_byte = 0x00; //make CRC check byte
for(i=0; i<Parse_Length; i++)
crc_byte ^= Rx_Buf[buf_index][i];
if (crc_byte) //CRC error sent NACK and return
{
PrepareSendBuf(sendtemp, 0, 0, SNACK);
UART_SendOut(sendtemp, UART_PACK_SIZE);
return;
}
if (rx_pack->cmd == SACK) //if ACK command will clean UARTFlag
{ // and return
UARTFlag &= (TX_WAITACK ^ CLEAN_UARTFlag); //clean wait ACK
return;
}
//*** --------------------------------------------------------- ***
// The Respond data from Byte 16
// There are ACK cmd 8Bytes + Respond Cmd 8Bytes+ Respond data
//*** --------------------------------------------------------- ***
send_length = 0;
PrepareSendBuf(sendtemp, 0, 0, SACK);
switch(rx_pack->cmd) //parse COMMAND
{
case GETDEV:
for (i=0; i<16; i++)
sendtemp[i+16] = DEV_Inf[i];
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8], rx_pack->addr, 16, DEVICEINF);
send_length = UART_PACK_SIZE + 16;
break;
case MEMRD:
ExtMemPtr = Rx_Buf[0];
for (i=0; i<rx_pack->length; i++)
sendtemp[i+16] = *(ExtMemPtr+rx_pack->addr+i);
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8], rx_pack->addr, rx_pack->length, MEMRP);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case MEMWR:
ExtMemPtr = Rx_Buf[0];
for (i=0; i<rx_pack->length; i++)
*(ExtMemPtr+rx_pack->addr+i)= Rx_Buf[buf_index][i+8];
break;
case REGRD15xx:
//--- Pack the Resopnd Cmd and Data ---
I2C_Read(V46X_WRID, rx_pack->addr, rx_pack->length, &sendtemp[16]);
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case REGWR15xx: //Write single byte to Reg.
I2C_Write(V46X_WRID, rx_pack->addr, rx_pack->length, &Rx_Buf[buf_index][8]);
break;
case RDEEPROM:
i = (BYTE)((rx_pack->addr>>7) & 0x000E);
I2C_Read(EEPROM_WRID|i, rx_pack->addr, rx_pack->length, &sendtemp[16]);
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case WREEPROM:
i = (BYTE)((rx_pack->addr>>7) & 0x000E);
I2C_Write(EEPROM_WRID|i, rx_pack->addr, rx_pack->length, &Rx_Buf[buf_index][8]);
break;
case RDGAMMA: //Read 768bytes data from Gamma port and Respond to PC
crc_byte = I2C_ReadByte(V46X_WRID, GAMMA_CTR) & 0xF3;
if (rx_pack->addr == 0)
I2C_WriteByte(V46X_WRID, GAMMA_CTR, crc_byte|0x4); //Enable Gamma access
for (i=0; i<rx_pack->length; i++)
sendtemp[i+16] = I2C_ReadByte(V46X_WRID, GAMMA_PORT);
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
// if (rx_pack->addr >= 0x2F0)
// I2C_WriteByte(V46X_WRID, GAMMA_CTR, crc_byte|0x08); //disable Gamma correction
break;
case WRGAMMA: //Write 768bytes data to Gamma port from PC
crc_byte = I2C_ReadByte(V46X_WRID, GAMMA_CTR) & 0xF3;
if (rx_pack->addr == 0)
I2C_WriteByte(V46X_WRID, GAMMA_CTR, crc_byte|0x04); //Enable Gamma access
for (i=0; i<rx_pack->length; i++)
I2C_WriteByte(V46X_WRID, GAMMA_PORT, Rx_Buf[buf_index][8+i]);
// if (rx_pack->addr >= 0x2F0)
// I2C_WriteByte(V46X_WRID, GAMMA_CTR, crc_byte|0x08); //disable Gamma correction
break;
// **********************
// ***--- Indirect ---***
// **********************
case REGRDOSDCtrl: //respond the OSD Control Reg. from rx_pack->addr
Read_OSDReg(&sendtemp[16], 0x00, rx_pack->length, rx_pack->addr);
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case REGRDOSDCode: //respond the OSD Code Reg. from rx_pack->addr
Read_OSDReg(&sendtemp[16], 0x02, rx_pack->length>>1, rx_pack->addr);
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case REGRDOSDAttr: //respond the OSD Attr. Reg. from rx_pack->addr
Read_OSDReg(&sendtemp[16], 0x03, rx_pack->length>>1, rx_pack->addr);
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8],rx_pack->addr,rx_pack->length,rx_pack->cmd|0x40);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case REGRDTVDecoder: //respond the TV Decoder Reg. from rx_pack->addr
for (i=0; i<rx_pack->length; i++)
sendtemp[i+16] = CVD1_ReadWrite(0x00, rx_pack->addr+i, 0x00);
//--- Pack the Resopnd Cmd and Data ---
PrepareSendBuf(&sendtemp[8], rx_pack->addr, rx_pack->length, REGRPTVDecoder);
send_length = UART_PACK_SIZE + rx_pack->length;
break;
case REGWROSDCtrl: //write data to OSD Control Reg.
Write_OSDReg(&Rx_Buf[buf_index][8], 0x00, rx_pack->length, rx_pack->addr);
break;
case REGWROSDCode: //write data to OSD Code Reg.
Write_OSDReg(&Rx_Buf[buf_index][8], 0x02, rx_pack->length>>1, rx_pack->addr);
break;
case REGWROSDAttr: //write data to OSD Attr. Reg.
Write_OSDReg(&Rx_Buf[buf_index][8], 0x03, rx_pack->length>>1, rx_pack->addr);
break;
case REGWRTVDecoder: //write data to TV Decoder Reg.
for (i=0; i<rx_pack->length; i++)
CVD1_ReadWrite(0x01, rx_pack->addr+i, Rx_Buf[buf_index][8+i]);
break;
case SNACK:
UARTFlag |= TX_FLAG; //set flag for send
/*
for (i=0; i<ReTx_Length; i++) //copy send data to TX buffer
Tx_Buf[i] = ReTx_Buf[i];
Tx_Length = ReTx_Length; //copy sending data length
*/
Tx_Index = 1;
SBUF=Tx_Buf[0];
return;
default: //not define command will reset flag
//UARTFlag = 0;
//Rx_Index = 0;
return;
}
UART_SendOut(sendtemp, UART_PACK_SIZE+send_length);
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