mega323.lst

ATmegal128的JTAG测试程序

__start:
__text_start:
    0029 E5CF      LDI	R28,0x5F
    002A E0D8      LDI	R29,0x8
    002B BFCD      OUT	P3D,R28
    002C BFDE      OUT	P3E,R29
    002D 51C0      SUBI	R28,0x10
    002E 40D0      SBCI	R29,0
    002F EA0A      LDI	R16,0xAA
    0030 8308      STD	R16,0+Y
    0031 2400      CLR	R0
    0032 E6E0      LDI	R30,0x60
    0033 E0F0      LDI	R31,0
    0034 E010      LDI	R17,0
    0035 36E0      CPI	R30,0x60
    0036 07F1      CPC	R31,R17
    0037 F011      BEQ	0x003A
    0038 9201      ST	R0,Z+
    0039 CFFB      RJMP	0x0035
    003A 8300      STD	R16,0+Z
    003B E5E0      LDI	R30,0x50
    003C E0F0      LDI	R31,0
    003D E6A0      LDI	R26,0x60
    003E E0B0      LDI	R27,0
    003F E010      LDI	R17,0
    0040 35E0      CPI	R30,0x50
    0041 07F1      CPC	R31,R17
    0042 F021      BEQ	0x0047
    0043 95C8      LPM
    0044 9631      ADIW	R30,1
    0045 920D      ST	R0,X+
    0046 CFF9      RJMP	0x0040
    0048 940E0064  CALL	_main
_exit:
    0049 CFFF      RJMP	_Delay
FILE: D:\jtag_test\led_323.c
(0001) #include <iom323.h>
(0002) #include <macros.h>
(0003) 
(0004) /* This seems to produce the right amount of delay for the LED to be
(0005)  * seen
(0006)  */
(0007) void Delay()
(0008) 	{
(0009) 	unsigned char a, b;
(0010) 
(0011) 	for (a = 1; a; a++)
    004A E001      LDI	R16,1
    004B C006      RJMP	0x0052
(0012) 		for (b = 1; b; b++)
    004C E021      LDI	R18,1
    004D C001      RJMP	0x004F
(0013) 			;
    004E 9523      INC	R18
    004F 2322      TST	R18
    0050 F7E9      BNE	0x004E
    0051 9503      INC	R16
    0052 2300      TST	R16
    0053 F7C1      BNE	0x004C
(0014) 	}
    0054 9508      RET
_LED_On:
  i                    --> R20
    0056 940E0094  CALL	push_gset1
    0057 01A8      MOVW	R20,R16
(0015) 
(0016) void LED_On(int i)
(0017) 	{
(0018) 	PORTB = ~BIT(i);	/* low output to turn LED on */
    0058 E001      LDI	R16,1
    0059 E010      LDI	R17,0
    005A 019A      MOVW	R18,R20
    005C 940E00AB  CALL	lsl16
    005D 0118      MOVW	R2,R16
    005E 9420      COM	R2
    005F 9430      COM	R3
    0060 BA28      OUT	P18,R2
(0019) 	Delay();
    0061 DFE8      RCALL	0x004A
(0020) 	}
    0063 940E0097  CALL	pop_gset1
    0064 9508      RET
(0021) 
(0022) void main()
(0023) 	{
(0024) 	int i;
(0025) 	DDRB = 0xFF;	/* output */
_main:
  i                    --> R20
    0065 EF8F      LDI	R24,0xFF
    0066 BB87      OUT	P17,R24
(0026) 	PORTB = 0xFF;	/* all off */
    0067 BB88      OUT	P18,R24
    0068 C02A      RJMP	0x0093
(0027) 
(0028) 	while (1)
(0029) 		{
(0030) 		/* forward march */
(0031) 		for (i = 0; i < 8; i++)
    0069 2744      CLR	R20
    006A 2755      CLR	R21
(0032) 			LED_On(i);
    006B 018A      MOVW	R16,R20
    006C DFE8      RCALL	0x0055
    006D 5F4F      SUBI	R20,0xFF
    006E 4F5F      SBCI	R21,0xFF
    006F 3048      CPI	R20,0x8
    0070 E0E0      LDI	R30,0
    0071 075E      CPC	R21,R30
    0072 F3C4      BLT	0x006B
(0033) 		/* backward march */
(0034) 		for (i = 8; i > 0; i--)
    0073 E048      LDI	R20,0x8
    0074 E050      LDI	R21,0
(0035) 			LED_On(i);
    0075 018A      MOVW	R16,R20
    0076 DFDE      RCALL	0x0055
    0077 5041      SUBI	R20,1
    0078 4050      SBCI	R21,0
    0079 2422      CLR	R2
    007A 2433      CLR	R3
    007B 1624      CP	R2,R20
    007C 0635      CPC	R3,R21
    007D F3BC      BLT	0x0075
(0036) 		/* skip */
(0037) 		for (i = 0; i < 8; i += 2)
    007E 2744      CLR	R20
    007F 2755      CLR	R21
(0038) 			LED_On(i);
    0080 018A      MOVW	R16,R20
    0081 DFD3      RCALL	0x0055
    0082 5F4E      SUBI	R20,0xFE
    0083 4F5F      SBCI	R21,0xFF
    0084 3048      CPI	R20,0x8
    0085 E0E0      LDI	R30,0
    0086 075E      CPC	R21,R30
    0087 F3C4      BLT	0x0080
(0039) 		for (i = 7; i > 0; i -= 2)
    0088 E047      LDI	R20,7
    0089 E050      LDI	R21,0
(0040) 			LED_On(i);
    008A 018A      MOVW	R16,R20
    008B DFC9      RCALL	0x0055
    008C 5042      SUBI	R20,2
    008D 4050      SBCI	R21,0
    008E 2422      CLR	R2
    008F 2433      CLR	R3
    0090 1624      CP	R2,R20
    0091 0635      CPC	R3,R21
    0092 F3BC      BLT	0x008A
(0041) 		}
    0093 CFD5      RJMP	0x0069
(0042) 	}
FILE: <library>
    0094 9508      RET
push_gset1:
    0095 935A      ST	R21,-Y
    0096 934A      ST	R20,-Y
    0097 9508      RET
pop_gset1:
    0098 E0E1      LDI	R30,1
pop:
    0099 9149      LD	R20,Y+
    009A 9159      LD	R21,Y+
    009B FDE0      SBRC	R30,0
    009C 9508      RET
    009D 9169      LD	R22,Y+
    009E 9179      LD	R23,Y+
    009F FDE1      SBRC	R30,1
    00A0 9508      RET
    00A1 90A9      LD	R10,Y+
    00A2 90B9      LD	R11,Y+
    00A3 FDE2      SBRC	R30,2
    00A4 9508      RET
    00A5 90C9      LD	R12,Y+
    00A6 90D9      LD	R13,Y+
    00A7 FDE3      SBRC	R30,3
    00A8 9508      RET
    00A9 90E9      LD	R14,Y+
    00AA 90F9      LD	R15,Y+
    00AB 9508      RET
lsl16:
    00AC 2322      TST	R18
    00AD F021      BEQ	0x00B2
    00AE 0F00      LSL	R16
    00AF 1F11      ROL	R17
    00B0 952A      DEC	R18
    00B1 CFFA      RJMP	0x00AC
    00B2 9508      RET