kernop

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

	SerialICE Kernel Operation
	SerialICE Kernel Operation

Some of the code in this explanation is board-specific.
This description uses code extracted from the 
kernel for the 
BDMR4101 evaluation board.

Execution starts at the reset vector 0xbfc00000. At this address there
is a branch-and-link to cpu_init.

reset_vector: # bfc00000
	bal	cpu_init

cpu_init performs any hardware specific initialization. eg. initialize
the serial port that will be used to communicate with the SerialICE Controller,
initialize the DRAM controller. It does not need to initialize the
caches.

Once this step has been completed. We initialize the CAUSE and SR
registers,

	# make sure the sw bits of the CAUSE register are zero
	.set noreorder
	mtc0	zero,C0_CAUSE		
	.set reorder

	# enable ints in SR MASK+IEC
	li	k0,(SR_BEV|SR_IEC|UART_INTBIT)
	.set noreorder
	mtc0	k0,C0_SR
	.set reorder

and then save some values in the savearea. Note that SAVEAREA has a kseg1
value.

	la	k0,SAVEAREA
	la	t0,get_word
	sw	t0,ICE_GWP*4(k0)
	la	t0,put_word
	sw	t0,ICE_PWP*4(k0)
	li	t0,IBUFSIZE
	sw	t0,ICE_IBS*4(k0)
	li	t0,REG_MAP
	sw	t0,ICE_MAP*4(k0)
	li	t0,SA_VERS
	sw	t0,ICE_SAV*4(k0)
	li	t0,ICE_SAHSIZE
	sw	t0,ICE_SAH*4(k0)
#ifdef MIPSEB
	li	t0,0
#else
	li	t0,1
#endif
	sw	t0,ICE_LE*4(k0)

This block of code writes seven values into the savearea. This information
is needed by the SerialICE Driver or DLL. The savearea is in two parts, a
header, and registers. The size of the header is placed in ICE_SAH, following
this are a number of saved registers. Which registers, and how many, are
indicated by the ICE_MAP value.