tgt_machdep.c

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

        outb(TOD_REG(TOD_MONTH), TOBCD(tm->tm_mon + 1));
        outb(TOD_REG(TOD_DATE), TOBCD(tm->tm_mday));
        outb(TOD_REG(TOD_DAY), TOBCD(tm->tm_wday));
        outb(TOD_REG(TOD_HOUR), TOBCD(tm->tm_hour));
        outb(TOD_REG(TOD_MINUTE), TOBCD(tm->tm_min));
        outb(TOD_REG(TOD_SECOND), TOBCD(tm->tm_sec));

	/* Transfer new time to counters */
	outb(TOD_REG(TOD_CTRL), inb(TOD_REG(TOD_CTRL)) & ~TOD_CTRL_W);
	clk_invalid = 0;
}

#else

time_t
tgt_gettime()
{
	return(957960000);  /* Wed May 10 14:00:00 2000 :-) */
}

#endif /* HAVE_TOD */


/*
 *  Print out any target specific memory information
 */
void
tgt_memprint()
{
	printf("Primary Instruction cache size %dkb (%d line, %d way)\n",
		CpuPrimaryInstCacheSize / 1024, CpuPrimaryInstCacheLSize, CpuNWayCache);
	printf("Primary Data cache size %dkb (%d line, %d way)\n",
		CpuPrimaryDataCacheSize / 1024, CpuPrimaryDataCacheLSize, CpuNWayCache);
	if(!getenv("ocache_off") && CpuSecondaryCacheSize != 0) {
		printf("Secondary cache size %dkb\n", CpuSecondaryCacheSize / 1024);
	}
	if(!getenv("ecache_off") && CpuTertiaryCacheSize != 0) {
		printf("Tertiary cache size %dkb\n", CpuTertiaryCacheSize / 1024);
	}
}

void
tgt_machprint()
{
	printf("BSP Copyright 2003, Momentum Computer, Inc.\n");
	printf("CPU %s @", md_cpuname());
} 

/*
 *  Return a suitable address for the client stack.
 *  Usually top of RAM memory.
 */

register_t
tgt_clienttos()
{
	return((register_t)(int)PHYS_TO_UNCACHED((long)memtop & ~7) - 64);
}

#ifdef HAVE_FLASH
/*
 *  Flash programming support code.
 */

/*
 *  Table of flash devices on target. See pflash_tgt.h.
 */
struct fl_map tgt_fl_map_socketed[] = {
        TARGET_FLASH_DEVICES_SOCKETED
};

struct fl_map *
tgt_flashmap()
{
	/* Right now we only have support for the socketed part */
	return(tgt_fl_map_socketed);
}   
void
tgt_flashwrite_disable()
{
}

int
tgt_flashwrite_enable()
{
	if(in8(FPGAREG(BOARD_STAT)) & 0x40) {
		return(1);
	}
	else {
		return(0);	/* can't enable. jumper selected! */
	}
}

void
tgt_flashinfo(void *p, size_t *t)
{
	struct fl_map *map;

	map = fl_find_map(p);
	if(map) {
		*t = map->fl_map_size;
	}
	else {
		*t = 0;
	}
}

void
tgt_flashprogram(void *p, int size, void *s, int endian)
{
	printf("Programming flash %p:%p into %p\n", s, size, p);
	if(fl_erase_device(p, size, TRUE)) {
		printf("Erase failed!\n");
		return;
	}
	if(fl_program_device(p, s, size, TRUE)) {
		printf("Programming failed!\n");
	}
	fl_verify_device(p, s, size, TRUE);
}
#endif /* PFLASH */

/*
 *  Network stuff.
 */
void
tgt_netinit()
{
}

int
tgt_ethaddr(char *p)
{
	bcopy((void *)&hwethadr, p, 6);
	return(0);
}

void
tgt_netreset()
{
}

/*
 *   --- NVRAM handling code ---
 */
/*
 *  Special copy that does it bytewise, guaranteed!
 */
static void bytecopy __P((char *, char *, size_t));
static
void bytecopy(char *src, char *dst, size_t size)
{
	if(src == NULL) {
		*dst = '\0';
	}
	else if (dst >= src && dst < src + size) {
		src += size;
		dst += size;
		while (size--) {
			*--dst = *--src;
		}
	}
	else while (size--) {
		*dst++ = *src++;
	}
}

/*
 *  Read in environment from NV-ram and set.
 */
void
tgt_mapenv(int (*func) __P((char *, char *)))
{
	char *ep;
	char env[256];

static const char* const rc[] = {
	"unknown", "powerup", "button", "reserved", "wdog", "jtag"
};

        /*
         *  Check integrity of the NVRAM env area. If not in order
         *  initialize it to empty.
         */
        if(cksum((void *)NVRAM_FIRST_ENV, NVRAM_SIZE_ENV, 0) != 0 ||
           memchr((void *)NVRAM_FIRST_ENV, 0, NVRAM_SIZE_ENV) == 0) {
                nvram_invalid = 1;
	}

	/*
	 *  Check integrity of the NVRAM env area. If not in order
	 *  initialize it to empty.
	 */
	if(cksum((void *)NVRAM_FIRST_ENV, NVRAM_SIZE_ENV, 0) != 0) {
		nvram_invalid = 1;
	}
	else {
		ep = (char *)NVRAM_FIRST_ENV + 2;
	
		while(*ep != 0) {
			char *val = 0, *p = env;
			while((*p++ = *ep++) != 0 && (ep < (char *)NVRAM_LAST_ENV)) {
				if((*(p - 1) == '=') && (val == NULL)) {
					*(p - 1) = '\0';
					val = p;
				}
			}
			if(ep < (char *)NVRAM_LAST_ENV) {
				(*func)(env, val);
			}
			else {
				nvram_invalid = 2;
				break;
			}
		}
		bytecopy((char *)NVRAM_VXWORKS, env, sizeof(env));
		(*func)("vxWorks", env);
	}

	sprintf(env, "%d", totalmemsize / (1024 * 1024));
	(*func)("memsize", env);

	sprintf(env, "%d", md_pipefreq);
	(*func)("cpuclock", env);

	sprintf(env, "%d", md_cpufreq);
	(*func)("busclock", env);

	(*func)("systype", "jaguar-atx");

	sprintf(env, "%d", CpuTertiaryCacheSize / (1024*1024));
	(*func)("l3cache", env);

	sprintf(env, "%x", GT_BASE_ADDR);
	(*func)("gtbase", env);

	sprintf(env, "%s", rc[ffs(in8(FPGAREG(RESET_STAT)) & 0x1f)]);
	(*func)("rststat", env);
}

int
tgt_unsetenv(char *name)
{
	char *ep;
	char *np;
	char *sp;

	if(nvram_invalid) {
		return(0);
	}

	ep = (char *)NVRAM_FIRST_ENV + 2;

	while((*ep != '\0') && (ep < (char *)NVRAM_LAST_ENV)) {
		np = name;
		sp = ep;

		while((*ep == *np) && (*ep != '=') && (*np != '\0')) {
			ep++;
			np++;
		}
		if((*np == '\0') && ((*ep == '\0') || (*ep == '='))) {
			while(*ep++);
			while(ep <= (char *)NVRAM_LAST_ENV) {
				*sp++ = *ep++;
			}
			cksum((void *)NVRAM_FIRST_ENV, NVRAM_SIZE_ENV, 1);
			return(1);
		}
		else if(*ep != '\0') {
			while(*ep++ != '\0');
		}
	}

	return(0);
}

int
tgt_setenv(char *name, char *value)
{
	char *ep;
	int envlen;

	/* Non permanent vars. */
	if(strcmp(EXPERT, name) == 0) {
		return(1);
	}

	/* Calculate total env mem size requiered */
	envlen = strlen(name);
	if(envlen == 0) {
		return(0);
	}
	if(value != NULL) {
		envlen += strlen(value);
	}
	envlen += 2;	/* '=' + null byte */
	if(envlen > 255) {
		return(0);	/* Are you crazy!? */
	}

	/* If NVRAM is found to be uninitialized, reinit it. */
	if(nvram_invalid) {
		*(char *)(NVRAM_FIRST_ENV + 2) = '\0';
		*(char *)(NVRAM_FIRST_ENV + 3) = '\0';
		cksum((void *)NVRAM_FIRST_ENV, NVRAM_SIZE_ENV, 1);
		nvram_invalid = 0;
		bytecopy(NVRAM_VXWORKS_DEFAULT, (char *)NVRAM_VXWORKS,
			 sizeof(NVRAM_VXWORKS_DEFAULT));
	}

	if(strcmp("vxWorks", name) == 0) {
		bytecopy(value, (char *)NVRAM_VXWORKS, envlen);
		return(1);
	}

	/* Remove any current setting */
	tgt_unsetenv(name);

	/* Find end of evironment strings */
	ep = (char *)NVRAM_FIRST_ENV + 2;
	if(*ep != '\0') {
		do {
			while(*ep++ != '\0');
		} while(*ep++ != '\0');
		ep--;
	}
	if((NVRAM_LAST_ENV - (int)ep) < (envlen + 1)) {
		return(0);	/* Bummer! */ 
	}

	/*
	 *  Special case heaptop must always be first since it
	 *  can change how memory allocation works.
	 */
	if(strcmp("heaptop", name) == 0) {

		bytecopy((char *)NVRAM_FIRST_ENV + 2,
			 (char *)NVRAM_FIRST_ENV + 2 + envlen,
			 (int)ep - (NVRAM_FIRST_ENV + 1));

		ep = (char *)NVRAM_FIRST_ENV + 2;
		while(*name != '\0') {
			*ep++ = *name++;
		}
		if(value != NULL) {
			*ep++ = '=';
			while((*ep++ = *value++) != '\0');
		}
		else {
			*ep++ = '\0';
		}
	}
	else {
		while(*name != '\0') {
			*ep++ = *name++;
		}
		if(value != NULL) {
			*ep++ = '=';
			while((*ep++ = *value++) != '\0');
		}
		else {
			*ep++ = '\0';
		}
		*ep++ = '\0';	/* End of env strings */
	}
	cksum((void *)NVRAM_FIRST_ENV, NVRAM_SIZE_ENV, 1);
	
	return(1);
}


/*
 *  Calculate checksum. If 'set' checksum is calculated and set.
 */
static int
cksum(void *p, size_t s, int set)
{
	u_int16_t sum = 0xaa55;	/* Seed... */
	u_int8_t *sp = p;
	int sz = s / 2;

	if(set) {
		*sp = 0;	/* Clear checksum */
		*(sp+1) = 0;	/* Clear checksum */
	}
	while(sz--) {
		sum += (*sp++) << 8;
		sum += *sp++;
	}
	if(set) {
		sum = -sum;
		*(u_int8_t *)p = sum >> 8;
		*((u_int8_t *)p+1) = sum;
	}
	return(sum);
}

/*
 *  Simple display function to display a 4 char string or code.
 *  Called during startup to display progress on any feasible
 *  display before any serial port have been initialized.
 */
void
tgt_display(char *msg, int x)
{
	/* Have simple serial port driver */
	tgt_putchar(msg[0]);
	tgt_putchar(msg[1]);
	tgt_putchar(msg[2]);
	tgt_putchar(msg[3]);
	tgt_putchar('\r');
	tgt_putchar('\n');
}

/*
 *  Eyecandy
 */
void
tgt_toggle(int what)
{
	GT_WRITE(GPP_VALUE, GT_READ(GPP_VALUE) ^ 0x80000000);
}


void
clrhndlrs()
{
}

int
tgt_getmachtype()
{
	return(md_cputype());
}


/*
 *  SMP handling.
 */

#if defined(SMP)

/*
 *  Startup next CPU.
 */
int
tgt_smpstartup()
{
	int i;

	/* Other than CPU0 returns directly */
	if (tgt_smpwhoami() != 0)
		return 0;

	/* Check that core 2 is in wait and that we want smp */
	if (getenv("nosmp") || (RM9K_READ(RM9K_SEM) & 0x80000000) == 0) {
		RM9K_WRITE(RM9K_RSTSET, 0x00000002);
		printf("Single processor system running.\n");
		return 0;
	}

	/* We are CPU 0. release CPU 1 and check if running. */
	RM9K_WRITE(RM9K_SEMCLR, 0x80000000);

	/* Who's knocking ? */
	i = 500000;
	while (i-- > 0 && (RM9K_READ(RM9K_SEM) & 0x80000000) == 0) {
		/* Just wait for CPU1 */
	}
	if (i > 0) {
		printf("Dual processor system running.\n");
		return 1;
	}
	else {
		printf("Second core failed!\n");
		return 0;
	}
}

/*
 *  CPU 2 synchronization
 */

int
tgt_smpready()
{
	CPU_SetSR(0, SR_BOOT_EXC_VEC);
	return(0);
}

/*
 *  Return CPU id of executing CPU
 */
int
tgt_smpwhoami()
{
	return((md_cputype() >> 24) & 0x7);
}

/*
 *  SMP Idle point, wait for work.
 */
int
tgt_smpidle()
{
	int x = 0;
	CPU_IOFlushDCache(0x80008000, 0x4000, 1); /* XXX Coherency error */
	RM9K_WRITE(RM9K_SEMSET, 0x80000000);
	while (RM9K_READ(RM9K_SEM) & 0x80000000) {
#if 1
		if ((GT_READ(GPP_VALUE) ^ x) & 0x80000000) {
			x <<= 1;
			if (x + x <= 0)
				x = 0x01000000;
			x |= GT_READ(GPP_VALUE) & 0x80000000;
			GT_WRITE(GPP_VALUE, x);
		}
#endif
		/* Do nothing */
	}
	/* Dcache (L1+L2) */
	CPU_IOFlushDCache(0x80008000, 0x400, 0);
	CPU_IOFlushDCache(0x8000c000, totalmemsize-0xc000, 0);
	/* Icache (L1) */
	CPU_FlushCache();

	GT_WRITE(GPP_VALUE, 0x94000000);
	return(0);
}

/*
 *  Schedule CPU 2 to run.
 */
int
tgt_smpschedule(cpu)
{
	CPU_IOFlushDCache(0x80000000, totalmemsize, 1); /* XXX Coherency error */
	CPU_IOFlushDCache(0x80008000, 0x4000, 0); /* XXX Coherency error */
	RM9K_WRITE(RM9K_SEMCLR, 0x80000000);
	return(0);
}

/*
 *  Spin lock semaphore for generic lock.
 */
int
tgt_smplock()
{
	if (CPU_Get_Sem(&spinlock, 1))
		return 1;
	return 0;
}

void
tgt_smpunlock()
{
	spinlock = 0;
}

/*
 *  Spin lock semaphores usable by client programs.
 */
int
tgt_semlock(int sem)
{
	switch(sem) {
	case 0:
		return CPU_Get_Sem(&usem0, 1);
	case 1:
		return CPU_Get_Sem(&usem1, 1);
	case 2:
		return CPU_Get_Sem(&usem2, 1);
	case 3:
		return CPU_Get_Sem(&usem3, 1);
	default:
		return(-1);
	}
}

void
tgt_semunlock(int sem)
{
	switch(sem) {
	case 0:
		usem0 = 0;
		break;
	case 1:
		usem1 = 0;
		break;
	case 2:
		usem2 = 0;
		break;
	case 3:
		usem3 = 0;
		break;
	}
}
#endif

/*
 *  Create stubs if network is not compiled in
 */
#ifdef INET
void
tgt_netpoll()
{
	splx(splhigh());
}

#else
extern void longjmp(label_t *, int);
void gsignal(label_t *jb, int sig);
void
gsignal(label_t *jb, int sig)
{
	if(jb != NULL) {
		longjmp(jb, 1);
	}
}

int	netopen (const char *, int);
int	netread (int, void *, int);
int	netwrite (int, const void *, int);
long	netlseek (int, long, int);
int	netioctl (int, int, void *);
int	netclose (int);
int netopen(const char *p, int i)	{ return -1;}
int netread(int i, void *p, int j)	{ return -1;}
int netwrite(int i, const void *p, int j)	{ return -1;}
int netclose(int i)	{ return -1;}
long int netlseek(int i, long j, int k)	{ return -1;}
int netioctl(int j, int i, void *p)	{ return -1;}
void tgt_netpoll()	{}

#endif /*INET*/